drivers/media/video/em28xx/em28xx-core.c

   1 /*
   2    em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
   3
   4    Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
   5                       Markus Rechberger <mrechberger@gmail.com>
   6                       Mauro Carvalho Chehab <mchehab@infradead.org>
   7                       Sascha Sommer <saschasommer@freenet.de>
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 2 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/list.h>
  26 #include <linux/module.h>
  27 #include <linux/usb.h>
  28 #include <linux/vmalloc.h>
  29 #include <media/v4l2-common.h>
  30
  31 #include "em28xx.h"
  32
  33 /* #define ENABLE_DEBUG_ISOC_FRAMES */
  34
  35 static unsigned int core_debug;
  36 module_param(core_debug,int,0644);
  37 MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
  38
  39 #define em28xx_coredbg(fmt, arg...) do {\
  40         if (core_debug) \
  41                 printk(KERN_INFO "%s %s :"fmt, \
  42                          dev->name, __func__ , ##arg); } while (0)
  43
  44 static unsigned int reg_debug;
  45 module_param(reg_debug,int,0644);
  46 MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
  47
  48 #define em28xx_regdbg(fmt, arg...) do {\
  49         if (reg_debug) \
  50                 printk(KERN_INFO "%s %s :"fmt, \
  51                          dev->name, __func__ , ##arg); } while (0)
  52
  53 static int alt = EM28XX_PINOUT;
  54 module_param(alt, int, 0644);
  55 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
  56
  57 /* FIXME */
  58 #define em28xx_isocdbg(fmt, arg...) do {\
  59         if (core_debug) \
  60                 printk(KERN_INFO "%s %s :"fmt, \
  61                          dev->name, __func__ , ##arg); } while (0)
  62
  63 /*
  64  * em28xx_read_reg_req()
  65  * reads data from the usb device specifying bRequest
  66  */
  67 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  68                                    char *buf, int len)
  69 {
  70         int ret;
  71         int pipe = usb_rcvctrlpipe(dev->udev, 0);
  72
  73         if (dev->state & DEV_DISCONNECTED)
  74                 return -ENODEV;
  75
  76         if (len > URB_MAX_CTRL_SIZE)
  77                 return -EINVAL;
  78
  79         if (reg_debug) {
  80                 printk( KERN_DEBUG "(pipe 0x%08x): "
  81                         "IN:  %02x %02x %02x %02x %02x %02x %02x %02x ",
  82                         pipe,
  83                         USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  84                         req, 0, 0,
  85                         reg & 0xff, reg >> 8,
  86                         len & 0xff, len >> 8);
  87         }
  88
  89         mutex_lock(&dev->ctrl_urb_lock);
  90         ret = usb_control_msg(dev->udev, pipe, req,
  91                               USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  92                               0x0000, reg, dev->urb_buf, len, HZ);
  93         if (ret < 0) {
  94                 if (reg_debug)
  95                         printk(" failed!\n");
  96                 mutex_unlock(&dev->ctrl_urb_lock);
  97                 return ret;
  98         }
  99
 100         if (len)
 101                 memcpy(buf, dev->urb_buf, len);
 102
 103         mutex_unlock(&dev->ctrl_urb_lock);
 104
 105         if (reg_debug) {
 106                 int byte;
 107
 108                 printk("<<<");
 109                 for (byte = 0; byte < len; byte++)
 110                         printk(" %02x", (unsigned char)buf[byte]);
 111                 printk("\n");
 112         }
 113
 114         return ret;
 115 }
 116
 117 /*
 118  * em28xx_read_reg_req()
 119  * reads data from the usb device specifying bRequest
 120  */
 121 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
 122 {
 123         int ret;
 124         u8 val;
 125
 126         ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
 127         if (ret < 0)
 128                 return ret;
 129
 130         return val;
 131 }
 132
 133 int em28xx_read_reg(struct em28xx *dev, u16 reg)
 134 {
 135         return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
 136 }
 137
 138 /*
 139  * em28xx_write_regs_req()
 140  * sends data to the usb device, specifying bRequest
 141  */
 142 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
 143                                  int len)
 144 {
 145         int ret;
 146         int pipe = usb_sndctrlpipe(dev->udev, 0);
 147
 148         if (dev->state & DEV_DISCONNECTED)
 149                 return -ENODEV;
 150
 151         if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
 152                 return -EINVAL;
 153
 154         if (reg_debug) {
 155                 int byte;
 156
 157                 printk( KERN_DEBUG "(pipe 0x%08x): "
 158                         "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
 159                         pipe,
 160                         USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 161                         req, 0, 0,
 162                         reg & 0xff, reg >> 8,
 163                         len & 0xff, len >> 8);
 164
 165                 for (byte = 0; byte < len; byte++)
 166                         printk(" %02x", (unsigned char)buf[byte]);
 167                 printk("\n");
 168         }
 169
 170         mutex_lock(&dev->ctrl_urb_lock);
 171         memcpy(dev->urb_buf, buf, len);
 172         ret = usb_control_msg(dev->udev, pipe, req,
 173                               USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 174                               0x0000, reg, dev->urb_buf, len, HZ);
 175         mutex_unlock(&dev->ctrl_urb_lock);
 176
 177         if (dev->wait_after_write)
 178                 msleep(dev->wait_after_write);
 179
 180         return ret;
 181 }
 182
 183 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
 184 {
 185         int rc;
 186
 187         rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
 188
 189         /* Stores GPO/GPIO values at the cache, if changed
 190            Only write values should be stored, since input on a GPIO
 191            register will return the input bits.
 192            Not sure what happens on reading GPO register.
 193          */
 194         if (rc >= 0) {
 195                 if (reg == dev->reg_gpo_num)
 196                         dev->reg_gpo = buf[0];
 197                 else if (reg == dev->reg_gpio_num)
 198                         dev->reg_gpio = buf[0];
 199         }
 200
 201         return rc;
 202 }
 203
 204 /* Write a single register */
 205 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
 206 {
 207         return em28xx_write_regs(dev, reg, &val, 1);
 208 }
 209
 210 /*
 211  * em28xx_write_reg_bits()
 212  * sets only some bits (specified by bitmask) of a register, by first reading
 213  * the actual value
 214  */
 215 static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
 216                                  u8 bitmask)
 217 {
 218         int oldval;
 219         u8 newval;
 220
 221         /* Uses cache for gpo/gpio registers */
 222         if (reg == dev->reg_gpo_num)
 223                 oldval = dev->reg_gpo;
 224         else if (reg == dev->reg_gpio_num)
 225                 oldval = dev->reg_gpio;
 226         else
 227                 oldval = em28xx_read_reg(dev, reg);
 228
 229         if (oldval < 0)
 230                 return oldval;
 231
 232         newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
 233
 234         return em28xx_write_regs(dev, reg, &newval, 1);
 235 }
 236
 237 /*
 238  * em28xx_is_ac97_ready()
 239  * Checks if ac97 is ready
 240  */
 241 static int em28xx_is_ac97_ready(struct em28xx *dev)
 242 {
 243         int ret, i;
 244
 245         /* Wait up to 50 ms for AC97 command to complete */
 246         for (i = 0; i < 10; i++, msleep(5)) {
 247                 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
 248                 if (ret < 0)
 249                         return ret;
 250
 251                 if (!(ret & 0x01))
 252                         return 0;
 253         }
 254
 255         em28xx_warn("AC97 command still being executed: not handled properly!\n");
 256         return -EBUSY;
 257 }
 258
 259 /*
 260  * em28xx_read_ac97()
 261  * write a 16 bit value to the specified AC97 address (LSB first!)
 262  */
 263 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
 264 {
 265         int ret;
 266         u8 addr = (reg & 0x7f) | 0x80;
 267         u16 val;
 268
 269         ret = em28xx_is_ac97_ready(dev);
 270         if (ret < 0)
 271                 return ret;
 272
 273         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 274         if (ret < 0)
 275                 return ret;
 276
 277         ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
 278                                            (u8 *)&val, sizeof(val));
 279
 280         if (ret < 0)
 281                 return ret;
 282         return le16_to_cpu(val);
 283 }
 284
 285 /*
 286  * em28xx_write_ac97()
 287  * write a 16 bit value to the specified AC97 address (LSB first!)
 288  */
 289 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
 290 {
 291         int ret;
 292         u8 addr = reg & 0x7f;
 293         __le16 value;
 294
 295         value = cpu_to_le16(val);
 296
 297         ret = em28xx_is_ac97_ready(dev);
 298         if (ret < 0)
 299                 return ret;
 300
 301         ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
 302         if (ret < 0)
 303                 return ret;
 304
 305         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 306         if (ret < 0)
 307                 return ret;
 308
 309         return 0;
 310 }
 311
 312 struct em28xx_vol_table {
 313         enum em28xx_amux mux;
 314         u8               reg;
 315 };
 316
 317 static struct em28xx_vol_table inputs[] = {
 318         { EM28XX_AMUX_VIDEO,    AC97_VIDEO_VOL   },
 319         { EM28XX_AMUX_LINE_IN,  AC97_LINEIN_VOL  },
 320         { EM28XX_AMUX_PHONE,    AC97_PHONE_VOL   },
 321         { EM28XX_AMUX_MIC,      AC97_MIC_VOL     },
 322         { EM28XX_AMUX_CD,       AC97_CD_VOL      },
 323         { EM28XX_AMUX_AUX,      AC97_AUX_VOL     },
 324         { EM28XX_AMUX_PCM_OUT,  AC97_PCM_OUT_VOL },
 325 };
 326
 327 static int set_ac97_input(struct em28xx *dev)
 328 {
 329         int ret, i;
 330         enum em28xx_amux amux = dev->ctl_ainput;
 331
 332         /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
 333            em28xx should point to LINE IN, while AC97 should use VIDEO
 334          */
 335         if (amux == EM28XX_AMUX_VIDEO2)
 336                 amux = EM28XX_AMUX_VIDEO;
 337
 338         /* Mute all entres but the one that were selected */
 339         for (i = 0; i < ARRAY_SIZE(inputs); i++) {
 340                 if (amux == inputs[i].mux)
 341                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
 342                 else
 343                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
 344
 345                 if (ret < 0)
 346                         em28xx_warn("couldn't setup AC97 register %d\n",
 347                                      inputs[i].reg);
 348         }
 349         return 0;
 350 }
 351
 352 static int em28xx_set_audio_source(struct em28xx *dev)
 353 {
 354         int ret;
 355         u8 input;
 356
 357         if (dev->board.is_em2800) {
 358                 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
 359                         input = EM2800_AUDIO_SRC_TUNER;
 360                 else
 361                         input = EM2800_AUDIO_SRC_LINE;
 362
 363                 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
 364                 if (ret < 0)
 365                         return ret;
 366         }
 367
 368         if (dev->board.has_msp34xx)
 369                 input = EM28XX_AUDIO_SRC_TUNER;
 370         else {
 371                 switch (dev->ctl_ainput) {
 372                 case EM28XX_AMUX_VIDEO:
 373                         input = EM28XX_AUDIO_SRC_TUNER;
 374                         break;
 375                 default:
 376                         input = EM28XX_AUDIO_SRC_LINE;
 377                         break;
 378                 }
 379         }
 380
 381         ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
 382         if (ret < 0)
 383                 return ret;
 384         msleep(5);
 385
 386         switch (dev->audio_mode.ac97) {
 387         case EM28XX_NO_AC97:
 388                 break;
 389         default:
 390                 ret = set_ac97_input(dev);
 391         }
 392
 393         return ret;
 394 }
 395
 396 static const struct em28xx_vol_table outputs[] = {
 397         { EM28XX_AOUT_MASTER, AC97_MASTER_VOL      },
 398         { EM28XX_AOUT_LINE,   AC97_LINE_LEVEL_VOL  },
 399         { EM28XX_AOUT_MONO,   AC97_MASTER_MONO_VOL },
 400         { EM28XX_AOUT_LFE,    AC97_LFE_MASTER_VOL  },
 401         { EM28XX_AOUT_SURR,   AC97_SURR_MASTER_VOL },
 402 };
 403
 404 int em28xx_audio_analog_set(struct em28xx *dev)
 405 {
 406         int ret, i;
 407         u8 xclk;
 408
 409         if (!dev->audio_mode.has_audio)
 410                 return 0;
 411
 412         /* It is assumed that all devices use master volume for output.
 413            It would be possible to use also line output.
 414          */
 415         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 416                 /* Mute all outputs */
 417                 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
 418                         ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
 419                         if (ret < 0)
 420                                 em28xx_warn("couldn't setup AC97 register %d\n",
 421                                      outputs[i].reg);
 422                 }
 423         }
 424
 425         xclk = dev->board.xclk & 0x7f;
 426         if (!dev->mute)
 427                 xclk |= 0x80;
 428
 429         ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
 430         if (ret < 0)
 431                 return ret;
 432         msleep(10);
 433
 434         /* Selects the proper audio input */
 435         ret = em28xx_set_audio_source(dev);
 436
 437         /* Sets volume */
 438         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 439                 int vol;
 440
 441                 /* LSB: left channel - both channels with the same level */
 442                 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
 443
 444                 /* Mute device, if needed */
 445                 if (dev->mute)
 446                         vol |= 0x8000;
 447
 448                 /* Sets volume */
 449                 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
 450                         if (dev->ctl_aoutput & outputs[i].mux)
 451                                 ret = em28xx_write_ac97(dev, outputs[i].reg,
 452                                                         vol);
 453                         if (ret < 0)
 454                                 em28xx_warn("couldn't setup AC97 register %d\n",
 455                                      outputs[i].reg);
 456                 }
 457         }
 458
 459         return ret;
 460 }
 461 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
 462
 463 int em28xx_audio_setup(struct em28xx *dev)
 464 {
 465         int vid1, vid2, feat, cfg;
 466         u32 vid;
 467
 468         if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874) {
 469                 /* Digital only device - don't load any alsa module */
 470                 dev->audio_mode.has_audio = 0;
 471                 dev->has_audio_class = 0;
 472                 dev->has_alsa_audio = 0;
 473                 return 0;
 474         }
 475
 476         /* If device doesn't support Usb Audio Class, use vendor class */
 477         if (!dev->has_audio_class)
 478                 dev->has_alsa_audio = 1;
 479
 480         dev->audio_mode.has_audio = 1;
 481
 482         /* See how this device is configured */
 483         cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
 484         if (cfg < 0)
 485                 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
 486         else
 487                 em28xx_info("Config register raw data: 0x%02x\n", cfg);
 488
 489         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 490                     EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
 491                 em28xx_info("I2S Audio (3 sample rates)\n");
 492                 dev->audio_mode.i2s_3rates = 1;
 493         }
 494         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 495                     EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
 496                 em28xx_info("I2S Audio (5 sample rates)\n");
 497                 dev->audio_mode.i2s_5rates = 1;
 498         }
 499
 500         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
 501                 /* Skip the code that does AC97 vendor detection */
 502                 dev->audio_mode.ac97 = EM28XX_NO_AC97;
 503                 goto init_audio;
 504         }
 505
 506         dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
 507
 508         vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
 509         if (vid1 < 0) {
 510                 /* Device likely doesn't support AC97 */
 511                 em28xx_warn("AC97 chip type couldn't be determined\n");
 512                 goto init_audio;
 513         }
 514
 515         vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
 516         if (vid2 < 0)
 517                 goto init_audio;
 518
 519         vid = vid1 << 16 | vid2;
 520
 521         dev->audio_mode.ac97_vendor_id = vid;
 522         em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
 523
 524         feat = em28xx_read_ac97(dev, AC97_RESET);
 525         if (feat < 0)
 526                 goto init_audio;
 527
 528         dev->audio_mode.ac97_feat = feat;
 529         em28xx_warn("AC97 features = 0x%04x\n", feat);
 530
 531         /* Try to identify what audio processor we have */
 532         if ((vid == 0xffffffff) && (feat == 0x6a90))
 533                 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
 534         else if ((vid >> 8) == 0x838476)
 535                 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
 536
 537 init_audio:
 538         /* Reports detected AC97 processor */
 539         switch (dev->audio_mode.ac97) {
 540         case EM28XX_NO_AC97:
 541                 em28xx_info("No AC97 audio processor\n");
 542                 break;
 543         case EM28XX_AC97_EM202:
 544                 em28xx_info("Empia 202 AC97 audio processor detected\n");
 545                 break;
 546         case EM28XX_AC97_SIGMATEL:
 547                 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
 548                             dev->audio_mode.ac97_vendor_id & 0xff);
 549                 break;
 550         case EM28XX_AC97_OTHER:
 551                 em28xx_warn("Unknown AC97 audio processor detected!\n");
 552                 break;
 553         default:
 554                 break;
 555         }
 556
 557         return em28xx_audio_analog_set(dev);
 558 }
 559 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
 560
 561 int em28xx_colorlevels_set_default(struct em28xx *dev)
 562 {
 563         em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10);  /* contrast */
 564         em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00);        /* brightness */
 565         em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
 566         em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
 567         em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
 568         em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
 569
 570         em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
 571         em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
 572         em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
 573         em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
 574         em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
 575         em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
 576         return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
 577 }
 578
 579 int em28xx_capture_start(struct em28xx *dev, int start)
 580 {
 581         int rc;
 582
 583         if (dev->chip_id == CHIP_ID_EM2874) {
 584                 /* The Transport Stream Enable Register moved in em2874 */
 585                 if (!start) {
 586                         rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 587                                                    0x00,
 588                                                    EM2874_TS1_CAPTURE_ENABLE);
 589                         return rc;
 590                 }
 591
 592                 /* Enable Transport Stream */
 593                 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 594                                            EM2874_TS1_CAPTURE_ENABLE,
 595                                            EM2874_TS1_CAPTURE_ENABLE);
 596                 return rc;
 597         }
 598
 599
 600         /* FIXME: which is the best order? */
 601         /* video registers are sampled by VREF */
 602         rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
 603                                    start ? 0x10 : 0x00, 0x10);
 604         if (rc < 0)
 605                 return rc;
 606
 607         if (!start) {
 608                 /* disable video capture */
 609                 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
 610                 return rc;
 611         }
 612
 613         /* enable video capture */
 614         rc = em28xx_write_reg(dev, 0x48, 0x00);
 615
 616         if (dev->mode == EM28XX_ANALOG_MODE)
 617                 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
 618         else
 619                 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
 620
 621         msleep(6);
 622
 623         return rc;
 624 }
 625
 626 int em28xx_set_outfmt(struct em28xx *dev)
 627 {
 628         int ret;
 629
 630         ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
 631                                     dev->format->reg | 0x20, 0x3f);
 632         if (ret < 0)
 633                 return ret;
 634
 635         ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x10);
 636         if (ret < 0)
 637                 return ret;
 638
 639         return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, 0x11);
 640 }
 641
 642 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
 643                                   u8 ymin, u8 ymax)
 644 {
 645         em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
 646                         xmin, ymin, xmax, ymax);
 647
 648         em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
 649         em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
 650         em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
 651         return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
 652 }
 653
 654 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
 655                                    u16 width, u16 height)
 656 {
 657         u8 cwidth = width;
 658         u8 cheight = height;
 659         u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
 660
 661         em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
 662                         (width | (overflow & 2) << 7),
 663                         (height | (overflow & 1) << 8));
 664
 665         em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
 666         em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
 667         em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
 668         em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
 669         return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
 670 }
 671
 672 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
 673 {
 674         u8 mode;
 675         /* the em2800 scaler only supports scaling down to 50% */
 676         if (dev->board.is_em2800)
 677                 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
 678         else {
 679                 u8 buf[2];
 680                 buf[0] = h;
 681                 buf[1] = h >> 8;
 682                 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
 683                 buf[0] = v;
 684                 buf[1] = v >> 8;
 685                 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
 686                 /* it seems that both H and V scalers must be active
 687                    to work correctly */
 688                 mode = (h || v)? 0x30: 0x00;
 689         }
 690         return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
 691 }
 692
 693 /* FIXME: this only function read values from dev */
 694 int em28xx_resolution_set(struct em28xx *dev)
 695 {
 696         int width, height;
 697         width = norm_maxw(dev);
 698         height = norm_maxh(dev) >> 1;
 699
 700         em28xx_set_outfmt(dev);
 701         em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
 702         em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
 703         return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
 704 }
 705
 706 int em28xx_set_alternate(struct em28xx *dev)
 707 {
 708         int errCode, prev_alt = dev->alt;
 709         int i;
 710         unsigned int min_pkt_size = dev->width * 2 + 4;
 711
 712         /* When image size is bigger than a certain value,
 713            the frame size should be increased, otherwise, only
 714            green screen will be received.
 715          */
 716         if (dev->width * 2 * dev->height > 720 * 240 * 2)
 717                 min_pkt_size *= 2;
 718
 719         for (i = 0; i < dev->num_alt; i++) {
 720                 /* stop when the selected alt setting offers enough bandwidth */
 721                 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
 722                         dev->alt = i;
 723                         break;
 724                 /* otherwise make sure that we end up with the maximum bandwidth
 725                    because the min_pkt_size equation might be wrong...
 726                 */
 727                 } else if (dev->alt_max_pkt_size[i] >
 728                            dev->alt_max_pkt_size[dev->alt])
 729                         dev->alt = i;
 730         }
 731
 732         if (dev->alt != prev_alt) {
 733                 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
 734                                 min_pkt_size, dev->alt);
 735                 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
 736                 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
 737                                dev->alt, dev->max_pkt_size);
 738                 errCode = usb_set_interface(dev->udev, 0, dev->alt);
 739                 if (errCode < 0) {
 740                         em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
 741                                         dev->alt, errCode);
 742                         return errCode;
 743                 }
 744         }
 745         return 0;
 746 }
 747
 748 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
 749 {
 750         int rc = 0;
 751
 752         if (!gpio)
 753                 return rc;
 754
 755         if (dev->mode != EM28XX_SUSPEND) {
 756                 em28xx_write_reg(dev, 0x48, 0x00);
 757                 if (dev->mode == EM28XX_ANALOG_MODE)
 758                         em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
 759                 else
 760                         em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
 761                 msleep(6);
 762         }
 763
 764         /* Send GPIO reset sequences specified at board entry */
 765         while (gpio->sleep >= 0) {
 766                 if (gpio->reg >= 0) {
 767                         rc = em28xx_write_reg_bits(dev,
 768                                                    gpio->reg,
 769                                                    gpio->val,
 770                                                    gpio->mask);
 771                         if (rc < 0)
 772                                 return rc;
 773                 }
 774                 if (gpio->sleep > 0)
 775                         msleep(gpio->sleep);
 776
 777                 gpio++;
 778         }
 779         return rc;
 780 }
 781
 782 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
 783 {
 784         if (dev->mode == set_mode)
 785                 return 0;
 786
 787         if (set_mode == EM28XX_SUSPEND) {
 788                 dev->mode = set_mode;
 789
 790                 /* FIXME: add suspend support for ac97 */
 791
 792                 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
 793         }
 794
 795         dev->mode = set_mode;
 796
 797         if (dev->mode == EM28XX_DIGITAL_MODE)
 798                 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
 799         else
 800                 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
 801 }
 802 EXPORT_SYMBOL_GPL(em28xx_set_mode);
 803
 804 /* ------------------------------------------------------------------
 805         URB control
 806    ------------------------------------------------------------------*/
 807
 808 /*
 809  * IRQ callback, called by URB callback
 810  */
 811 static void em28xx_irq_callback(struct urb *urb)
 812 {
 813         struct em28xx_dmaqueue  *dma_q = urb->context;
 814         struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
 815         int rc, i;
 816
 817         /* Copy data from URB */
 818         spin_lock(&dev->slock);
 819         rc = dev->isoc_ctl.isoc_copy(dev, urb);
 820         spin_unlock(&dev->slock);
 821
 822         /* Reset urb buffers */
 823         for (i = 0; i < urb->number_of_packets; i++) {
 824                 urb->iso_frame_desc[i].status = 0;
 825                 urb->iso_frame_desc[i].actual_length = 0;
 826         }
 827         urb->status = 0;
 828
 829         urb->status = usb_submit_urb(urb, GFP_ATOMIC);
 830         if (urb->status) {
 831                 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
 832                                urb->status);
 833         }
 834 }
 835
 836 /*
 837  * Stop and Deallocate URBs
 838  */
 839 void em28xx_uninit_isoc(struct em28xx *dev)
 840 {
 841         struct urb *urb;
 842         int i;
 843
 844         em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
 845
 846         dev->isoc_ctl.nfields = -1;
 847         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 848                 urb = dev->isoc_ctl.urb[i];
 849                 if (urb) {
 850                         usb_kill_urb(urb);
 851                         usb_unlink_urb(urb);
 852                         if (dev->isoc_ctl.transfer_buffer[i]) {
 853                                 usb_buffer_free(dev->udev,
 854                                         urb->transfer_buffer_length,
 855                                         dev->isoc_ctl.transfer_buffer[i],
 856                                         urb->transfer_dma);
 857                         }
 858                         usb_free_urb(urb);
 859                         dev->isoc_ctl.urb[i] = NULL;
 860                 }
 861                 dev->isoc_ctl.transfer_buffer[i] = NULL;
 862         }
 863
 864         kfree(dev->isoc_ctl.urb);
 865         kfree(dev->isoc_ctl.transfer_buffer);
 866
 867         dev->isoc_ctl.urb = NULL;
 868         dev->isoc_ctl.transfer_buffer = NULL;
 869         dev->isoc_ctl.num_bufs = 0;
 870
 871         em28xx_capture_start(dev, 0);
 872 }
 873 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
 874
 875 /*
 876  * Allocate URBs and start IRQ
 877  */
 878 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
 879                      int num_bufs, int max_pkt_size,
 880                      int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
 881 {
 882         struct em28xx_dmaqueue *dma_q = &dev->vidq;
 883         int i;
 884         int sb_size, pipe;
 885         struct urb *urb;
 886         int j, k;
 887         int rc;
 888
 889         em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
 890
 891         /* De-allocates all pending stuff */
 892         em28xx_uninit_isoc(dev);
 893
 894         dev->isoc_ctl.isoc_copy = isoc_copy;
 895         dev->isoc_ctl.num_bufs = num_bufs;
 896
 897         dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs,  GFP_KERNEL);
 898         if (!dev->isoc_ctl.urb) {
 899                 em28xx_errdev("cannot alloc memory for usb buffers\n");
 900                 return -ENOMEM;
 901         }
 902
 903         dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
 904                                               GFP_KERNEL);
 905         if (!dev->isoc_ctl.transfer_buffer) {
 906                 em28xx_errdev("cannot allocate memory for usbtransfer\n");
 907                 kfree(dev->isoc_ctl.urb);
 908                 return -ENOMEM;
 909         }
 910
 911         dev->isoc_ctl.max_pkt_size = max_pkt_size;
 912         dev->isoc_ctl.buf = NULL;
 913
 914         sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
 915
 916         /* allocate urbs and transfer buffers */
 917         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 918                 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
 919                 if (!urb) {
 920                         em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
 921                         em28xx_uninit_isoc(dev);
 922                         return -ENOMEM;
 923                 }
 924                 dev->isoc_ctl.urb[i] = urb;
 925
 926                 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
 927                         sb_size, GFP_KERNEL, &urb->transfer_dma);
 928                 if (!dev->isoc_ctl.transfer_buffer[i]) {
 929                         em28xx_err("unable to allocate %i bytes for transfer"
 930                                         " buffer %i%s\n",
 931                                         sb_size, i,
 932                                         in_interrupt()?" while in int":"");
 933                         em28xx_uninit_isoc(dev);
 934                         return -ENOMEM;
 935                 }
 936                 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
 937
 938                 /* FIXME: this is a hack - should be
 939                         'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
 940                         should also be using 'desc.bInterval'
 941                  */
 942                 pipe = usb_rcvisocpipe(dev->udev,
 943                         dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
 944
 945                 usb_fill_int_urb(urb, dev->udev, pipe,
 946                                  dev->isoc_ctl.transfer_buffer[i], sb_size,
 947                                  em28xx_irq_callback, dma_q, 1);
 948
 949                 urb->number_of_packets = max_packets;
 950                 urb->transfer_flags = URB_ISO_ASAP;
 951
 952                 k = 0;
 953                 for (j = 0; j < max_packets; j++) {
 954                         urb->iso_frame_desc[j].offset = k;
 955                         urb->iso_frame_desc[j].length =
 956                                                 dev->isoc_ctl.max_pkt_size;
 957                         k += dev->isoc_ctl.max_pkt_size;
 958                 }
 959         }
 960
 961         init_waitqueue_head(&dma_q->wq);
 962
 963         em28xx_capture_start(dev, 1);
 964
 965         /* submit urbs and enables IRQ */
 966         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 967                 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
 968                 if (rc) {
 969                         em28xx_err("submit of urb %i failed (error=%i)\n", i,
 970                                    rc);
 971                         em28xx_uninit_isoc(dev);
 972                         return rc;
 973                 }
 974         }
 975
 976         return 0;
 977 }
 978 EXPORT_SYMBOL_GPL(em28xx_init_isoc);
 979
 980 /*
 981  * em28xx_wake_i2c()
 982  * configure i2c attached devices
 983  */
 984 void em28xx_wake_i2c(struct em28xx *dev)
 985 {
 986         struct v4l2_routing route;
 987         int zero = 0;
 988
 989         route.input = INPUT(dev->ctl_input)->vmux;
 990         route.output = 0;
 991         em28xx_i2c_call_clients(dev, VIDIOC_INT_RESET, &zero);
 992         em28xx_i2c_call_clients(dev, VIDIOC_INT_S_VIDEO_ROUTING, &route);
 993         em28xx_i2c_call_clients(dev, VIDIOC_STREAMON, NULL);
 994 }
 995
 996 /*
 997  * Device control list
 998  */
 999
1000 static LIST_HEAD(em28xx_devlist);
1001 static DEFINE_MUTEX(em28xx_devlist_mutex);
1002
1003 struct em28xx *em28xx_get_device(int minor,
1004                                  enum v4l2_buf_type *fh_type,
1005                                  int *has_radio)
1006 {
1007         struct em28xx *h, *dev = NULL;
1008
1009         *fh_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1010         *has_radio = 0;
1011
1012         mutex_lock(&em28xx_devlist_mutex);
1013         list_for_each_entry(h, &em28xx_devlist, devlist) {
1014                 if (h->vdev->minor == minor)
1015                         dev = h;
1016                 if (h->vbi_dev->minor == minor) {
1017                         dev = h;
1018                         *fh_type = V4L2_BUF_TYPE_VBI_CAPTURE;
1019                 }
1020                 if (h->radio_dev &&
1021                     h->radio_dev->minor == minor) {
1022                         dev = h;
1023                         *has_radio = 1;
1024                 }
1025         }
1026         mutex_unlock(&em28xx_devlist_mutex);
1027
1028         return dev;
1029 }
1030
1031 /*
1032  * em28xx_realease_resources()
1033  * unregisters the v4l2,i2c and usb devices
1034  * called when the device gets disconected or at module unload
1035 */
1036 void em28xx_remove_from_devlist(struct em28xx *dev)
1037 {
1038         mutex_lock(&em28xx_devlist_mutex);
1039         list_del(&dev->devlist);
1040         mutex_unlock(&em28xx_devlist_mutex);
1041 };
1042
1043 void em28xx_add_into_devlist(struct em28xx *dev)
1044 {
1045         mutex_lock(&em28xx_devlist_mutex);
1046         list_add_tail(&dev->devlist, &em28xx_devlist);
1047         mutex_unlock(&em28xx_devlist_mutex);
1048 };
1049
1050 /*
1051  * Extension interface
1052  */
1053
1054 static LIST_HEAD(em28xx_extension_devlist);
1055 static DEFINE_MUTEX(em28xx_extension_devlist_lock);
1056
1057 int em28xx_register_extension(struct em28xx_ops *ops)
1058 {
1059         struct em28xx *dev = NULL;
1060
1061         mutex_lock(&em28xx_devlist_mutex);
1062         mutex_lock(&em28xx_extension_devlist_lock);
1063         list_add_tail(&ops->next, &em28xx_extension_devlist);
1064         list_for_each_entry(dev, &em28xx_devlist, devlist) {
1065                 if (dev)
1066                         ops->init(dev);
1067         }
1068         printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1069         mutex_unlock(&em28xx_extension_devlist_lock);
1070         mutex_unlock(&em28xx_devlist_mutex);
1071         return 0;
1072 }
1073 EXPORT_SYMBOL(em28xx_register_extension);
1074
1075 void em28xx_unregister_extension(struct em28xx_ops *ops)
1076 {
1077         struct em28xx *dev = NULL;
1078
1079         mutex_lock(&em28xx_devlist_mutex);
1080         list_for_each_entry(dev, &em28xx_devlist, devlist) {
1081                 if (dev)
1082                         ops->fini(dev);
1083         }
1084
1085         mutex_lock(&em28xx_extension_devlist_lock);
1086         printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1087         list_del(&ops->next);
1088         mutex_unlock(&em28xx_extension_devlist_lock);
1089         mutex_unlock(&em28xx_devlist_mutex);
1090 }
1091 EXPORT_SYMBOL(em28xx_unregister_extension);
1092
1093 void em28xx_init_extension(struct em28xx *dev)
1094 {
1095         struct em28xx_ops *ops = NULL;
1096
1097         mutex_lock(&em28xx_extension_devlist_lock);
1098         if (!list_empty(&em28xx_extension_devlist)) {
1099                 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1100                         if (ops->init)
1101                                 ops->init(dev);
1102                 }
1103         }
1104         mutex_unlock(&em28xx_extension_devlist_lock);
1105 }
1106
1107 void em28xx_close_extension(struct em28xx *dev)
1108 {
1109         struct em28xx_ops *ops = NULL;
1110
1111         mutex_lock(&em28xx_extension_devlist_lock);
1112         if (!list_empty(&em28xx_extension_devlist)) {
1113                 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1114                         if (ops->fini)
1115                                 ops->fini(dev);
1116                 }
1117         }
1118         mutex_unlock(&em28xx_extension_devlist_lock);
1119 }