2 * Atmel MACB Ethernet Controller driver
4 * Copyright (C) 2004-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/slab.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/platform_device.h>
22 #include <linux/phy.h>
24 #include <asm/arch/board.h>
25 #include <asm/arch/cpu.h>
29 #define RX_BUFFER_SIZE 128
30 #define RX_RING_SIZE 512
31 #define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE)
33 /* Make the IP header word-aligned (the ethernet header is 14 bytes) */
36 #define TX_RING_SIZE 128
37 #define DEF_TX_RING_PENDING (TX_RING_SIZE - 1)
38 #define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE)
40 #define TX_RING_GAP(bp) \
41 (TX_RING_SIZE - (bp)->tx_pending)
42 #define TX_BUFFS_AVAIL(bp) \
43 (((bp)->tx_tail <= (bp)->tx_head) ? \
44 (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \
45 (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp))
46 #define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1))
48 #define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1))
50 /* minimum number of free TX descriptors before waking up TX process */
51 #define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
53 #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
56 static void __macb_set_hwaddr(struct macb
*bp
)
61 bottom
= cpu_to_le32(*((u32
*)bp
->dev
->dev_addr
));
62 macb_writel(bp
, SA1B
, bottom
);
63 top
= cpu_to_le16(*((u16
*)(bp
->dev
->dev_addr
+ 4)));
64 macb_writel(bp
, SA1T
, top
);
67 static void __init
macb_get_hwaddr(struct macb
*bp
)
73 bottom
= macb_readl(bp
, SA1B
);
74 top
= macb_readl(bp
, SA1T
);
76 addr
[0] = bottom
& 0xff;
77 addr
[1] = (bottom
>> 8) & 0xff;
78 addr
[2] = (bottom
>> 16) & 0xff;
79 addr
[3] = (bottom
>> 24) & 0xff;
81 addr
[5] = (top
>> 8) & 0xff;
83 if (is_valid_ether_addr(addr
))
84 memcpy(bp
->dev
->dev_addr
, addr
, sizeof(addr
));
87 static int macb_mdio_read(struct mii_bus
*bus
, int mii_id
, int regnum
)
89 struct macb
*bp
= bus
->priv
;
92 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
93 | MACB_BF(RW
, MACB_MAN_READ
)
94 | MACB_BF(PHYA
, mii_id
)
95 | MACB_BF(REGA
, regnum
)
96 | MACB_BF(CODE
, MACB_MAN_CODE
)));
98 /* wait for end of transfer */
99 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
102 value
= MACB_BFEXT(DATA
, macb_readl(bp
, MAN
));
107 static int macb_mdio_write(struct mii_bus
*bus
, int mii_id
, int regnum
,
110 struct macb
*bp
= bus
->priv
;
112 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
113 | MACB_BF(RW
, MACB_MAN_WRITE
)
114 | MACB_BF(PHYA
, mii_id
)
115 | MACB_BF(REGA
, regnum
)
116 | MACB_BF(CODE
, MACB_MAN_CODE
)
117 | MACB_BF(DATA
, value
)));
119 /* wait for end of transfer */
120 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
126 static int macb_mdio_reset(struct mii_bus
*bus
)
131 static void macb_handle_link_change(struct net_device
*dev
)
133 struct macb
*bp
= netdev_priv(dev
);
134 struct phy_device
*phydev
= bp
->phy_dev
;
137 int status_change
= 0;
139 spin_lock_irqsave(&bp
->lock
, flags
);
142 if ((bp
->speed
!= phydev
->speed
) ||
143 (bp
->duplex
!= phydev
->duplex
)) {
146 reg
= macb_readl(bp
, NCFGR
);
147 reg
&= ~(MACB_BIT(SPD
) | MACB_BIT(FD
));
152 reg
|= MACB_BIT(SPD
);
154 macb_writel(bp
, NCFGR
, reg
);
156 bp
->speed
= phydev
->speed
;
157 bp
->duplex
= phydev
->duplex
;
162 if (phydev
->link
!= bp
->link
) {
169 bp
->link
= phydev
->link
;
174 spin_unlock_irqrestore(&bp
->lock
, flags
);
178 printk(KERN_INFO
"%s: link up (%d/%s)\n",
179 dev
->name
, phydev
->speed
,
180 DUPLEX_FULL
== phydev
->duplex
? "Full":"Half");
182 printk(KERN_INFO
"%s: link down\n", dev
->name
);
186 /* based on au1000_eth. c*/
187 static int macb_mii_probe(struct net_device
*dev
)
189 struct macb
*bp
= netdev_priv(dev
);
190 struct phy_device
*phydev
= NULL
;
191 struct eth_platform_data
*pdata
;
194 /* find the first phy */
195 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
196 if (bp
->mii_bus
.phy_map
[phy_addr
]) {
197 phydev
= bp
->mii_bus
.phy_map
[phy_addr
];
203 printk (KERN_ERR
"%s: no PHY found\n", dev
->name
);
207 pdata
= bp
->pdev
->dev
.platform_data
;
208 /* TODO : add pin_irq */
210 /* attach the mac to the phy */
211 if (pdata
&& pdata
->is_rmii
) {
212 phydev
= phy_connect(dev
, phydev
->dev
.bus_id
,
213 &macb_handle_link_change
, 0, PHY_INTERFACE_MODE_RMII
);
215 phydev
= phy_connect(dev
, phydev
->dev
.bus_id
,
216 &macb_handle_link_change
, 0, PHY_INTERFACE_MODE_MII
);
219 if (IS_ERR(phydev
)) {
220 printk(KERN_ERR
"%s: Could not attach to PHY\n", dev
->name
);
221 return PTR_ERR(phydev
);
224 /* mask with MAC supported features */
225 phydev
->supported
&= PHY_BASIC_FEATURES
;
227 phydev
->advertising
= phydev
->supported
;
232 bp
->phy_dev
= phydev
;
237 static int macb_mii_init(struct macb
*bp
)
239 struct eth_platform_data
*pdata
;
242 /* Enable managment port */
243 macb_writel(bp
, NCR
, MACB_BIT(MPE
));
245 bp
->mii_bus
.name
= "MACB_mii_bus",
246 bp
->mii_bus
.read
= &macb_mdio_read
,
247 bp
->mii_bus
.write
= &macb_mdio_write
,
248 bp
->mii_bus
.reset
= &macb_mdio_reset
,
249 bp
->mii_bus
.id
= bp
->pdev
->id
,
250 bp
->mii_bus
.priv
= bp
,
251 bp
->mii_bus
.dev
= &bp
->dev
->dev
;
252 pdata
= bp
->pdev
->dev
.platform_data
;
255 bp
->mii_bus
.phy_mask
= pdata
->phy_mask
;
257 bp
->mii_bus
.irq
= kmalloc(sizeof(int)*PHY_MAX_ADDR
, GFP_KERNEL
);
258 if (!bp
->mii_bus
.irq
) {
263 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
264 bp
->mii_bus
.irq
[i
] = PHY_POLL
;
266 platform_set_drvdata(bp
->dev
, &bp
->mii_bus
);
268 if (mdiobus_register(&bp
->mii_bus
))
269 goto err_out_free_mdio_irq
;
271 if (macb_mii_probe(bp
->dev
) != 0) {
272 goto err_out_unregister_bus
;
277 err_out_unregister_bus
:
278 mdiobus_unregister(&bp
->mii_bus
);
279 err_out_free_mdio_irq
:
280 kfree(bp
->mii_bus
.irq
);
285 static void macb_update_stats(struct macb
*bp
)
287 u32 __iomem
*reg
= bp
->regs
+ MACB_PFR
;
288 u32
*p
= &bp
->hw_stats
.rx_pause_frames
;
289 u32
*end
= &bp
->hw_stats
.tx_pause_frames
+ 1;
291 WARN_ON((unsigned long)(end
- p
- 1) != (MACB_TPF
- MACB_PFR
) / 4);
293 for(; p
< end
; p
++, reg
++)
294 *p
+= __raw_readl(reg
);
297 static void macb_tx(struct macb
*bp
)
303 status
= macb_readl(bp
, TSR
);
304 macb_writel(bp
, TSR
, status
);
306 dev_dbg(&bp
->pdev
->dev
, "macb_tx status = %02lx\n",
307 (unsigned long)status
);
309 if (status
& MACB_BIT(UND
)) {
311 printk(KERN_ERR
"%s: TX underrun, resetting buffers\n",
316 /*Mark all the buffer as used to avoid sending a lost buffer*/
317 for (i
= 0; i
< TX_RING_SIZE
; i
++)
318 bp
->tx_ring
[i
].ctrl
= MACB_BIT(TX_USED
);
320 /* free transmit buffer in upper layer*/
321 for (tail
= bp
->tx_tail
; tail
!= head
; tail
= NEXT_TX(tail
)) {
322 struct ring_info
*rp
= &bp
->tx_skb
[tail
];
323 struct sk_buff
*skb
= rp
->skb
;
329 dma_unmap_single(&bp
->pdev
->dev
, rp
->mapping
, skb
->len
,
332 dev_kfree_skb_irq(skb
);
335 bp
->tx_head
= bp
->tx_tail
= 0;
338 if (!(status
& MACB_BIT(COMP
)))
340 * This may happen when a buffer becomes complete
341 * between reading the ISR and scanning the
342 * descriptors. Nothing to worry about.
347 for (tail
= bp
->tx_tail
; tail
!= head
; tail
= NEXT_TX(tail
)) {
348 struct ring_info
*rp
= &bp
->tx_skb
[tail
];
349 struct sk_buff
*skb
= rp
->skb
;
355 bufstat
= bp
->tx_ring
[tail
].ctrl
;
357 if (!(bufstat
& MACB_BIT(TX_USED
)))
360 dev_dbg(&bp
->pdev
->dev
, "skb %u (data %p) TX complete\n",
362 dma_unmap_single(&bp
->pdev
->dev
, rp
->mapping
, skb
->len
,
364 bp
->stats
.tx_packets
++;
365 bp
->stats
.tx_bytes
+= skb
->len
;
367 dev_kfree_skb_irq(skb
);
371 if (netif_queue_stopped(bp
->dev
) &&
372 TX_BUFFS_AVAIL(bp
) > MACB_TX_WAKEUP_THRESH
)
373 netif_wake_queue(bp
->dev
);
376 static int macb_rx_frame(struct macb
*bp
, unsigned int first_frag
,
377 unsigned int last_frag
)
381 unsigned int offset
= 0;
384 len
= MACB_BFEXT(RX_FRMLEN
, bp
->rx_ring
[last_frag
].ctrl
);
386 dev_dbg(&bp
->pdev
->dev
, "macb_rx_frame frags %u - %u (len %u)\n",
387 first_frag
, last_frag
, len
);
389 skb
= dev_alloc_skb(len
+ RX_OFFSET
);
391 bp
->stats
.rx_dropped
++;
392 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
393 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
394 if (frag
== last_frag
)
401 skb_reserve(skb
, RX_OFFSET
);
402 skb
->ip_summed
= CHECKSUM_NONE
;
405 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
406 unsigned int frag_len
= RX_BUFFER_SIZE
;
408 if (offset
+ frag_len
> len
) {
409 BUG_ON(frag
!= last_frag
);
410 frag_len
= len
- offset
;
412 skb_copy_to_linear_data_offset(skb
, offset
,
414 (RX_BUFFER_SIZE
* frag
)),
416 offset
+= RX_BUFFER_SIZE
;
417 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
420 if (frag
== last_frag
)
424 skb
->protocol
= eth_type_trans(skb
, bp
->dev
);
426 bp
->stats
.rx_packets
++;
427 bp
->stats
.rx_bytes
+= len
;
428 bp
->dev
->last_rx
= jiffies
;
429 dev_dbg(&bp
->pdev
->dev
, "received skb of length %u, csum: %08x\n",
430 skb
->len
, skb
->csum
);
431 netif_receive_skb(skb
);
436 /* Mark DMA descriptors from begin up to and not including end as unused */
437 static void discard_partial_frame(struct macb
*bp
, unsigned int begin
,
442 for (frag
= begin
; frag
!= end
; frag
= NEXT_RX(frag
))
443 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
447 * When this happens, the hardware stats registers for
448 * whatever caused this is updated, so we don't have to record
453 static int macb_rx(struct macb
*bp
, int budget
)
456 unsigned int tail
= bp
->rx_tail
;
459 for (; budget
> 0; tail
= NEXT_RX(tail
)) {
463 addr
= bp
->rx_ring
[tail
].addr
;
464 ctrl
= bp
->rx_ring
[tail
].ctrl
;
466 if (!(addr
& MACB_BIT(RX_USED
)))
469 if (ctrl
& MACB_BIT(RX_SOF
)) {
470 if (first_frag
!= -1)
471 discard_partial_frame(bp
, first_frag
, tail
);
475 if (ctrl
& MACB_BIT(RX_EOF
)) {
477 BUG_ON(first_frag
== -1);
479 dropped
= macb_rx_frame(bp
, first_frag
, tail
);
488 if (first_frag
!= -1)
489 bp
->rx_tail
= first_frag
;
496 static int macb_poll(struct napi_struct
*napi
, int budget
)
498 struct macb
*bp
= container_of(napi
, struct macb
, napi
);
499 struct net_device
*dev
= bp
->dev
;
503 status
= macb_readl(bp
, RSR
);
504 macb_writel(bp
, RSR
, status
);
509 * This may happen if an interrupt was pending before
510 * this function was called last time, and no packets
511 * have been received since.
513 netif_rx_complete(dev
, napi
);
517 dev_dbg(&bp
->pdev
->dev
, "poll: status = %08lx, budget = %d\n",
518 (unsigned long)status
, budget
);
520 if (!(status
& MACB_BIT(REC
))) {
521 dev_warn(&bp
->pdev
->dev
,
522 "No RX buffers complete, status = %02lx\n",
523 (unsigned long)status
);
524 netif_rx_complete(dev
, napi
);
528 work_done
= macb_rx(bp
, budget
);
529 if (work_done
< budget
)
530 netif_rx_complete(dev
, napi
);
533 * We've done what we can to clean the buffers. Make sure we
534 * get notified when new packets arrive.
537 macb_writel(bp
, IER
, MACB_RX_INT_FLAGS
);
539 /* TODO: Handle errors */
544 static irqreturn_t
macb_interrupt(int irq
, void *dev_id
)
546 struct net_device
*dev
= dev_id
;
547 struct macb
*bp
= netdev_priv(dev
);
550 status
= macb_readl(bp
, ISR
);
552 if (unlikely(!status
))
555 spin_lock(&bp
->lock
);
558 /* close possible race with dev_close */
559 if (unlikely(!netif_running(dev
))) {
560 macb_writel(bp
, IDR
, ~0UL);
564 if (status
& MACB_RX_INT_FLAGS
) {
565 if (netif_rx_schedule_prep(dev
, &bp
->napi
)) {
567 * There's no point taking any more interrupts
568 * until we have processed the buffers
570 macb_writel(bp
, IDR
, MACB_RX_INT_FLAGS
);
571 dev_dbg(&bp
->pdev
->dev
,
572 "scheduling RX softirq\n");
573 __netif_rx_schedule(dev
, &bp
->napi
);
577 if (status
& (MACB_BIT(TCOMP
) | MACB_BIT(ISR_TUND
)))
581 * Link change detection isn't possible with RMII, so we'll
582 * add that if/when we get our hands on a full-blown MII PHY.
585 if (status
& MACB_BIT(HRESP
)) {
587 * TODO: Reset the hardware, and maybe move the printk
588 * to a lower-priority context as well (work queue?)
590 printk(KERN_ERR
"%s: DMA bus error: HRESP not OK\n",
594 status
= macb_readl(bp
, ISR
);
597 spin_unlock(&bp
->lock
);
602 static int macb_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
604 struct macb
*bp
= netdev_priv(dev
);
606 unsigned int len
, entry
;
611 dev_dbg(&bp
->pdev
->dev
,
612 "start_xmit: len %u head %p data %p tail %p end %p\n",
613 skb
->len
, skb
->head
, skb
->data
,
614 skb_tail_pointer(skb
), skb_end_pointer(skb
));
615 dev_dbg(&bp
->pdev
->dev
,
617 for (i
= 0; i
< 16; i
++)
618 printk(" %02x", (unsigned int)skb
->data
[i
]);
623 spin_lock_irq(&bp
->lock
);
625 /* This is a hard error, log it. */
626 if (TX_BUFFS_AVAIL(bp
) < 1) {
627 netif_stop_queue(dev
);
628 spin_unlock_irq(&bp
->lock
);
629 dev_err(&bp
->pdev
->dev
,
630 "BUG! Tx Ring full when queue awake!\n");
631 dev_dbg(&bp
->pdev
->dev
, "tx_head = %u, tx_tail = %u\n",
632 bp
->tx_head
, bp
->tx_tail
);
637 dev_dbg(&bp
->pdev
->dev
, "Allocated ring entry %u\n", entry
);
638 mapping
= dma_map_single(&bp
->pdev
->dev
, skb
->data
,
640 bp
->tx_skb
[entry
].skb
= skb
;
641 bp
->tx_skb
[entry
].mapping
= mapping
;
642 dev_dbg(&bp
->pdev
->dev
, "Mapped skb data %p to DMA addr %08lx\n",
643 skb
->data
, (unsigned long)mapping
);
645 ctrl
= MACB_BF(TX_FRMLEN
, len
);
646 ctrl
|= MACB_BIT(TX_LAST
);
647 if (entry
== (TX_RING_SIZE
- 1))
648 ctrl
|= MACB_BIT(TX_WRAP
);
650 bp
->tx_ring
[entry
].addr
= mapping
;
651 bp
->tx_ring
[entry
].ctrl
= ctrl
;
654 entry
= NEXT_TX(entry
);
657 macb_writel(bp
, NCR
, macb_readl(bp
, NCR
) | MACB_BIT(TSTART
));
659 if (TX_BUFFS_AVAIL(bp
) < 1)
660 netif_stop_queue(dev
);
662 spin_unlock_irq(&bp
->lock
);
664 dev
->trans_start
= jiffies
;
669 static void macb_free_consistent(struct macb
*bp
)
676 dma_free_coherent(&bp
->pdev
->dev
, RX_RING_BYTES
,
677 bp
->rx_ring
, bp
->rx_ring_dma
);
681 dma_free_coherent(&bp
->pdev
->dev
, TX_RING_BYTES
,
682 bp
->tx_ring
, bp
->tx_ring_dma
);
685 if (bp
->rx_buffers
) {
686 dma_free_coherent(&bp
->pdev
->dev
,
687 RX_RING_SIZE
* RX_BUFFER_SIZE
,
688 bp
->rx_buffers
, bp
->rx_buffers_dma
);
689 bp
->rx_buffers
= NULL
;
693 static int macb_alloc_consistent(struct macb
*bp
)
697 size
= TX_RING_SIZE
* sizeof(struct ring_info
);
698 bp
->tx_skb
= kmalloc(size
, GFP_KERNEL
);
702 size
= RX_RING_BYTES
;
703 bp
->rx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
704 &bp
->rx_ring_dma
, GFP_KERNEL
);
707 dev_dbg(&bp
->pdev
->dev
,
708 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
709 size
, (unsigned long)bp
->rx_ring_dma
, bp
->rx_ring
);
711 size
= TX_RING_BYTES
;
712 bp
->tx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
713 &bp
->tx_ring_dma
, GFP_KERNEL
);
716 dev_dbg(&bp
->pdev
->dev
,
717 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
718 size
, (unsigned long)bp
->tx_ring_dma
, bp
->tx_ring
);
720 size
= RX_RING_SIZE
* RX_BUFFER_SIZE
;
721 bp
->rx_buffers
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
722 &bp
->rx_buffers_dma
, GFP_KERNEL
);
725 dev_dbg(&bp
->pdev
->dev
,
726 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
727 size
, (unsigned long)bp
->rx_buffers_dma
, bp
->rx_buffers
);
732 macb_free_consistent(bp
);
736 static void macb_init_rings(struct macb
*bp
)
741 addr
= bp
->rx_buffers_dma
;
742 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
743 bp
->rx_ring
[i
].addr
= addr
;
744 bp
->rx_ring
[i
].ctrl
= 0;
745 addr
+= RX_BUFFER_SIZE
;
747 bp
->rx_ring
[RX_RING_SIZE
- 1].addr
|= MACB_BIT(RX_WRAP
);
749 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
750 bp
->tx_ring
[i
].addr
= 0;
751 bp
->tx_ring
[i
].ctrl
= MACB_BIT(TX_USED
);
753 bp
->tx_ring
[TX_RING_SIZE
- 1].ctrl
|= MACB_BIT(TX_WRAP
);
755 bp
->rx_tail
= bp
->tx_head
= bp
->tx_tail
= 0;
758 static void macb_reset_hw(struct macb
*bp
)
760 /* Make sure we have the write buffer for ourselves */
764 * Disable RX and TX (XXX: Should we halt the transmission
767 macb_writel(bp
, NCR
, 0);
769 /* Clear the stats registers (XXX: Update stats first?) */
770 macb_writel(bp
, NCR
, MACB_BIT(CLRSTAT
));
772 /* Clear all status flags */
773 macb_writel(bp
, TSR
, ~0UL);
774 macb_writel(bp
, RSR
, ~0UL);
776 /* Disable all interrupts */
777 macb_writel(bp
, IDR
, ~0UL);
781 static void macb_init_hw(struct macb
*bp
)
786 __macb_set_hwaddr(bp
);
788 config
= macb_readl(bp
, NCFGR
) & MACB_BF(CLK
, -1L);
789 config
|= MACB_BIT(PAE
); /* PAuse Enable */
790 config
|= MACB_BIT(DRFCS
); /* Discard Rx FCS */
791 if (bp
->dev
->flags
& IFF_PROMISC
)
792 config
|= MACB_BIT(CAF
); /* Copy All Frames */
793 if (!(bp
->dev
->flags
& IFF_BROADCAST
))
794 config
|= MACB_BIT(NBC
); /* No BroadCast */
795 macb_writel(bp
, NCFGR
, config
);
797 /* Initialize TX and RX buffers */
798 macb_writel(bp
, RBQP
, bp
->rx_ring_dma
);
799 macb_writel(bp
, TBQP
, bp
->tx_ring_dma
);
801 /* Enable TX and RX */
802 macb_writel(bp
, NCR
, MACB_BIT(RE
) | MACB_BIT(TE
) | MACB_BIT(MPE
));
804 /* Enable interrupts */
805 macb_writel(bp
, IER
, (MACB_BIT(RCOMP
)
817 * The hash address register is 64 bits long and takes up two
818 * locations in the memory map. The least significant bits are stored
819 * in EMAC_HSL and the most significant bits in EMAC_HSH.
821 * The unicast hash enable and the multicast hash enable bits in the
822 * network configuration register enable the reception of hash matched
823 * frames. The destination address is reduced to a 6 bit index into
824 * the 64 bit hash register using the following hash function. The
825 * hash function is an exclusive or of every sixth bit of the
826 * destination address.
828 * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
829 * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
830 * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
831 * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
832 * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
833 * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
835 * da[0] represents the least significant bit of the first byte
836 * received, that is, the multicast/unicast indicator, and da[47]
837 * represents the most significant bit of the last byte received. If
838 * the hash index, hi[n], points to a bit that is set in the hash
839 * register then the frame will be matched according to whether the
840 * frame is multicast or unicast. A multicast match will be signalled
841 * if the multicast hash enable bit is set, da[0] is 1 and the hash
842 * index points to a bit set in the hash register. A unicast match
843 * will be signalled if the unicast hash enable bit is set, da[0] is 0
844 * and the hash index points to a bit set in the hash register. To
845 * receive all multicast frames, the hash register should be set with
846 * all ones and the multicast hash enable bit should be set in the
847 * network configuration register.
850 static inline int hash_bit_value(int bitnr
, __u8
*addr
)
852 if (addr
[bitnr
/ 8] & (1 << (bitnr
% 8)))
858 * Return the hash index value for the specified address.
860 static int hash_get_index(__u8
*addr
)
865 for (j
= 0; j
< 6; j
++) {
866 for (i
= 0, bitval
= 0; i
< 8; i
++)
867 bitval
^= hash_bit_value(i
*6 + j
, addr
);
869 hash_index
|= (bitval
<< j
);
876 * Add multicast addresses to the internal multicast-hash table.
878 static void macb_sethashtable(struct net_device
*dev
)
880 struct dev_mc_list
*curr
;
881 unsigned long mc_filter
[2];
882 unsigned int i
, bitnr
;
883 struct macb
*bp
= netdev_priv(dev
);
885 mc_filter
[0] = mc_filter
[1] = 0;
888 for (i
= 0; i
< dev
->mc_count
; i
++, curr
= curr
->next
) {
889 if (!curr
) break; /* unexpected end of list */
891 bitnr
= hash_get_index(curr
->dmi_addr
);
892 mc_filter
[bitnr
>> 5] |= 1 << (bitnr
& 31);
895 macb_writel(bp
, HRB
, mc_filter
[0]);
896 macb_writel(bp
, HRT
, mc_filter
[1]);
900 * Enable/Disable promiscuous and multicast modes.
902 static void macb_set_rx_mode(struct net_device
*dev
)
905 struct macb
*bp
= netdev_priv(dev
);
907 cfg
= macb_readl(bp
, NCFGR
);
909 if (dev
->flags
& IFF_PROMISC
)
910 /* Enable promiscuous mode */
911 cfg
|= MACB_BIT(CAF
);
912 else if (dev
->flags
& (~IFF_PROMISC
))
913 /* Disable promiscuous mode */
914 cfg
&= ~MACB_BIT(CAF
);
916 if (dev
->flags
& IFF_ALLMULTI
) {
917 /* Enable all multicast mode */
918 macb_writel(bp
, HRB
, -1);
919 macb_writel(bp
, HRT
, -1);
920 cfg
|= MACB_BIT(NCFGR_MTI
);
921 } else if (dev
->mc_count
> 0) {
922 /* Enable specific multicasts */
923 macb_sethashtable(dev
);
924 cfg
|= MACB_BIT(NCFGR_MTI
);
925 } else if (dev
->flags
& (~IFF_ALLMULTI
)) {
926 /* Disable all multicast mode */
927 macb_writel(bp
, HRB
, 0);
928 macb_writel(bp
, HRT
, 0);
929 cfg
&= ~MACB_BIT(NCFGR_MTI
);
932 macb_writel(bp
, NCFGR
, cfg
);
935 static int macb_open(struct net_device
*dev
)
937 struct macb
*bp
= netdev_priv(dev
);
940 dev_dbg(&bp
->pdev
->dev
, "open\n");
942 /* if the phy is not yet register, retry later*/
946 if (!is_valid_ether_addr(dev
->dev_addr
))
947 return -EADDRNOTAVAIL
;
949 err
= macb_alloc_consistent(bp
);
952 "%s: Unable to allocate DMA memory (error %d)\n",
957 napi_enable(&bp
->napi
);
962 /* schedule a link state check */
963 phy_start(bp
->phy_dev
);
965 netif_start_queue(dev
);
970 static int macb_close(struct net_device
*dev
)
972 struct macb
*bp
= netdev_priv(dev
);
975 netif_stop_queue(dev
);
976 napi_disable(&bp
->napi
);
979 phy_stop(bp
->phy_dev
);
981 spin_lock_irqsave(&bp
->lock
, flags
);
983 netif_carrier_off(dev
);
984 spin_unlock_irqrestore(&bp
->lock
, flags
);
986 macb_free_consistent(bp
);
991 static struct net_device_stats
*macb_get_stats(struct net_device
*dev
)
993 struct macb
*bp
= netdev_priv(dev
);
994 struct net_device_stats
*nstat
= &bp
->stats
;
995 struct macb_stats
*hwstat
= &bp
->hw_stats
;
997 /* read stats from hardware */
998 macb_update_stats(bp
);
1000 /* Convert HW stats into netdevice stats */
1001 nstat
->rx_errors
= (hwstat
->rx_fcs_errors
+
1002 hwstat
->rx_align_errors
+
1003 hwstat
->rx_resource_errors
+
1004 hwstat
->rx_overruns
+
1005 hwstat
->rx_oversize_pkts
+
1006 hwstat
->rx_jabbers
+
1007 hwstat
->rx_undersize_pkts
+
1008 hwstat
->sqe_test_errors
+
1009 hwstat
->rx_length_mismatch
);
1010 nstat
->tx_errors
= (hwstat
->tx_late_cols
+
1011 hwstat
->tx_excessive_cols
+
1012 hwstat
->tx_underruns
+
1013 hwstat
->tx_carrier_errors
);
1014 nstat
->collisions
= (hwstat
->tx_single_cols
+
1015 hwstat
->tx_multiple_cols
+
1016 hwstat
->tx_excessive_cols
);
1017 nstat
->rx_length_errors
= (hwstat
->rx_oversize_pkts
+
1018 hwstat
->rx_jabbers
+
1019 hwstat
->rx_undersize_pkts
+
1020 hwstat
->rx_length_mismatch
);
1021 nstat
->rx_over_errors
= hwstat
->rx_resource_errors
;
1022 nstat
->rx_crc_errors
= hwstat
->rx_fcs_errors
;
1023 nstat
->rx_frame_errors
= hwstat
->rx_align_errors
;
1024 nstat
->rx_fifo_errors
= hwstat
->rx_overruns
;
1025 /* XXX: What does "missed" mean? */
1026 nstat
->tx_aborted_errors
= hwstat
->tx_excessive_cols
;
1027 nstat
->tx_carrier_errors
= hwstat
->tx_carrier_errors
;
1028 nstat
->tx_fifo_errors
= hwstat
->tx_underruns
;
1029 /* Don't know about heartbeat or window errors... */
1034 static int macb_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1036 struct macb
*bp
= netdev_priv(dev
);
1037 struct phy_device
*phydev
= bp
->phy_dev
;
1042 return phy_ethtool_gset(phydev
, cmd
);
1045 static int macb_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1047 struct macb
*bp
= netdev_priv(dev
);
1048 struct phy_device
*phydev
= bp
->phy_dev
;
1053 return phy_ethtool_sset(phydev
, cmd
);
1056 static void macb_get_drvinfo(struct net_device
*dev
,
1057 struct ethtool_drvinfo
*info
)
1059 struct macb
*bp
= netdev_priv(dev
);
1061 strcpy(info
->driver
, bp
->pdev
->dev
.driver
->name
);
1062 strcpy(info
->version
, "$Revision: 1.14 $");
1063 strcpy(info
->bus_info
, bp
->pdev
->dev
.bus_id
);
1066 static struct ethtool_ops macb_ethtool_ops
= {
1067 .get_settings
= macb_get_settings
,
1068 .set_settings
= macb_set_settings
,
1069 .get_drvinfo
= macb_get_drvinfo
,
1070 .get_link
= ethtool_op_get_link
,
1073 static int macb_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1075 struct macb
*bp
= netdev_priv(dev
);
1076 struct phy_device
*phydev
= bp
->phy_dev
;
1078 if (!netif_running(dev
))
1084 return phy_mii_ioctl(phydev
, if_mii(rq
), cmd
);
1087 static int __devinit
macb_probe(struct platform_device
*pdev
)
1089 struct eth_platform_data
*pdata
;
1090 struct resource
*regs
;
1091 struct net_device
*dev
;
1093 struct phy_device
*phydev
;
1094 unsigned long pclk_hz
;
1097 DECLARE_MAC_BUF(mac
);
1099 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1101 dev_err(&pdev
->dev
, "no mmio resource defined\n");
1106 dev
= alloc_etherdev(sizeof(*bp
));
1108 dev_err(&pdev
->dev
, "etherdev alloc failed, aborting.\n");
1112 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1114 /* TODO: Actually, we have some interesting features... */
1117 bp
= netdev_priv(dev
);
1121 spin_lock_init(&bp
->lock
);
1123 #if defined(CONFIG_ARCH_AT91)
1124 bp
->pclk
= clk_get(&pdev
->dev
, "macb_clk");
1125 if (IS_ERR(bp
->pclk
)) {
1126 dev_err(&pdev
->dev
, "failed to get macb_clk\n");
1127 goto err_out_free_dev
;
1129 clk_enable(bp
->pclk
);
1131 bp
->pclk
= clk_get(&pdev
->dev
, "pclk");
1132 if (IS_ERR(bp
->pclk
)) {
1133 dev_err(&pdev
->dev
, "failed to get pclk\n");
1134 goto err_out_free_dev
;
1136 bp
->hclk
= clk_get(&pdev
->dev
, "hclk");
1137 if (IS_ERR(bp
->hclk
)) {
1138 dev_err(&pdev
->dev
, "failed to get hclk\n");
1139 goto err_out_put_pclk
;
1142 clk_enable(bp
->pclk
);
1143 clk_enable(bp
->hclk
);
1146 bp
->regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
1148 dev_err(&pdev
->dev
, "failed to map registers, aborting.\n");
1150 goto err_out_disable_clocks
;
1153 dev
->irq
= platform_get_irq(pdev
, 0);
1154 err
= request_irq(dev
->irq
, macb_interrupt
, IRQF_SAMPLE_RANDOM
,
1158 "%s: Unable to request IRQ %d (error %d)\n",
1159 dev
->name
, dev
->irq
, err
);
1160 goto err_out_iounmap
;
1163 dev
->open
= macb_open
;
1164 dev
->stop
= macb_close
;
1165 dev
->hard_start_xmit
= macb_start_xmit
;
1166 dev
->get_stats
= macb_get_stats
;
1167 dev
->set_multicast_list
= macb_set_rx_mode
;
1168 dev
->do_ioctl
= macb_ioctl
;
1169 netif_napi_add(dev
, &bp
->napi
, macb_poll
, 64);
1170 dev
->ethtool_ops
= &macb_ethtool_ops
;
1172 dev
->base_addr
= regs
->start
;
1174 /* Set MII management clock divider */
1175 pclk_hz
= clk_get_rate(bp
->pclk
);
1176 if (pclk_hz
<= 20000000)
1177 config
= MACB_BF(CLK
, MACB_CLK_DIV8
);
1178 else if (pclk_hz
<= 40000000)
1179 config
= MACB_BF(CLK
, MACB_CLK_DIV16
);
1180 else if (pclk_hz
<= 80000000)
1181 config
= MACB_BF(CLK
, MACB_CLK_DIV32
);
1183 config
= MACB_BF(CLK
, MACB_CLK_DIV64
);
1184 macb_writel(bp
, NCFGR
, config
);
1186 macb_get_hwaddr(bp
);
1187 pdata
= pdev
->dev
.platform_data
;
1189 if (pdata
&& pdata
->is_rmii
)
1190 #if defined(CONFIG_ARCH_AT91)
1191 macb_writel(bp
, USRIO
, (MACB_BIT(RMII
) | MACB_BIT(CLKEN
)) );
1193 macb_writel(bp
, USRIO
, 0);
1196 #if defined(CONFIG_ARCH_AT91)
1197 macb_writel(bp
, USRIO
, MACB_BIT(CLKEN
));
1199 macb_writel(bp
, USRIO
, MACB_BIT(MII
));
1202 bp
->tx_pending
= DEF_TX_RING_PENDING
;
1204 err
= register_netdev(dev
);
1206 dev_err(&pdev
->dev
, "Cannot register net device, aborting.\n");
1207 goto err_out_free_irq
;
1210 if (macb_mii_init(bp
) != 0) {
1211 goto err_out_unregister_netdev
;
1214 platform_set_drvdata(pdev
, dev
);
1216 printk(KERN_INFO
"%s: Atmel MACB at 0x%08lx irq %d "
1218 dev
->name
, dev
->base_addr
, dev
->irq
,
1219 print_mac(mac
, dev
->dev_addr
));
1221 phydev
= bp
->phy_dev
;
1222 printk(KERN_INFO
"%s: attached PHY driver [%s] "
1223 "(mii_bus:phy_addr=%s, irq=%d)\n",
1224 dev
->name
, phydev
->drv
->name
, phydev
->dev
.bus_id
, phydev
->irq
);
1228 err_out_unregister_netdev
:
1229 unregister_netdev(dev
);
1231 free_irq(dev
->irq
, dev
);
1234 err_out_disable_clocks
:
1235 #ifndef CONFIG_ARCH_AT91
1236 clk_disable(bp
->hclk
);
1239 clk_disable(bp
->pclk
);
1240 #ifndef CONFIG_ARCH_AT91
1247 platform_set_drvdata(pdev
, NULL
);
1251 static int __devexit
macb_remove(struct platform_device
*pdev
)
1253 struct net_device
*dev
;
1256 dev
= platform_get_drvdata(pdev
);
1259 bp
= netdev_priv(dev
);
1260 mdiobus_unregister(&bp
->mii_bus
);
1261 kfree(bp
->mii_bus
.irq
);
1262 unregister_netdev(dev
);
1263 free_irq(dev
->irq
, dev
);
1265 #ifndef CONFIG_ARCH_AT91
1266 clk_disable(bp
->hclk
);
1269 clk_disable(bp
->pclk
);
1272 platform_set_drvdata(pdev
, NULL
);
1278 static struct platform_driver macb_driver
= {
1279 .probe
= macb_probe
,
1280 .remove
= __devexit_p(macb_remove
),
1286 static int __init
macb_init(void)
1288 return platform_driver_register(&macb_driver
);
1291 static void __exit
macb_exit(void)
1293 platform_driver_unregister(&macb_driver
);
1296 module_init(macb_init
);
1297 module_exit(macb_exit
);
1299 MODULE_LICENSE("GPL");
1300 MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
1301 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");