4 #include <linux/genhd.h>
11 #define MAX_PART (1 << NWD_SHIFT)
16 #define MAJOR_NR COMPAQ_CISS_MAJOR
19 typedef struct ctlr_info ctlr_info_t
;
21 struct access_method
{
22 void (*submit_command
)(ctlr_info_t
*h
, CommandList_struct
*c
);
23 void (*set_intr_mask
)(ctlr_info_t
*h
, unsigned long val
);
24 unsigned long (*fifo_full
)(ctlr_info_t
*h
);
25 unsigned long (*intr_pending
)(ctlr_info_t
*h
);
26 unsigned long (*command_completed
)(ctlr_info_t
*h
);
28 typedef struct _drive_info_struct
32 struct request_queue
*queue
;
46 char firm_ver
[4]; // Firmware version
51 unsigned long io_mem_addr
;
52 unsigned long io_mem_length
;
53 CfgTable_struct __iomem
*cfgtable
;
55 int interrupts_enabled
;
58 int commands_outstanding
;
59 int max_outstanding
; /* Debug */
62 int usage_count
; /* number of opens all all minor devices */
64 // information about each logical volume
65 drive_info_struct drv
[CISS_MAX_LUN
];
67 struct access_method access
;
69 /* queue and queue Info */
70 CommandList_struct
*reqQ
;
71 CommandList_struct
*cmpQ
;
73 unsigned int maxQsinceinit
;
77 //* pointers to command and error info pool */
78 CommandList_struct
*cmd_pool
;
79 dma_addr_t cmd_pool_dhandle
;
80 ErrorInfo_struct
*errinfo_pool
;
81 dma_addr_t errinfo_pool_dhandle
;
82 unsigned long *cmd_pool_bits
;
86 int busy_initializing
;
88 /* This element holds the zero based queue number of the last
89 * queue to be started. It is used for fairness.
93 // Disk structures we need to pass back
94 struct gendisk
*gendisk
[NWD
];
95 #ifdef CONFIG_CISS_SCSI_TAPE
96 void *scsi_ctlr
; /* ptr to structure containing scsi related stuff */
100 /* Defining the diffent access_menthods */
102 * Memory mapped FIFO interface (SMART 53xx cards)
104 #define SA5_DOORBELL 0x20
105 #define SA5_REQUEST_PORT_OFFSET 0x40
106 #define SA5_REPLY_INTR_MASK_OFFSET 0x34
107 #define SA5_REPLY_PORT_OFFSET 0x44
108 #define SA5_INTR_STATUS 0x30
109 #define SA5_SCRATCHPAD_OFFSET 0xB0
111 #define SA5_CTCFG_OFFSET 0xB4
112 #define SA5_CTMEM_OFFSET 0xB8
114 #define SA5_INTR_OFF 0x08
115 #define SA5B_INTR_OFF 0x04
116 #define SA5_INTR_PENDING 0x08
117 #define SA5B_INTR_PENDING 0x04
118 #define FIFO_EMPTY 0xffffffff
119 #define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
121 #define CISS_ERROR_BIT 0x02
123 #define CCISS_INTR_ON 1
124 #define CCISS_INTR_OFF 0
126 Send the command to the hardware
128 static void SA5_submit_command( ctlr_info_t
*h
, CommandList_struct
*c
)
131 printk("Sending %x - down to controller\n", c
->busaddr
);
132 #endif /* CCISS_DEBUG */
133 writel(c
->busaddr
, h
->vaddr
+ SA5_REQUEST_PORT_OFFSET
);
134 h
->commands_outstanding
++;
135 if ( h
->commands_outstanding
> h
->max_outstanding
)
136 h
->max_outstanding
= h
->commands_outstanding
;
140 * This card is the opposite of the other cards.
141 * 0 turns interrupts on...
142 * 0x08 turns them off...
144 static void SA5_intr_mask(ctlr_info_t
*h
, unsigned long val
)
147 { /* Turn interrupts on */
148 h
->interrupts_enabled
= 1;
149 writel(0, h
->vaddr
+ SA5_REPLY_INTR_MASK_OFFSET
);
150 } else /* Turn them off */
152 h
->interrupts_enabled
= 0;
153 writel( SA5_INTR_OFF
,
154 h
->vaddr
+ SA5_REPLY_INTR_MASK_OFFSET
);
158 * This card is the opposite of the other cards.
159 * 0 turns interrupts on...
160 * 0x04 turns them off...
162 static void SA5B_intr_mask(ctlr_info_t
*h
, unsigned long val
)
165 { /* Turn interrupts on */
166 h
->interrupts_enabled
= 1;
167 writel(0, h
->vaddr
+ SA5_REPLY_INTR_MASK_OFFSET
);
168 } else /* Turn them off */
170 h
->interrupts_enabled
= 0;
171 writel( SA5B_INTR_OFF
,
172 h
->vaddr
+ SA5_REPLY_INTR_MASK_OFFSET
);
176 * Returns true if fifo is full.
179 static unsigned long SA5_fifo_full(ctlr_info_t
*h
)
181 if( h
->commands_outstanding
>= h
->max_commands
)
188 * returns value read from hardware.
189 * returns FIFO_EMPTY if there is nothing to read
191 static unsigned long SA5_completed(ctlr_info_t
*h
)
193 unsigned long register_value
194 = readl(h
->vaddr
+ SA5_REPLY_PORT_OFFSET
);
195 if(register_value
!= FIFO_EMPTY
)
197 h
->commands_outstanding
--;
199 printk("cciss: Read %lx back from board\n", register_value
);
200 #endif /* CCISS_DEBUG */
205 printk("cciss: FIFO Empty read\n");
208 return ( register_value
);
212 * Returns true if an interrupt is pending..
214 static unsigned long SA5_intr_pending(ctlr_info_t
*h
)
216 unsigned long register_value
=
217 readl(h
->vaddr
+ SA5_INTR_STATUS
);
219 printk("cciss: intr_pending %lx\n", register_value
);
220 #endif /* CCISS_DEBUG */
221 if( register_value
& SA5_INTR_PENDING
)
227 * Returns true if an interrupt is pending..
229 static unsigned long SA5B_intr_pending(ctlr_info_t
*h
)
231 unsigned long register_value
=
232 readl(h
->vaddr
+ SA5_INTR_STATUS
);
234 printk("cciss: intr_pending %lx\n", register_value
);
235 #endif /* CCISS_DEBUG */
236 if( register_value
& SA5B_INTR_PENDING
)
242 static struct access_method SA5_access
= {
250 static struct access_method SA5B_access
= {
261 struct access_method
*access
;
264 #define CCISS_LOCK(i) (&hba[i]->lock)