x86: remove mach_apicdef.h
[linux-2.6/mini2440.git] / arch / x86 / include / asm / mach-default / mach_apic.h
blobb60b767d5be09726dc649539a66f98e5266a2321
1 #ifndef _ASM_X86_MACH_DEFAULT_MACH_APIC_H
2 #define _ASM_X86_MACH_DEFAULT_MACH_APIC_H
4 #ifdef CONFIG_X86_LOCAL_APIC
6 #include <asm/smp.h>
8 #define APIC_DFR_VALUE (APIC_DFR_FLAT)
10 static inline const struct cpumask *default_target_cpus(void)
12 #ifdef CONFIG_SMP
13 return cpu_online_mask;
14 #else
15 return cpumask_of(0);
16 #endif
19 #ifdef CONFIG_X86_64
20 #include <asm/genapic.h>
21 #define read_apic_id() (apic->get_apic_id(apic_read(APIC_ID)))
22 #define wakeup_secondary_cpu (apic->wakeup_cpu)
23 extern void default_setup_apic_routing(void);
24 #else
25 #define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
27 * Set up the logical destination ID.
29 * Intel recommends to set DFR, LDR and TPR before enabling
30 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
31 * document number 292116). So here it goes...
33 static inline void default_init_apic_ldr(void)
35 unsigned long val;
37 apic_write(APIC_DFR, APIC_DFR_VALUE);
38 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
39 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
40 apic_write(APIC_LDR, val);
43 static inline int default_apic_id_registered(void)
45 return physid_isset(read_apic_id(), phys_cpu_present_map);
48 static inline unsigned int
49 default_cpu_mask_to_apicid(const struct cpumask *cpumask)
51 return cpumask_bits(cpumask)[0];
54 static inline unsigned int
55 default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
56 const struct cpumask *andmask)
58 unsigned long mask1 = cpumask_bits(cpumask)[0];
59 unsigned long mask2 = cpumask_bits(andmask)[0];
60 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
62 return (unsigned int)(mask1 & mask2 & mask3);
65 static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
67 return cpuid_apic >> index_msb;
70 static inline void default_setup_apic_routing(void)
72 #ifdef CONFIG_X86_IO_APIC
73 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
74 "Flat", nr_ioapics);
75 #endif
78 static inline int default_apicid_to_node(int logical_apicid)
80 #ifdef CONFIG_SMP
81 return apicid_2_node[hard_smp_processor_id()];
82 #else
83 return 0;
84 #endif
87 #endif
89 static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
91 return physid_isset(apicid, bitmap);
94 static inline unsigned long default_check_apicid_present(int bit)
96 return physid_isset(bit, phys_cpu_present_map);
99 static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
101 return phys_map;
104 /* Mapping from cpu number to logical apicid */
105 static inline int default_cpu_to_logical_apicid(int cpu)
107 return 1 << cpu;
110 static inline int __default_cpu_present_to_apicid(int mps_cpu)
112 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
113 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
114 else
115 return BAD_APICID;
118 static inline int
119 __default_check_phys_apicid_present(int boot_cpu_physical_apicid)
121 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
124 #ifdef CONFIG_X86_32
125 static inline int default_cpu_present_to_apicid(int mps_cpu)
127 return __default_cpu_present_to_apicid(mps_cpu);
130 static inline int
131 default_check_phys_apicid_present(int boot_cpu_physical_apicid)
133 return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
135 #else
136 extern int default_cpu_present_to_apicid(int mps_cpu);
137 extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
138 #endif
140 static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
142 return physid_mask_of_physid(phys_apicid);
145 #endif /* CONFIG_X86_LOCAL_APIC */
146 #endif /* _ASM_X86_MACH_DEFAULT_MACH_APIC_H */