sound/pci/oxygen/oxygen_lib.c

   1 /*
   2  * C-Media CMI8788 driver - main driver module
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, write to the Free Software
  17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <linux/delay.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/mutex.h>
  23 #include <linux/pci.h>
  24 #include <sound/ac97_codec.h>
  25 #include <sound/asoundef.h>
  26 #include <sound/core.h>
  27 #include <sound/info.h>
  28 #include <sound/mpu401.h>
  29 #include <sound/pcm.h>
  30 #include "oxygen.h"
  31 #include "cm9780.h"
  32
  33 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  34 MODULE_DESCRIPTION("C-Media CMI8788 helper library");
  35 MODULE_LICENSE("GPL v2");
  36
  37
  38 static inline int oxygen_uart_input_ready(struct oxygen *chip)
  39 {
  40         return !(oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_RX_EMPTY);
  41 }
  42
  43 static void oxygen_read_uart(struct oxygen *chip)
  44 {
  45         if (unlikely(!oxygen_uart_input_ready(chip))) {
  46                 /* no data, but read it anyway to clear the interrupt */
  47                 oxygen_read8(chip, OXYGEN_MPU401);
  48                 return;
  49         }
  50         do {
  51                 u8 data = oxygen_read8(chip, OXYGEN_MPU401);
  52                 if (data == MPU401_ACK)
  53                         continue;
  54                 if (chip->uart_input_count >= ARRAY_SIZE(chip->uart_input))
  55                         chip->uart_input_count = 0;
  56                 chip->uart_input[chip->uart_input_count++] = data;
  57         } while (oxygen_uart_input_ready(chip));
  58         if (chip->model.uart_input)
  59                 chip->model.uart_input(chip);
  60 }
  61
  62 static irqreturn_t oxygen_interrupt(int dummy, void *dev_id)
  63 {
  64         struct oxygen *chip = dev_id;
  65         unsigned int status, clear, elapsed_streams, i;
  66
  67         status = oxygen_read16(chip, OXYGEN_INTERRUPT_STATUS);
  68         if (!status)
  69                 return IRQ_NONE;
  70
  71         spin_lock(&chip->reg_lock);
  72
  73         clear = status & (OXYGEN_CHANNEL_A |
  74                           OXYGEN_CHANNEL_B |
  75                           OXYGEN_CHANNEL_C |
  76                           OXYGEN_CHANNEL_SPDIF |
  77                           OXYGEN_CHANNEL_MULTICH |
  78                           OXYGEN_CHANNEL_AC97 |
  79                           OXYGEN_INT_SPDIF_IN_DETECT |
  80                           OXYGEN_INT_GPIO |
  81                           OXYGEN_INT_AC97);
  82         if (clear) {
  83                 if (clear & OXYGEN_INT_SPDIF_IN_DETECT)
  84                         chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
  85                 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
  86                                chip->interrupt_mask & ~clear);
  87                 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
  88                                chip->interrupt_mask);
  89         }
  90
  91         elapsed_streams = status & chip->pcm_running;
  92
  93         spin_unlock(&chip->reg_lock);
  94
  95         for (i = 0; i < PCM_COUNT; ++i)
  96                 if ((elapsed_streams & (1 << i)) && chip->streams[i])
  97                         snd_pcm_period_elapsed(chip->streams[i]);
  98
  99         if (status & OXYGEN_INT_SPDIF_IN_DETECT) {
 100                 spin_lock(&chip->reg_lock);
 101                 i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
 102                 if (i & (OXYGEN_SPDIF_SENSE_INT | OXYGEN_SPDIF_LOCK_INT |
 103                          OXYGEN_SPDIF_RATE_INT)) {
 104                         /* write the interrupt bit(s) to clear */
 105                         oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i);
 106                         schedule_work(&chip->spdif_input_bits_work);
 107                 }
 108                 spin_unlock(&chip->reg_lock);
 109         }
 110
 111         if (status & OXYGEN_INT_GPIO)
 112                 schedule_work(&chip->gpio_work);
 113
 114         if (status & OXYGEN_INT_MIDI) {
 115                 if (chip->midi)
 116                         snd_mpu401_uart_interrupt(0, chip->midi->private_data);
 117                 else
 118                         oxygen_read_uart(chip);
 119         }
 120
 121         if (status & OXYGEN_INT_AC97)
 122                 wake_up(&chip->ac97_waitqueue);
 123
 124         return IRQ_HANDLED;
 125 }
 126
 127 static void oxygen_spdif_input_bits_changed(struct work_struct *work)
 128 {
 129         struct oxygen *chip = container_of(work, struct oxygen,
 130                                            spdif_input_bits_work);
 131         u32 reg;
 132
 133         /*
 134          * This function gets called when there is new activity on the SPDIF
 135          * input, or when we lose lock on the input signal, or when the rate
 136          * changes.
 137          */
 138         msleep(1);
 139         spin_lock_irq(&chip->reg_lock);
 140         reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
 141         if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
 142                     OXYGEN_SPDIF_LOCK_STATUS))
 143             == OXYGEN_SPDIF_SENSE_STATUS) {
 144                 /*
 145                  * If we detect activity on the SPDIF input but cannot lock to
 146                  * a signal, the clock bit is likely to be wrong.
 147                  */
 148                 reg ^= OXYGEN_SPDIF_IN_CLOCK_MASK;
 149                 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
 150                 spin_unlock_irq(&chip->reg_lock);
 151                 msleep(1);
 152                 spin_lock_irq(&chip->reg_lock);
 153                 reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
 154                 if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
 155                             OXYGEN_SPDIF_LOCK_STATUS))
 156                     == OXYGEN_SPDIF_SENSE_STATUS) {
 157                         /* nothing detected with either clock; give up */
 158                         if ((reg & OXYGEN_SPDIF_IN_CLOCK_MASK)
 159                             == OXYGEN_SPDIF_IN_CLOCK_192) {
 160                                 /*
 161                                  * Reset clock to <= 96 kHz because this is
 162                                  * more likely to be received next time.
 163                                  */
 164                                 reg &= ~OXYGEN_SPDIF_IN_CLOCK_MASK;
 165                                 reg |= OXYGEN_SPDIF_IN_CLOCK_96;
 166                                 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
 167                         }
 168                 }
 169         }
 170         spin_unlock_irq(&chip->reg_lock);
 171
 172         if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) {
 173                 spin_lock_irq(&chip->reg_lock);
 174                 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
 175                 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
 176                                chip->interrupt_mask);
 177                 spin_unlock_irq(&chip->reg_lock);
 178
 179                 /*
 180                  * We don't actually know that any channel status bits have
 181                  * changed, but let's send a notification just to be sure.
 182                  */
 183                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
 184                                &chip->controls[CONTROL_SPDIF_INPUT_BITS]->id);
 185         }
 186 }
 187
 188 static void oxygen_gpio_changed(struct work_struct *work)
 189 {
 190         struct oxygen *chip = container_of(work, struct oxygen, gpio_work);
 191
 192         if (chip->model.gpio_changed)
 193                 chip->model.gpio_changed(chip);
 194 }
 195
 196 #ifdef CONFIG_PROC_FS
 197 static void oxygen_proc_read(struct snd_info_entry *entry,
 198                              struct snd_info_buffer *buffer)
 199 {
 200         struct oxygen *chip = entry->private_data;
 201         int i, j;
 202
 203         snd_iprintf(buffer, "CMI8788\n\n");
 204         for (i = 0; i < OXYGEN_IO_SIZE; i += 0x10) {
 205                 snd_iprintf(buffer, "%02x:", i);
 206                 for (j = 0; j < 0x10; ++j)
 207                         snd_iprintf(buffer, " %02x", oxygen_read8(chip, i + j));
 208                 snd_iprintf(buffer, "\n");
 209         }
 210         if (mutex_lock_interruptible(&chip->mutex) < 0)
 211                 return;
 212         if (chip->has_ac97_0) {
 213                 snd_iprintf(buffer, "\nAC97\n");
 214                 for (i = 0; i < 0x80; i += 0x10) {
 215                         snd_iprintf(buffer, "%02x:", i);
 216                         for (j = 0; j < 0x10; j += 2)
 217                                 snd_iprintf(buffer, " %04x",
 218                                             oxygen_read_ac97(chip, 0, i + j));
 219                         snd_iprintf(buffer, "\n");
 220                 }
 221         }
 222         if (chip->has_ac97_1) {
 223                 snd_iprintf(buffer, "\nAC97 2\n");
 224                 for (i = 0; i < 0x80; i += 0x10) {
 225                         snd_iprintf(buffer, "%02x:", i);
 226                         for (j = 0; j < 0x10; j += 2)
 227                                 snd_iprintf(buffer, " %04x",
 228                                             oxygen_read_ac97(chip, 1, i + j));
 229                         snd_iprintf(buffer, "\n");
 230                 }
 231         }
 232         mutex_unlock(&chip->mutex);
 233 }
 234
 235 static void oxygen_proc_init(struct oxygen *chip)
 236 {
 237         struct snd_info_entry *entry;
 238
 239         if (!snd_card_proc_new(chip->card, "cmi8788", &entry))
 240                 snd_info_set_text_ops(entry, chip, oxygen_proc_read);
 241 }
 242 #else
 243 #define oxygen_proc_init(chip)
 244 #endif
 245
 246 static void oxygen_init(struct oxygen *chip)
 247 {
 248         unsigned int i;
 249
 250         chip->dac_routing = 1;
 251         for (i = 0; i < 8; ++i)
 252                 chip->dac_volume[i] = chip->model.dac_volume_min;
 253         chip->dac_mute = 1;
 254         chip->spdif_playback_enable = 1;
 255         chip->spdif_bits = OXYGEN_SPDIF_C | OXYGEN_SPDIF_ORIGINAL |
 256                 (IEC958_AES1_CON_PCM_CODER << OXYGEN_SPDIF_CATEGORY_SHIFT);
 257         chip->spdif_pcm_bits = chip->spdif_bits;
 258
 259         if (oxygen_read8(chip, OXYGEN_REVISION) & OXYGEN_REVISION_2)
 260                 chip->revision = 2;
 261         else
 262                 chip->revision = 1;
 263
 264         if (chip->revision == 1)
 265                 oxygen_set_bits8(chip, OXYGEN_MISC,
 266                                  OXYGEN_MISC_PCI_MEM_W_1_CLOCK);
 267
 268         i = oxygen_read16(chip, OXYGEN_AC97_CONTROL);
 269         chip->has_ac97_0 = (i & OXYGEN_AC97_CODEC_0) != 0;
 270         chip->has_ac97_1 = (i & OXYGEN_AC97_CODEC_1) != 0;
 271
 272         oxygen_write8_masked(chip, OXYGEN_FUNCTION,
 273                              OXYGEN_FUNCTION_RESET_CODEC |
 274                              chip->model.function_flags,
 275                              OXYGEN_FUNCTION_RESET_CODEC |
 276                              OXYGEN_FUNCTION_2WIRE_SPI_MASK |
 277                              OXYGEN_FUNCTION_ENABLE_SPI_4_5);
 278         oxygen_write8(chip, OXYGEN_DMA_STATUS, 0);
 279         oxygen_write8(chip, OXYGEN_DMA_PAUSE, 0);
 280         oxygen_write8(chip, OXYGEN_PLAY_CHANNELS,
 281                       OXYGEN_PLAY_CHANNELS_2 |
 282                       OXYGEN_DMA_A_BURST_8 |
 283                       OXYGEN_DMA_MULTICH_BURST_8);
 284         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
 285         oxygen_write8_masked(chip, OXYGEN_MISC,
 286                              chip->model.misc_flags,
 287                              OXYGEN_MISC_WRITE_PCI_SUBID |
 288                              OXYGEN_MISC_REC_C_FROM_SPDIF |
 289                              OXYGEN_MISC_REC_B_FROM_AC97 |
 290                              OXYGEN_MISC_REC_A_FROM_MULTICH |
 291                              OXYGEN_MISC_MIDI);
 292         oxygen_write8(chip, OXYGEN_REC_FORMAT,
 293                       (OXYGEN_FORMAT_16 << OXYGEN_REC_FORMAT_A_SHIFT) |
 294                       (OXYGEN_FORMAT_16 << OXYGEN_REC_FORMAT_B_SHIFT) |
 295                       (OXYGEN_FORMAT_16 << OXYGEN_REC_FORMAT_C_SHIFT));
 296         oxygen_write8(chip, OXYGEN_PLAY_FORMAT,
 297                       (OXYGEN_FORMAT_16 << OXYGEN_SPDIF_FORMAT_SHIFT) |
 298                       (OXYGEN_FORMAT_16 << OXYGEN_MULTICH_FORMAT_SHIFT));
 299         oxygen_write8(chip, OXYGEN_REC_CHANNELS, OXYGEN_REC_CHANNELS_2_2_2);
 300         oxygen_write16(chip, OXYGEN_I2S_MULTICH_FORMAT,
 301                        OXYGEN_RATE_48000 | chip->model.dac_i2s_format |
 302                        OXYGEN_I2S_MCLK_256 | OXYGEN_I2S_BITS_16 |
 303                        OXYGEN_I2S_MASTER | OXYGEN_I2S_BCLK_64);
 304         if (chip->model.device_config & CAPTURE_0_FROM_I2S_1)
 305                 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT,
 306                                OXYGEN_RATE_48000 | chip->model.adc_i2s_format |
 307                                OXYGEN_I2S_MCLK_256 | OXYGEN_I2S_BITS_16 |
 308                                OXYGEN_I2S_MASTER | OXYGEN_I2S_BCLK_64);
 309         else
 310                 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT,
 311                                OXYGEN_I2S_MASTER | OXYGEN_I2S_MUTE_MCLK);
 312         if (chip->model.device_config & (CAPTURE_0_FROM_I2S_2 |
 313                                          CAPTURE_2_FROM_I2S_2))
 314                 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT,
 315                                OXYGEN_RATE_48000 | chip->model.adc_i2s_format |
 316                                OXYGEN_I2S_MCLK_256 | OXYGEN_I2S_BITS_16 |
 317                                OXYGEN_I2S_MASTER | OXYGEN_I2S_BCLK_64);
 318         else
 319                 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT,
 320                                OXYGEN_I2S_MASTER | OXYGEN_I2S_MUTE_MCLK);
 321         oxygen_write16(chip, OXYGEN_I2S_C_FORMAT,
 322                        OXYGEN_I2S_MASTER | OXYGEN_I2S_MUTE_MCLK);
 323         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 324                             OXYGEN_SPDIF_OUT_ENABLE |
 325                             OXYGEN_SPDIF_LOOPBACK);
 326         if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
 327                 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
 328                                       OXYGEN_SPDIF_SENSE_MASK |
 329                                       OXYGEN_SPDIF_LOCK_MASK |
 330                                       OXYGEN_SPDIF_RATE_MASK |
 331                                       OXYGEN_SPDIF_LOCK_PAR |
 332                                       OXYGEN_SPDIF_IN_CLOCK_96,
 333                                       OXYGEN_SPDIF_SENSE_MASK |
 334                                       OXYGEN_SPDIF_LOCK_MASK |
 335                                       OXYGEN_SPDIF_RATE_MASK |
 336                                       OXYGEN_SPDIF_SENSE_PAR |
 337                                       OXYGEN_SPDIF_LOCK_PAR |
 338                                       OXYGEN_SPDIF_IN_CLOCK_MASK);
 339         else
 340                 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 341                                     OXYGEN_SPDIF_SENSE_MASK |
 342                                     OXYGEN_SPDIF_LOCK_MASK |
 343                                     OXYGEN_SPDIF_RATE_MASK);
 344         oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits);
 345         oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
 346                        OXYGEN_2WIRE_LENGTH_8 |
 347                        OXYGEN_2WIRE_INTERRUPT_MASK |
 348                        OXYGEN_2WIRE_SPEED_STANDARD);
 349         oxygen_clear_bits8(chip, OXYGEN_MPU401_CONTROL, OXYGEN_MPU401_LOOPBACK);
 350         oxygen_write8(chip, OXYGEN_GPI_INTERRUPT_MASK, 0);
 351         oxygen_write16(chip, OXYGEN_GPIO_INTERRUPT_MASK, 0);
 352         oxygen_write16(chip, OXYGEN_PLAY_ROUTING,
 353                        OXYGEN_PLAY_MULTICH_I2S_DAC |
 354                        OXYGEN_PLAY_SPDIF_SPDIF |
 355                        (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
 356                        (1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
 357                        (2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
 358                        (3 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT));
 359         oxygen_write8(chip, OXYGEN_REC_ROUTING,
 360                       OXYGEN_REC_A_ROUTE_I2S_ADC_1 |
 361                       OXYGEN_REC_B_ROUTE_I2S_ADC_2 |
 362                       OXYGEN_REC_C_ROUTE_SPDIF);
 363         oxygen_write8(chip, OXYGEN_ADC_MONITOR, 0);
 364         oxygen_write8(chip, OXYGEN_A_MONITOR_ROUTING,
 365                       (0 << OXYGEN_A_MONITOR_ROUTE_0_SHIFT) |
 366                       (1 << OXYGEN_A_MONITOR_ROUTE_1_SHIFT) |
 367                       (2 << OXYGEN_A_MONITOR_ROUTE_2_SHIFT) |
 368                       (3 << OXYGEN_A_MONITOR_ROUTE_3_SHIFT));
 369
 370         if (chip->has_ac97_0 | chip->has_ac97_1)
 371                 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK,
 372                               OXYGEN_AC97_INT_READ_DONE |
 373                               OXYGEN_AC97_INT_WRITE_DONE);
 374         else
 375                 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0);
 376         oxygen_write32(chip, OXYGEN_AC97_OUT_CONFIG, 0);
 377         oxygen_write32(chip, OXYGEN_AC97_IN_CONFIG, 0);
 378         if (!(chip->has_ac97_0 | chip->has_ac97_1))
 379                 oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL,
 380                                   OXYGEN_AC97_CLOCK_DISABLE);
 381         if (!chip->has_ac97_0) {
 382                 oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL,
 383                                   OXYGEN_AC97_NO_CODEC_0);
 384         } else {
 385                 oxygen_write_ac97(chip, 0, AC97_RESET, 0);
 386                 msleep(1);
 387                 oxygen_ac97_set_bits(chip, 0, CM9780_GPIO_SETUP,
 388                                      CM9780_GPIO0IO | CM9780_GPIO1IO);
 389                 oxygen_ac97_set_bits(chip, 0, CM9780_MIXER,
 390                                      CM9780_BSTSEL | CM9780_STRO_MIC |
 391                                      CM9780_MIX2FR | CM9780_PCBSW);
 392                 oxygen_ac97_set_bits(chip, 0, CM9780_JACK,
 393                                      CM9780_RSOE | CM9780_CBOE |
 394                                      CM9780_SSOE | CM9780_FROE |
 395                                      CM9780_MIC2MIC | CM9780_LI2LI);
 396                 oxygen_write_ac97(chip, 0, AC97_MASTER, 0x0000);
 397                 oxygen_write_ac97(chip, 0, AC97_PC_BEEP, 0x8000);
 398                 oxygen_write_ac97(chip, 0, AC97_MIC, 0x8808);
 399                 oxygen_write_ac97(chip, 0, AC97_LINE, 0x0808);
 400                 oxygen_write_ac97(chip, 0, AC97_CD, 0x8808);
 401                 oxygen_write_ac97(chip, 0, AC97_VIDEO, 0x8808);
 402                 oxygen_write_ac97(chip, 0, AC97_AUX, 0x8808);
 403                 oxygen_write_ac97(chip, 0, AC97_REC_GAIN, 0x8000);
 404                 oxygen_write_ac97(chip, 0, AC97_CENTER_LFE_MASTER, 0x8080);
 405                 oxygen_write_ac97(chip, 0, AC97_SURROUND_MASTER, 0x8080);
 406                 oxygen_ac97_clear_bits(chip, 0, CM9780_GPIO_STATUS,
 407                                        CM9780_GPO0);
 408                 /* power down unused ADCs and DACs */
 409                 oxygen_ac97_set_bits(chip, 0, AC97_POWERDOWN,
 410                                      AC97_PD_PR0 | AC97_PD_PR1);
 411                 oxygen_ac97_set_bits(chip, 0, AC97_EXTENDED_STATUS,
 412                                      AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK);
 413         }
 414         if (chip->has_ac97_1) {
 415                 oxygen_set_bits32(chip, OXYGEN_AC97_OUT_CONFIG,
 416                                   OXYGEN_AC97_CODEC1_SLOT3 |
 417                                   OXYGEN_AC97_CODEC1_SLOT4);
 418                 oxygen_write_ac97(chip, 1, AC97_RESET, 0);
 419                 msleep(1);
 420                 oxygen_write_ac97(chip, 1, AC97_MASTER, 0x0000);
 421                 oxygen_write_ac97(chip, 1, AC97_HEADPHONE, 0x8000);
 422                 oxygen_write_ac97(chip, 1, AC97_PC_BEEP, 0x8000);
 423                 oxygen_write_ac97(chip, 1, AC97_MIC, 0x8808);
 424                 oxygen_write_ac97(chip, 1, AC97_LINE, 0x8808);
 425                 oxygen_write_ac97(chip, 1, AC97_CD, 0x8808);
 426                 oxygen_write_ac97(chip, 1, AC97_VIDEO, 0x8808);
 427                 oxygen_write_ac97(chip, 1, AC97_AUX, 0x8808);
 428                 oxygen_write_ac97(chip, 1, AC97_PCM, 0x0808);
 429                 oxygen_write_ac97(chip, 1, AC97_REC_SEL, 0x0000);
 430                 oxygen_write_ac97(chip, 1, AC97_REC_GAIN, 0x0000);
 431                 oxygen_ac97_set_bits(chip, 1, 0x6a, 0x0040);
 432         }
 433 }
 434
 435 static void oxygen_card_free(struct snd_card *card)
 436 {
 437         struct oxygen *chip = card->private_data;
 438
 439         spin_lock_irq(&chip->reg_lock);
 440         chip->interrupt_mask = 0;
 441         chip->pcm_running = 0;
 442         oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
 443         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
 444         spin_unlock_irq(&chip->reg_lock);
 445         if (chip->irq >= 0)
 446                 free_irq(chip->irq, chip);
 447         flush_scheduled_work();
 448         chip->model.cleanup(chip);
 449         mutex_destroy(&chip->mutex);
 450         pci_release_regions(chip->pci);
 451         pci_disable_device(chip->pci);
 452 }
 453
 454 int oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
 455                      const struct oxygen_model *model,
 456                      unsigned long driver_data)
 457 {
 458         struct snd_card *card;
 459         struct oxygen *chip;
 460         int err;
 461
 462         card = snd_card_new(index, id, model->owner,
 463                             sizeof *chip + model->model_data_size);
 464         if (!card)
 465                 return -ENOMEM;
 466
 467         chip = card->private_data;
 468         chip->card = card;
 469         chip->pci = pci;
 470         chip->irq = -1;
 471         chip->model = *model;
 472         chip->model_data = chip + 1;
 473         spin_lock_init(&chip->reg_lock);
 474         mutex_init(&chip->mutex);
 475         INIT_WORK(&chip->spdif_input_bits_work,
 476                   oxygen_spdif_input_bits_changed);
 477         INIT_WORK(&chip->gpio_work, oxygen_gpio_changed);
 478         init_waitqueue_head(&chip->ac97_waitqueue);
 479
 480         err = pci_enable_device(pci);
 481         if (err < 0)
 482                 goto err_card;
 483
 484         err = pci_request_regions(pci, model->chip);
 485         if (err < 0) {
 486                 snd_printk(KERN_ERR "cannot reserve PCI resources\n");
 487                 goto err_pci_enable;
 488         }
 489
 490         if (!(pci_resource_flags(pci, 0) & IORESOURCE_IO) ||
 491             pci_resource_len(pci, 0) < OXYGEN_IO_SIZE) {
 492                 snd_printk(KERN_ERR "invalid PCI I/O range\n");
 493                 err = -ENXIO;
 494                 goto err_pci_regions;
 495         }
 496         chip->addr = pci_resource_start(pci, 0);
 497
 498         pci_set_master(pci);
 499         snd_card_set_dev(card, &pci->dev);
 500         card->private_free = oxygen_card_free;
 501
 502         if (chip->model.probe) {
 503                 err = chip->model.probe(chip, driver_data);
 504                 if (err < 0)
 505                         goto err_card;
 506         }
 507         oxygen_init(chip);
 508         chip->model.init(chip);
 509
 510         err = request_irq(pci->irq, oxygen_interrupt, IRQF_SHARED,
 511                           chip->model.chip, chip);
 512         if (err < 0) {
 513                 snd_printk(KERN_ERR "cannot grab interrupt %d\n", pci->irq);
 514                 goto err_card;
 515         }
 516         chip->irq = pci->irq;
 517
 518         strcpy(card->driver, chip->model.chip);
 519         strcpy(card->shortname, chip->model.shortname);
 520         sprintf(card->longname, "%s (rev %u) at %#lx, irq %i",
 521                 chip->model.longname, chip->revision, chip->addr, chip->irq);
 522         strcpy(card->mixername, chip->model.chip);
 523         snd_component_add(card, chip->model.chip);
 524
 525         err = oxygen_pcm_init(chip);
 526         if (err < 0)
 527                 goto err_card;
 528
 529         err = oxygen_mixer_init(chip);
 530         if (err < 0)
 531                 goto err_card;
 532
 533         if (chip->model.device_config & (MIDI_OUTPUT | MIDI_INPUT)) {
 534                 unsigned int info_flags = MPU401_INFO_INTEGRATED;
 535                 if (chip->model.device_config & MIDI_OUTPUT)
 536                         info_flags |= MPU401_INFO_OUTPUT;
 537                 if (chip->model.device_config & MIDI_INPUT)
 538                         info_flags |= MPU401_INFO_INPUT;
 539                 err = snd_mpu401_uart_new(card, 0, MPU401_HW_CMIPCI,
 540                                           chip->addr + OXYGEN_MPU401,
 541                                           info_flags, 0, 0,
 542                                           &chip->midi);
 543                 if (err < 0)
 544                         goto err_card;
 545         }
 546
 547         oxygen_proc_init(chip);
 548
 549         spin_lock_irq(&chip->reg_lock);
 550         if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
 551                 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
 552         if (chip->has_ac97_0 | chip->has_ac97_1)
 553                 chip->interrupt_mask |= OXYGEN_INT_AC97;
 554         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 555         spin_unlock_irq(&chip->reg_lock);
 556
 557         err = snd_card_register(card);
 558         if (err < 0)
 559                 goto err_card;
 560
 561         pci_set_drvdata(pci, card);
 562         return 0;
 563
 564 err_pci_regions:
 565         pci_release_regions(pci);
 566 err_pci_enable:
 567         pci_disable_device(pci);
 568 err_card:
 569         snd_card_free(card);
 570         return err;
 571 }
 572 EXPORT_SYMBOL(oxygen_pci_probe);
 573
 574 void oxygen_pci_remove(struct pci_dev *pci)
 575 {
 576         snd_card_free(pci_get_drvdata(pci));
 577         pci_set_drvdata(pci, NULL);
 578 }
 579 EXPORT_SYMBOL(oxygen_pci_remove);
 580
 581 #ifdef CONFIG_PM
 582 int oxygen_pci_suspend(struct pci_dev *pci, pm_message_t state)
 583 {
 584         struct snd_card *card = pci_get_drvdata(pci);
 585         struct oxygen *chip = card->private_data;
 586         unsigned int i, saved_interrupt_mask;
 587
 588         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 589
 590         for (i = 0; i < PCM_COUNT; ++i)
 591                 if (chip->streams[i])
 592                         snd_pcm_suspend(chip->streams[i]);
 593
 594         if (chip->model.suspend)
 595                 chip->model.suspend(chip);
 596
 597         spin_lock_irq(&chip->reg_lock);
 598         saved_interrupt_mask = chip->interrupt_mask;
 599         chip->interrupt_mask = 0;
 600         oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
 601         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
 602         spin_unlock_irq(&chip->reg_lock);
 603
 604         synchronize_irq(chip->irq);
 605         flush_scheduled_work();
 606         chip->interrupt_mask = saved_interrupt_mask;
 607
 608         pci_disable_device(pci);
 609         pci_save_state(pci);
 610         pci_set_power_state(pci, pci_choose_state(pci, state));
 611         return 0;
 612 }
 613 EXPORT_SYMBOL(oxygen_pci_suspend);
 614
 615 static const u32 registers_to_restore[OXYGEN_IO_SIZE / 32] = {
 616         0xffffffff, 0x00ff077f, 0x00011d08, 0x007f00ff,
 617         0x00300000, 0x00000fe4, 0x0ff7001f, 0x00000000
 618 };
 619 static const u32 ac97_registers_to_restore[2][0x40 / 32] = {
 620         { 0x18284fa2, 0x03060000 },
 621         { 0x00007fa6, 0x00200000 }
 622 };
 623
 624 static inline int is_bit_set(const u32 *bitmap, unsigned int bit)
 625 {
 626         return bitmap[bit / 32] & (1 << (bit & 31));
 627 }
 628
 629 static void oxygen_restore_ac97(struct oxygen *chip, unsigned int codec)
 630 {
 631         unsigned int i;
 632
 633         oxygen_write_ac97(chip, codec, AC97_RESET, 0);
 634         msleep(1);
 635         for (i = 1; i < 0x40; ++i)
 636                 if (is_bit_set(ac97_registers_to_restore[codec], i))
 637                         oxygen_write_ac97(chip, codec, i * 2,
 638                                           chip->saved_ac97_registers[codec][i]);
 639 }
 640
 641 int oxygen_pci_resume(struct pci_dev *pci)
 642 {
 643         struct snd_card *card = pci_get_drvdata(pci);
 644         struct oxygen *chip = card->private_data;
 645         unsigned int i;
 646
 647         pci_set_power_state(pci, PCI_D0);
 648         pci_restore_state(pci);
 649         if (pci_enable_device(pci) < 0) {
 650                 snd_printk(KERN_ERR "cannot reenable device");
 651                 snd_card_disconnect(card);
 652                 return -EIO;
 653         }
 654         pci_set_master(pci);
 655
 656         oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
 657         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
 658         for (i = 0; i < OXYGEN_IO_SIZE; ++i)
 659                 if (is_bit_set(registers_to_restore, i))
 660                         oxygen_write8(chip, i, chip->saved_registers._8[i]);
 661         if (chip->has_ac97_0)
 662                 oxygen_restore_ac97(chip, 0);
 663         if (chip->has_ac97_1)
 664                 oxygen_restore_ac97(chip, 1);
 665
 666         if (chip->model.resume)
 667                 chip->model.resume(chip);
 668
 669         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 670
 671         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 672         return 0;
 673 }
 674 EXPORT_SYMBOL(oxygen_pci_resume);
 675 #endif /* CONFIG_PM */