2 * MUSB OTG peripheral driver ep0 handling
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
7 * Copyright (C) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
26 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
29 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
30 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 #include <linux/kernel.h>
37 #include <linux/list.h>
38 #include <linux/timer.h>
39 #include <linux/spinlock.h>
40 #include <linux/init.h>
41 #include <linux/device.h>
42 #include <linux/interrupt.h>
44 #include "musb_core.h"
46 /* ep0 is always musb->endpoints[0].ep_in */
47 #define next_ep0_request(musb) next_in_request(&(musb)->endpoints[0])
50 * locking note: we use only the controller lock, for simpler correctness.
51 * It's always held with IRQs blocked.
53 * It protects the ep0 request queue as well as ep0_state, not just the
54 * controller and indexed registers. And that lock stays held unless it
55 * needs to be dropped to allow reentering this driver ... like upcalls to
56 * the gadget driver, or adjusting endpoint halt status.
59 static char *decode_ep0stage(u8 stage
)
62 case MUSB_EP0_STAGE_IDLE
: return "idle";
63 case MUSB_EP0_STAGE_SETUP
: return "setup";
64 case MUSB_EP0_STAGE_TX
: return "in";
65 case MUSB_EP0_STAGE_RX
: return "out";
66 case MUSB_EP0_STAGE_ACKWAIT
: return "wait";
67 case MUSB_EP0_STAGE_STATUSIN
: return "in/status";
68 case MUSB_EP0_STAGE_STATUSOUT
: return "out/status";
73 /* handle a standard GET_STATUS request
74 * Context: caller holds controller lock
76 static int service_tx_status_request(
78 const struct usb_ctrlrequest
*ctrlrequest
)
80 void __iomem
*mbase
= musb
->mregs
;
82 u8 result
[2], epnum
= 0;
83 const u8 recip
= ctrlrequest
->bRequestType
& USB_RECIP_MASK
;
88 case USB_RECIP_DEVICE
:
89 result
[0] = musb
->is_self_powered
<< USB_DEVICE_SELF_POWERED
;
90 result
[0] |= musb
->may_wakeup
<< USB_DEVICE_REMOTE_WAKEUP
;
91 #ifdef CONFIG_USB_MUSB_OTG
93 result
[0] |= musb
->g
.b_hnp_enable
94 << USB_DEVICE_B_HNP_ENABLE
;
95 result
[0] |= musb
->g
.a_alt_hnp_support
96 << USB_DEVICE_A_ALT_HNP_SUPPORT
;
97 result
[0] |= musb
->g
.a_hnp_support
98 << USB_DEVICE_A_HNP_SUPPORT
;
103 case USB_RECIP_INTERFACE
:
107 case USB_RECIP_ENDPOINT
: {
113 epnum
= (u8
) ctrlrequest
->wIndex
;
119 is_in
= epnum
& USB_DIR_IN
;
122 ep
= &musb
->endpoints
[epnum
].ep_in
;
124 ep
= &musb
->endpoints
[epnum
].ep_out
;
126 regs
= musb
->endpoints
[epnum
].regs
;
128 if (epnum
>= MUSB_C_NUM_EPS
|| !ep
->desc
) {
133 musb_ep_select(mbase
, epnum
);
135 tmp
= musb_readw(regs
, MUSB_TXCSR
)
136 & MUSB_TXCSR_P_SENDSTALL
;
138 tmp
= musb_readw(regs
, MUSB_RXCSR
)
139 & MUSB_RXCSR_P_SENDSTALL
;
140 musb_ep_select(mbase
, 0);
142 result
[0] = tmp
? 1 : 0;
146 /* class, vendor, etc ... delegate */
151 /* fill up the fifo; caller updates csr0 */
153 u16 len
= le16_to_cpu(ctrlrequest
->wLength
);
157 musb_write_fifo(&musb
->endpoints
[0], len
, result
);
164 * handle a control-IN request, the end0 buffer contains the current request
165 * that is supposed to be a standard control request. Assumes the fifo to
166 * be at least 2 bytes long.
168 * @return 0 if the request was NOT HANDLED,
170 * > 0 when the request is processed
172 * Context: caller holds controller lock
175 service_in_request(struct musb
*musb
, const struct usb_ctrlrequest
*ctrlrequest
)
177 int handled
= 0; /* not handled */
179 if ((ctrlrequest
->bRequestType
& USB_TYPE_MASK
)
180 == USB_TYPE_STANDARD
) {
181 switch (ctrlrequest
->bRequest
) {
182 case USB_REQ_GET_STATUS
:
183 handled
= service_tx_status_request(musb
,
187 /* case USB_REQ_SYNC_FRAME: */
197 * Context: caller holds controller lock
199 static void musb_g_ep0_giveback(struct musb
*musb
, struct usb_request
*req
)
201 musb_g_giveback(&musb
->endpoints
[0].ep_in
, req
, 0);
205 * Tries to start B-device HNP negotiation if enabled via sysfs
207 static inline void musb_try_b_hnp_enable(struct musb
*musb
)
209 void __iomem
*mbase
= musb
->mregs
;
212 DBG(1, "HNP: Setting HR\n");
213 devctl
= musb_readb(mbase
, MUSB_DEVCTL
);
214 musb_writeb(mbase
, MUSB_DEVCTL
, devctl
| MUSB_DEVCTL_HR
);
218 * Handle all control requests with no DATA stage, including standard
220 * USB_REQ_SET_CONFIGURATION, USB_REQ_SET_INTERFACE, unrecognized
221 * always delegated to the gadget driver
222 * USB_REQ_SET_ADDRESS, USB_REQ_CLEAR_FEATURE, USB_REQ_SET_FEATURE
223 * always handled here, except for class/vendor/... features
225 * Context: caller holds controller lock
228 service_zero_data_request(struct musb
*musb
,
229 struct usb_ctrlrequest
*ctrlrequest
)
230 __releases(musb
->lock
)
231 __acquires(musb
->lock
)
233 int handled
= -EINVAL
;
234 void __iomem
*mbase
= musb
->mregs
;
235 const u8 recip
= ctrlrequest
->bRequestType
& USB_RECIP_MASK
;
237 /* the gadget driver handles everything except what we MUST handle */
238 if ((ctrlrequest
->bRequestType
& USB_TYPE_MASK
)
239 == USB_TYPE_STANDARD
) {
240 switch (ctrlrequest
->bRequest
) {
241 case USB_REQ_SET_ADDRESS
:
242 /* change it after the status stage */
243 musb
->set_address
= true;
244 musb
->address
= (u8
) (ctrlrequest
->wValue
& 0x7f);
248 case USB_REQ_CLEAR_FEATURE
:
250 case USB_RECIP_DEVICE
:
251 if (ctrlrequest
->wValue
252 != USB_DEVICE_REMOTE_WAKEUP
)
254 musb
->may_wakeup
= 0;
257 case USB_RECIP_INTERFACE
:
259 case USB_RECIP_ENDPOINT
:{
260 const u8 num
= ctrlrequest
->wIndex
& 0x0f;
261 struct musb_ep
*musb_ep
;
264 || num
>= MUSB_C_NUM_EPS
265 || ctrlrequest
->wValue
266 != USB_ENDPOINT_HALT
)
269 if (ctrlrequest
->wIndex
& USB_DIR_IN
)
270 musb_ep
= &musb
->endpoints
[num
].ep_in
;
272 musb_ep
= &musb
->endpoints
[num
].ep_out
;
276 /* REVISIT do it directly, no locking games */
277 spin_unlock(&musb
->lock
);
278 musb_gadget_set_halt(&musb_ep
->end_point
, 0);
279 spin_lock(&musb
->lock
);
281 /* select ep0 again */
282 musb_ep_select(mbase
, 0);
286 /* class, vendor, etc ... delegate */
292 case USB_REQ_SET_FEATURE
:
294 case USB_RECIP_DEVICE
:
296 switch (ctrlrequest
->wValue
) {
297 case USB_DEVICE_REMOTE_WAKEUP
:
298 musb
->may_wakeup
= 1;
300 case USB_DEVICE_TEST_MODE
:
301 if (musb
->g
.speed
!= USB_SPEED_HIGH
)
303 if (ctrlrequest
->wIndex
& 0xff)
306 switch (ctrlrequest
->wIndex
>> 8) {
308 pr_debug("TEST_J\n");
315 pr_debug("TEST_K\n");
321 pr_debug("TEST_SE0_NAK\n");
327 pr_debug("TEST_PACKET\n");
335 /* enter test mode after irq */
337 musb
->test_mode
= true;
339 #ifdef CONFIG_USB_MUSB_OTG
340 case USB_DEVICE_B_HNP_ENABLE
:
343 musb
->g
.b_hnp_enable
= 1;
344 musb_try_b_hnp_enable(musb
);
346 case USB_DEVICE_A_HNP_SUPPORT
:
349 musb
->g
.a_hnp_support
= 1;
351 case USB_DEVICE_A_ALT_HNP_SUPPORT
:
354 musb
->g
.a_alt_hnp_support
= 1;
364 case USB_RECIP_INTERFACE
:
367 case USB_RECIP_ENDPOINT
:{
369 ctrlrequest
->wIndex
& 0x0f;
370 struct musb_ep
*musb_ep
;
371 struct musb_hw_ep
*ep
;
377 || epnum
>= MUSB_C_NUM_EPS
378 || ctrlrequest
->wValue
379 != USB_ENDPOINT_HALT
)
382 ep
= musb
->endpoints
+ epnum
;
384 is_in
= ctrlrequest
->wIndex
& USB_DIR_IN
;
386 musb_ep
= &ep
->ep_in
;
388 musb_ep
= &ep
->ep_out
;
392 musb_ep_select(mbase
, epnum
);
394 csr
= musb_readw(regs
,
396 if (csr
& MUSB_TXCSR_FIFONOTEMPTY
)
397 csr
|= MUSB_TXCSR_FLUSHFIFO
;
398 csr
|= MUSB_TXCSR_P_SENDSTALL
399 | MUSB_TXCSR_CLRDATATOG
400 | MUSB_TXCSR_P_WZC_BITS
;
401 musb_writew(regs
, MUSB_TXCSR
,
404 csr
= musb_readw(regs
,
406 csr
|= MUSB_RXCSR_P_SENDSTALL
407 | MUSB_RXCSR_FLUSHFIFO
408 | MUSB_RXCSR_CLRDATATOG
409 | MUSB_RXCSR_P_WZC_BITS
;
410 musb_writew(regs
, MUSB_RXCSR
,
414 /* select ep0 again */
415 musb_ep_select(mbase
, 0);
420 /* class, vendor, etc ... delegate */
426 /* delegate SET_CONFIGURATION, etc */
434 /* we have an ep0out data packet
435 * Context: caller holds controller lock
437 static void ep0_rxstate(struct musb
*musb
)
439 void __iomem
*regs
= musb
->control_ep
->regs
;
440 struct usb_request
*req
;
443 req
= next_ep0_request(musb
);
445 /* read packet and ack; or stall because of gadget driver bug:
446 * should have provided the rx buffer before setup() returned.
449 void *buf
= req
->buf
+ req
->actual
;
450 unsigned len
= req
->length
- req
->actual
;
452 /* read the buffer */
453 count
= musb_readb(regs
, MUSB_COUNT0
);
455 req
->status
= -EOVERFLOW
;
458 musb_read_fifo(&musb
->endpoints
[0], count
, buf
);
459 req
->actual
+= count
;
460 csr
= MUSB_CSR0_P_SVDRXPKTRDY
;
461 if (count
< 64 || req
->actual
== req
->length
) {
462 musb
->ep0_state
= MUSB_EP0_STAGE_STATUSIN
;
463 csr
|= MUSB_CSR0_P_DATAEND
;
467 csr
= MUSB_CSR0_P_SVDRXPKTRDY
| MUSB_CSR0_P_SENDSTALL
;
470 /* Completion handler may choose to stall, e.g. because the
471 * message just received holds invalid data.
475 musb_g_ep0_giveback(musb
, req
);
480 musb_ep_select(musb
->mregs
, 0);
481 musb_writew(regs
, MUSB_CSR0
, csr
);
485 * transmitting to the host (IN), this code might be called from IRQ
486 * and from kernel thread.
488 * Context: caller holds controller lock
490 static void ep0_txstate(struct musb
*musb
)
492 void __iomem
*regs
= musb
->control_ep
->regs
;
493 struct usb_request
*request
= next_ep0_request(musb
);
494 u16 csr
= MUSB_CSR0_TXPKTRDY
;
500 DBG(2, "odd; csr0 %04x\n", musb_readw(regs
, MUSB_CSR0
));
505 fifo_src
= (u8
*) request
->buf
+ request
->actual
;
506 fifo_count
= min((unsigned) MUSB_EP0_FIFOSIZE
,
507 request
->length
- request
->actual
);
508 musb_write_fifo(&musb
->endpoints
[0], fifo_count
, fifo_src
);
509 request
->actual
+= fifo_count
;
511 /* update the flags */
512 if (fifo_count
< MUSB_MAX_END0_PACKET
513 || (request
->actual
== request
->length
514 && !request
->zero
)) {
515 musb
->ep0_state
= MUSB_EP0_STAGE_STATUSOUT
;
516 csr
|= MUSB_CSR0_P_DATAEND
;
520 /* report completions as soon as the fifo's loaded; there's no
521 * win in waiting till this last packet gets acked. (other than
522 * very precise fault reporting, needed by USB TMC; possible with
523 * this hardware, but not usable from portable gadget drivers.)
527 musb_g_ep0_giveback(musb
, request
);
533 /* send it out, triggering a "txpktrdy cleared" irq */
534 musb_ep_select(musb
->mregs
, 0);
535 musb_writew(regs
, MUSB_CSR0
, csr
);
539 * Read a SETUP packet (struct usb_ctrlrequest) from the hardware.
540 * Fields are left in USB byte-order.
542 * Context: caller holds controller lock.
545 musb_read_setup(struct musb
*musb
, struct usb_ctrlrequest
*req
)
547 struct usb_request
*r
;
548 void __iomem
*regs
= musb
->control_ep
->regs
;
550 musb_read_fifo(&musb
->endpoints
[0], sizeof *req
, (u8
*)req
);
552 /* NOTE: earlier 2.6 versions changed setup packets to host
553 * order, but now USB packets always stay in USB byte order.
555 DBG(3, "SETUP req%02x.%02x v%04x i%04x l%d\n",
558 le16_to_cpu(req
->wValue
),
559 le16_to_cpu(req
->wIndex
),
560 le16_to_cpu(req
->wLength
));
562 /* clean up any leftover transfers */
563 r
= next_ep0_request(musb
);
565 musb_g_ep0_giveback(musb
, r
);
567 /* For zero-data requests we want to delay the STATUS stage to
568 * avoid SETUPEND errors. If we read data (OUT), delay accepting
569 * packets until there's a buffer to store them in.
571 * If we write data, the controller acts happier if we enable
572 * the TX FIFO right away, and give the controller a moment
575 musb
->set_address
= false;
576 musb
->ackpend
= MUSB_CSR0_P_SVDRXPKTRDY
;
577 if (req
->wLength
== 0) {
578 if (req
->bRequestType
& USB_DIR_IN
)
579 musb
->ackpend
|= MUSB_CSR0_TXPKTRDY
;
580 musb
->ep0_state
= MUSB_EP0_STAGE_ACKWAIT
;
581 } else if (req
->bRequestType
& USB_DIR_IN
) {
582 musb
->ep0_state
= MUSB_EP0_STAGE_TX
;
583 musb_writew(regs
, MUSB_CSR0
, MUSB_CSR0_P_SVDRXPKTRDY
);
584 while ((musb_readw(regs
, MUSB_CSR0
)
585 & MUSB_CSR0_RXPKTRDY
) != 0)
589 musb
->ep0_state
= MUSB_EP0_STAGE_RX
;
593 forward_to_driver(struct musb
*musb
, const struct usb_ctrlrequest
*ctrlrequest
)
594 __releases(musb
->lock
)
595 __acquires(musb
->lock
)
598 if (!musb
->gadget_driver
)
600 spin_unlock(&musb
->lock
);
601 retval
= musb
->gadget_driver
->setup(&musb
->g
, ctrlrequest
);
602 spin_lock(&musb
->lock
);
607 * Handle peripheral ep0 interrupt
609 * Context: irq handler; we won't re-enter the driver that way.
611 irqreturn_t
musb_g_ep0_irq(struct musb
*musb
)
615 void __iomem
*mbase
= musb
->mregs
;
616 void __iomem
*regs
= musb
->endpoints
[0].regs
;
617 irqreturn_t retval
= IRQ_NONE
;
619 musb_ep_select(mbase
, 0); /* select ep0 */
620 csr
= musb_readw(regs
, MUSB_CSR0
);
621 len
= musb_readb(regs
, MUSB_COUNT0
);
623 DBG(4, "csr %04x, count %d, myaddr %d, ep0stage %s\n",
625 musb_readb(mbase
, MUSB_FADDR
),
626 decode_ep0stage(musb
->ep0_state
));
628 /* I sent a stall.. need to acknowledge it now.. */
629 if (csr
& MUSB_CSR0_P_SENTSTALL
) {
630 musb_writew(regs
, MUSB_CSR0
,
631 csr
& ~MUSB_CSR0_P_SENTSTALL
);
632 retval
= IRQ_HANDLED
;
633 musb
->ep0_state
= MUSB_EP0_STAGE_IDLE
;
634 csr
= musb_readw(regs
, MUSB_CSR0
);
637 /* request ended "early" */
638 if (csr
& MUSB_CSR0_P_SETUPEND
) {
639 musb_writew(regs
, MUSB_CSR0
, MUSB_CSR0_P_SVDSETUPEND
);
640 retval
= IRQ_HANDLED
;
641 /* Transition into the early status phase */
642 switch (musb
->ep0_state
) {
643 case MUSB_EP0_STAGE_TX
:
644 musb
->ep0_state
= MUSB_EP0_STAGE_STATUSOUT
;
646 case MUSB_EP0_STAGE_RX
:
647 musb
->ep0_state
= MUSB_EP0_STAGE_STATUSIN
;
650 ERR("SetupEnd came in a wrong ep0stage %s",
651 decode_ep0stage(musb
->ep0_state
));
653 csr
= musb_readw(regs
, MUSB_CSR0
);
654 /* NOTE: request may need completion */
657 /* docs from Mentor only describe tx, rx, and idle/setup states.
658 * we need to handle nuances around status stages, and also the
659 * case where status and setup stages come back-to-back ...
661 switch (musb
->ep0_state
) {
663 case MUSB_EP0_STAGE_TX
:
664 /* irq on clearing txpktrdy */
665 if ((csr
& MUSB_CSR0_TXPKTRDY
) == 0) {
667 retval
= IRQ_HANDLED
;
671 case MUSB_EP0_STAGE_RX
:
672 /* irq on set rxpktrdy */
673 if (csr
& MUSB_CSR0_RXPKTRDY
) {
675 retval
= IRQ_HANDLED
;
679 case MUSB_EP0_STAGE_STATUSIN
:
680 /* end of sequence #2 (OUT/RX state) or #3 (no data) */
682 /* update address (if needed) only @ the end of the
683 * status phase per usb spec, which also guarantees
684 * we get 10 msec to receive this irq... until this
685 * is done we won't see the next packet.
687 if (musb
->set_address
) {
688 musb
->set_address
= false;
689 musb_writeb(mbase
, MUSB_FADDR
, musb
->address
);
692 /* enter test mode if needed (exit by reset) */
693 else if (musb
->test_mode
) {
694 DBG(1, "entering TESTMODE\n");
696 if (MUSB_TEST_PACKET
== musb
->test_mode_nr
)
697 musb_load_testpacket(musb
);
699 musb_writeb(mbase
, MUSB_TESTMODE
,
704 case MUSB_EP0_STAGE_STATUSOUT
:
705 /* end of sequence #1: write to host (TX state) */
707 struct usb_request
*req
;
709 req
= next_ep0_request(musb
);
711 musb_g_ep0_giveback(musb
, req
);
715 * In case when several interrupts can get coalesced,
716 * check to see if we've already received a SETUP packet...
718 if (csr
& MUSB_CSR0_RXPKTRDY
)
721 retval
= IRQ_HANDLED
;
722 musb
->ep0_state
= MUSB_EP0_STAGE_IDLE
;
725 case MUSB_EP0_STAGE_IDLE
:
727 * This state is typically (but not always) indiscernible
728 * from the status states since the corresponding interrupts
729 * tend to happen within too little period of time (with only
730 * a zero-length packet in between) and so get coalesced...
732 retval
= IRQ_HANDLED
;
733 musb
->ep0_state
= MUSB_EP0_STAGE_SETUP
;
736 case MUSB_EP0_STAGE_SETUP
:
738 if (csr
& MUSB_CSR0_RXPKTRDY
) {
739 struct usb_ctrlrequest setup
;
743 ERR("SETUP packet len %d != 8 ?\n", len
);
746 musb_read_setup(musb
, &setup
);
747 retval
= IRQ_HANDLED
;
749 /* sometimes the RESET won't be reported */
750 if (unlikely(musb
->g
.speed
== USB_SPEED_UNKNOWN
)) {
753 printk(KERN_NOTICE
"%s: peripheral reset "
756 power
= musb_readb(mbase
, MUSB_POWER
);
757 musb
->g
.speed
= (power
& MUSB_POWER_HSMODE
)
758 ? USB_SPEED_HIGH
: USB_SPEED_FULL
;
762 switch (musb
->ep0_state
) {
764 /* sequence #3 (no data stage), includes requests
765 * we can't forward (notably SET_ADDRESS and the
766 * device/endpoint feature set/clear operations)
767 * plus SET_CONFIGURATION and others we must
769 case MUSB_EP0_STAGE_ACKWAIT
:
770 handled
= service_zero_data_request(
773 /* status stage might be immediate */
775 musb
->ackpend
|= MUSB_CSR0_P_DATAEND
;
777 MUSB_EP0_STAGE_STATUSIN
;
781 /* sequence #1 (IN to host), includes GET_STATUS
782 * requests that we can't forward, GET_DESCRIPTOR
783 * and others that we must
785 case MUSB_EP0_STAGE_TX
:
786 handled
= service_in_request(musb
, &setup
);
788 musb
->ackpend
= MUSB_CSR0_TXPKTRDY
789 | MUSB_CSR0_P_DATAEND
;
791 MUSB_EP0_STAGE_STATUSOUT
;
795 /* sequence #2 (OUT from host), always forward */
796 default: /* MUSB_EP0_STAGE_RX */
800 DBG(3, "handled %d, csr %04x, ep0stage %s\n",
802 decode_ep0stage(musb
->ep0_state
));
804 /* unless we need to delegate this to the gadget
805 * driver, we know how to wrap this up: csr0 has
806 * not yet been written.
810 else if (handled
> 0)
813 handled
= forward_to_driver(musb
, &setup
);
815 musb_ep_select(mbase
, 0);
817 DBG(3, "stall (%d)\n", handled
);
818 musb
->ackpend
|= MUSB_CSR0_P_SENDSTALL
;
819 musb
->ep0_state
= MUSB_EP0_STAGE_IDLE
;
821 musb_writew(regs
, MUSB_CSR0
,
828 case MUSB_EP0_STAGE_ACKWAIT
:
829 /* This should not happen. But happens with tusb6010 with
830 * g_file_storage and high speed. Do nothing.
832 retval
= IRQ_HANDLED
;
838 musb_writew(regs
, MUSB_CSR0
, MUSB_CSR0_P_SENDSTALL
);
839 musb
->ep0_state
= MUSB_EP0_STAGE_IDLE
;
848 musb_g_ep0_enable(struct usb_ep
*ep
, const struct usb_endpoint_descriptor
*desc
)
854 static int musb_g_ep0_disable(struct usb_ep
*e
)
861 musb_g_ep0_queue(struct usb_ep
*e
, struct usb_request
*r
, gfp_t gfp_flags
)
864 struct musb_request
*req
;
867 unsigned long lockflags
;
875 regs
= musb
->control_ep
->regs
;
877 req
= to_musb_request(r
);
879 req
->request
.actual
= 0;
880 req
->request
.status
= -EINPROGRESS
;
883 spin_lock_irqsave(&musb
->lock
, lockflags
);
885 if (!list_empty(&ep
->req_list
)) {
890 switch (musb
->ep0_state
) {
891 case MUSB_EP0_STAGE_RX
: /* control-OUT data */
892 case MUSB_EP0_STAGE_TX
: /* control-IN data */
893 case MUSB_EP0_STAGE_ACKWAIT
: /* zero-length data */
897 DBG(1, "ep0 request queued in state %d\n",
903 /* add request to the list */
904 list_add_tail(&(req
->request
.list
), &(ep
->req_list
));
906 DBG(3, "queue to %s (%s), length=%d\n",
907 ep
->name
, ep
->is_in
? "IN/TX" : "OUT/RX",
908 req
->request
.length
);
910 musb_ep_select(musb
->mregs
, 0);
912 /* sequence #1, IN ... start writing the data */
913 if (musb
->ep0_state
== MUSB_EP0_STAGE_TX
)
916 /* sequence #3, no-data ... issue IN status */
917 else if (musb
->ep0_state
== MUSB_EP0_STAGE_ACKWAIT
) {
918 if (req
->request
.length
)
921 musb
->ep0_state
= MUSB_EP0_STAGE_STATUSIN
;
922 musb_writew(regs
, MUSB_CSR0
,
923 musb
->ackpend
| MUSB_CSR0_P_DATAEND
);
925 musb_g_ep0_giveback(ep
->musb
, r
);
928 /* else for sequence #2 (OUT), caller provides a buffer
929 * before the next packet arrives. deferred responses
930 * (after SETUP is acked) are racey.
932 } else if (musb
->ackpend
) {
933 musb_writew(regs
, MUSB_CSR0
, musb
->ackpend
);
938 spin_unlock_irqrestore(&musb
->lock
, lockflags
);
942 static int musb_g_ep0_dequeue(struct usb_ep
*ep
, struct usb_request
*req
)
944 /* we just won't support this */
948 static int musb_g_ep0_halt(struct usb_ep
*e
, int value
)
952 void __iomem
*base
, *regs
;
963 regs
= musb
->control_ep
->regs
;
966 spin_lock_irqsave(&musb
->lock
, flags
);
968 if (!list_empty(&ep
->req_list
)) {
973 musb_ep_select(base
, 0);
976 switch (musb
->ep0_state
) {
978 /* Stalls are usually issued after parsing SETUP packet, either
979 * directly in irq context from setup() or else later.
981 case MUSB_EP0_STAGE_TX
: /* control-IN data */
982 case MUSB_EP0_STAGE_ACKWAIT
: /* STALL for zero-length data */
983 case MUSB_EP0_STAGE_RX
: /* control-OUT data */
984 csr
= musb_readw(regs
, MUSB_CSR0
);
987 /* It's also OK to issue stalls during callbacks when a non-empty
988 * DATA stage buffer has been read (or even written).
990 case MUSB_EP0_STAGE_STATUSIN
: /* control-OUT status */
991 case MUSB_EP0_STAGE_STATUSOUT
: /* control-IN status */
993 csr
|= MUSB_CSR0_P_SENDSTALL
;
994 musb_writew(regs
, MUSB_CSR0
, csr
);
995 musb
->ep0_state
= MUSB_EP0_STAGE_IDLE
;
999 DBG(1, "ep0 can't halt in state %d\n", musb
->ep0_state
);
1004 spin_unlock_irqrestore(&musb
->lock
, flags
);
1008 const struct usb_ep_ops musb_g_ep0_ops
= {
1009 .enable
= musb_g_ep0_enable
,
1010 .disable
= musb_g_ep0_disable
,
1011 .alloc_request
= musb_alloc_request
,
1012 .free_request
= musb_free_request
,
1013 .queue
= musb_g_ep0_queue
,
1014 .dequeue
= musb_g_ep0_dequeue
,
1015 .set_halt
= musb_g_ep0_halt
,