1 #ifndef _ASM_X86_IRQ_VECTORS_H
2 #define _ASM_X86_IRQ_VECTORS_H
4 #include <linux/threads.h>
6 #define NMI_VECTOR 0x02
9 * IDT vectors usable for external interrupt sources start
12 #define FIRST_EXTERNAL_VECTOR 0x20
15 # define SYSCALL_VECTOR 0x80
17 # define IA32_SYSCALL_VECTOR 0x80
21 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
22 * cleanup after irq migration.
24 #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
27 * Vectors 0x30-0x3f are used for ISA interrupts.
29 #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
30 #define IRQ1_VECTOR (IRQ0_VECTOR + 1)
31 #define IRQ2_VECTOR (IRQ0_VECTOR + 2)
32 #define IRQ3_VECTOR (IRQ0_VECTOR + 3)
33 #define IRQ4_VECTOR (IRQ0_VECTOR + 4)
34 #define IRQ5_VECTOR (IRQ0_VECTOR + 5)
35 #define IRQ6_VECTOR (IRQ0_VECTOR + 6)
36 #define IRQ7_VECTOR (IRQ0_VECTOR + 7)
37 #define IRQ8_VECTOR (IRQ0_VECTOR + 8)
38 #define IRQ9_VECTOR (IRQ0_VECTOR + 9)
39 #define IRQ10_VECTOR (IRQ0_VECTOR + 10)
40 #define IRQ11_VECTOR (IRQ0_VECTOR + 11)
41 #define IRQ12_VECTOR (IRQ0_VECTOR + 12)
42 #define IRQ13_VECTOR (IRQ0_VECTOR + 13)
43 #define IRQ14_VECTOR (IRQ0_VECTOR + 14)
44 #define IRQ15_VECTOR (IRQ0_VECTOR + 15)
47 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
49 * some of the following vectors are 'rare', they are merged
50 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
51 * TLB, reschedule and local APIC vectors are performance-critical.
55 # define SPURIOUS_APIC_VECTOR 0xff
56 # define ERROR_APIC_VECTOR 0xfe
57 # define RESCHEDULE_VECTOR 0xfd
58 # define CALL_FUNCTION_VECTOR 0xfc
59 # define CALL_FUNCTION_SINGLE_VECTOR 0xfb
60 # define THERMAL_APIC_VECTOR 0xfa
61 /* 0xf8 - 0xf9 : free */
62 # define INVALIDATE_TLB_VECTOR_END 0xf7
63 # define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
65 # define NUM_INVALIDATE_TLB_VECTORS 8
69 # define SPURIOUS_APIC_VECTOR 0xff
70 # define ERROR_APIC_VECTOR 0xfe
71 # define RESCHEDULE_VECTOR 0xfd
72 # define CALL_FUNCTION_VECTOR 0xfc
73 # define CALL_FUNCTION_SINGLE_VECTOR 0xfb
74 # define THERMAL_APIC_VECTOR 0xfa
75 # define THRESHOLD_APIC_VECTOR 0xf9
76 # define UV_BAU_MESSAGE 0xf8
77 # define INVALIDATE_TLB_VECTOR_END 0xf7
78 # define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
80 #define NUM_INVALIDATE_TLB_VECTORS 8
85 * Local APIC timer IRQ vector is on a different priority level,
86 * to work around the 'lost local interrupt if more than 2 IRQ
87 * sources per level' errata.
89 #define LOCAL_TIMER_VECTOR 0xef
92 * Performance monitoring interrupt vector:
94 #define LOCAL_PERF_VECTOR 0xee
97 * First APIC vector available to drivers: (vectors 0x30-0xee) we
98 * start at 0x31(0x41) to spread out vectors evenly between priority
99 * levels. (0x80 is the syscall vector)
101 #define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
103 #define NR_VECTORS 256
107 #define FIRST_VM86_IRQ 3
108 #define LAST_VM86_IRQ 15
109 #define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
111 #define NR_IRQS_LEGACY 16
113 #if defined(CONFIG_X86_IO_APIC) && !defined(CONFIG_X86_VOYAGER)
115 #include <asm/apicnum.h> /* need MAX_IO_APICS */
117 #ifndef CONFIG_SPARSE_IRQ
118 # if NR_CPUS < MAX_IO_APICS
119 # define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
121 # define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
126 ((8 * NR_CPUS) > (32 * MAX_IO_APICS) ? \
127 (NR_VECTORS + (8 * NR_CPUS)) : \
128 (NR_VECTORS + (32 * MAX_IO_APICS))) \
132 #elif defined(CONFIG_X86_VOYAGER)
136 #else /* IO_APIC || VOYAGER */
142 /* Voyager specific defines */
143 /* These define the CPIs we use in linux */
144 #define VIC_CPI_LEVEL0 0
145 #define VIC_CPI_LEVEL1 1
146 /* now the fake CPIs */
147 #define VIC_TIMER_CPI 2
148 #define VIC_INVALIDATE_CPI 3
149 #define VIC_RESCHEDULE_CPI 4
150 #define VIC_ENABLE_IRQ_CPI 5
151 #define VIC_CALL_FUNCTION_CPI 6
152 #define VIC_CALL_FUNCTION_SINGLE_CPI 7
154 /* Now the QIC CPIs: Since we don't need the two initial levels,
155 * these are 2 less than the VIC CPIs */
156 #define QIC_CPI_OFFSET 1
157 #define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
158 #define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
159 #define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
160 #define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
161 #define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
162 #define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
164 #define VIC_START_FAKE_CPI VIC_TIMER_CPI
165 #define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI
167 /* this is the SYS_INT CPI. */
168 #define VIC_SYS_INT 8
169 #define VIC_CMN_INT 15
171 /* This is the boot CPI for alternate processors. It gets overwritten
172 * by the above once the system has activated all available processors */
173 #define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
174 #define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
177 #endif /* _ASM_X86_IRQ_VECTORS_H */