1 #ifndef __ASMARM_TLBFLUSH_H
2 #define __ASMARM_TLBFLUSH_H
7 * - flush_tlb_all() flushes all processes TLBs
8 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
9 * - flush_tlb_page(vma, vmaddr) flushes one page
10 * - flush_tlb_range(vma, start, end) flushes a range of pages
13 #define flush_tlb_all() memc_update_all()
14 #define flush_tlb_mm(mm) memc_update_mm(mm)
15 #define flush_tlb_page(vma, vmaddr) do { printk("flush_tlb_page\n");} while (0) // IS THIS RIGHT?
16 #define flush_tlb_range(vma,start,end) \
17 do { memc_update_mm(vma->vm_mm); (void)(start); (void)(end); } while (0)
18 #define flush_tlb_pgtables(mm,start,end) do { printk("flush_tlb_pgtables\n");} while (0)
19 #define flush_tlb_kernel_range(s,e) do { printk("flush_tlb_range\n");} while (0)
22 * The following handle the weird MEMC chip
24 static inline void memc_update_all(void)
26 struct task_struct
*p
;
27 cpu_memc_update_all(init_mm
.pgd
);
31 cpu_memc_update_all(p
->mm
->pgd
);
33 processor
._set_pgd(current
->active_mm
->pgd
);
36 static inline void memc_update_mm(struct mm_struct
*mm
)
38 cpu_memc_update_all(mm
->pgd
);
40 if (mm
== current
->active_mm
)
41 processor
._set_pgd(mm
->pgd
);
45 memc_clear(struct mm_struct
*mm
, struct page
*page
)
47 cpu_memc_update_entry(mm
->pgd
, (unsigned long) page_address(page
), 0);
49 if (mm
== current
->active_mm
)
50 processor
._set_pgd(mm
->pgd
);
54 memc_update_addr(struct mm_struct
*mm
, pte_t pte
, unsigned long vaddr
)
56 cpu_memc_update_entry(mm
->pgd
, pte_val(pte
), vaddr
);
58 if (mm
== current
->active_mm
)
59 processor
._set_pgd(mm
->pgd
);
63 update_mmu_cache(struct vm_area_struct
*vma
, unsigned long addr
, pte_t pte
)
65 struct mm_struct
*mm
= vma
->vm_mm
;
66 printk("update_mmu_cache\n");
67 memc_update_addr(mm
, pte
, addr
);