x86, UV: cpu_relax in uv_wait_completion
[linux-2.6/mini2440.git] / arch / x86 / kernel / tlb_uv.c
blob6812b829ed83e86a8c0919e8c4daaadd2516cc12
1 /*
2 * SGI UltraViolet TLB flush routines.
4 * (c) 2008 Cliff Wickman <cpw@sgi.com>, SGI.
6 * This code is released under the GNU General Public License version 2 or
7 * later.
8 */
9 #include <linux/seq_file.h>
10 #include <linux/proc_fs.h>
11 #include <linux/kernel.h>
13 #include <asm/mmu_context.h>
14 #include <asm/uv/uv_mmrs.h>
15 #include <asm/uv/uv_hub.h>
16 #include <asm/uv/uv_bau.h>
17 #include <asm/genapic.h>
18 #include <asm/idle.h>
19 #include <asm/tsc.h>
20 #include <asm/irq_vectors.h>
22 #include <mach_apic.h>
24 static struct bau_control **uv_bau_table_bases __read_mostly;
25 static int uv_bau_retry_limit __read_mostly;
27 /* position of pnode (which is nasid>>1): */
28 static int uv_nshift __read_mostly;
30 static unsigned long uv_mmask __read_mostly;
32 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
33 static DEFINE_PER_CPU(struct bau_control, bau_control);
36 * Free a software acknowledge hardware resource by clearing its Pending
37 * bit. This will return a reply to the sender.
38 * If the message has timed out, a reply has already been sent by the
39 * hardware but the resource has not been released. In that case our
40 * clear of the Timeout bit (as well) will free the resource. No reply will
41 * be sent (the hardware will only do one reply per message).
43 static void uv_reply_to_message(int resource,
44 struct bau_payload_queue_entry *msg,
45 struct bau_msg_status *msp)
47 unsigned long dw;
49 dw = (1 << (resource + UV_SW_ACK_NPENDING)) | (1 << resource);
50 msg->replied_to = 1;
51 msg->sw_ack_vector = 0;
52 if (msp)
53 msp->seen_by.bits = 0;
54 uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
58 * Do all the things a cpu should do for a TLB shootdown message.
59 * Other cpu's may come here at the same time for this message.
61 static void uv_bau_process_message(struct bau_payload_queue_entry *msg,
62 int msg_slot, int sw_ack_slot)
64 unsigned long this_cpu_mask;
65 struct bau_msg_status *msp;
66 int cpu;
68 msp = __get_cpu_var(bau_control).msg_statuses + msg_slot;
69 cpu = uv_blade_processor_id();
70 msg->number_of_cpus =
71 uv_blade_nr_online_cpus(uv_node_to_blade_id(numa_node_id()));
72 this_cpu_mask = 1UL << cpu;
73 if (msp->seen_by.bits & this_cpu_mask)
74 return;
75 atomic_or_long(&msp->seen_by.bits, this_cpu_mask);
77 if (msg->replied_to == 1)
78 return;
80 if (msg->address == TLB_FLUSH_ALL) {
81 local_flush_tlb();
82 __get_cpu_var(ptcstats).alltlb++;
83 } else {
84 __flush_tlb_one(msg->address);
85 __get_cpu_var(ptcstats).onetlb++;
88 __get_cpu_var(ptcstats).requestee++;
90 atomic_inc_short(&msg->acknowledge_count);
91 if (msg->number_of_cpus == msg->acknowledge_count)
92 uv_reply_to_message(sw_ack_slot, msg, msp);
96 * Examine the payload queue on one distribution node to see
97 * which messages have not been seen, and which cpu(s) have not seen them.
99 * Returns the number of cpu's that have not responded.
101 static int uv_examine_destination(struct bau_control *bau_tablesp, int sender)
103 struct bau_payload_queue_entry *msg;
104 struct bau_msg_status *msp;
105 int count = 0;
106 int i;
107 int j;
109 for (msg = bau_tablesp->va_queue_first, i = 0; i < DEST_Q_SIZE;
110 msg++, i++) {
111 if ((msg->sending_cpu == sender) && (!msg->replied_to)) {
112 msp = bau_tablesp->msg_statuses + i;
113 printk(KERN_DEBUG
114 "blade %d: address:%#lx %d of %d, not cpu(s): ",
115 i, msg->address, msg->acknowledge_count,
116 msg->number_of_cpus);
117 for (j = 0; j < msg->number_of_cpus; j++) {
118 if (!((1L << j) & msp->seen_by.bits)) {
119 count++;
120 printk("%d ", j);
123 printk("\n");
126 return count;
130 * Examine the payload queue on all the distribution nodes to see
131 * which messages have not been seen, and which cpu(s) have not seen them.
133 * Returns the number of cpu's that have not responded.
135 static int uv_examine_destinations(struct bau_target_nodemask *distribution)
137 int sender;
138 int i;
139 int count = 0;
141 sender = smp_processor_id();
142 for (i = 0; i < sizeof(struct bau_target_nodemask) * BITSPERBYTE; i++) {
143 if (!bau_node_isset(i, distribution))
144 continue;
145 count += uv_examine_destination(uv_bau_table_bases[i], sender);
147 return count;
151 * wait for completion of a broadcast message
153 * return COMPLETE, RETRY or GIVEUP
155 static int uv_wait_completion(struct bau_desc *bau_desc,
156 unsigned long mmr_offset, int right_shift)
158 int exams = 0;
159 long destination_timeouts = 0;
160 long source_timeouts = 0;
161 unsigned long descriptor_status;
163 while ((descriptor_status = (((unsigned long)
164 uv_read_local_mmr(mmr_offset) >>
165 right_shift) & UV_ACT_STATUS_MASK)) !=
166 DESC_STATUS_IDLE) {
167 if (descriptor_status == DESC_STATUS_SOURCE_TIMEOUT) {
168 source_timeouts++;
169 if (source_timeouts > SOURCE_TIMEOUT_LIMIT)
170 source_timeouts = 0;
171 __get_cpu_var(ptcstats).s_retry++;
172 return FLUSH_RETRY;
175 * spin here looking for progress at the destinations
177 if (descriptor_status == DESC_STATUS_DESTINATION_TIMEOUT) {
178 destination_timeouts++;
179 if (destination_timeouts > DESTINATION_TIMEOUT_LIMIT) {
181 * returns number of cpus not responding
183 if (uv_examine_destinations
184 (&bau_desc->distribution) == 0) {
185 __get_cpu_var(ptcstats).d_retry++;
186 return FLUSH_RETRY;
188 exams++;
189 if (exams >= uv_bau_retry_limit) {
190 printk(KERN_DEBUG
191 "uv_flush_tlb_others");
192 printk("giving up on cpu %d\n",
193 smp_processor_id());
194 return FLUSH_GIVEUP;
197 * delays can hang the simulator
198 udelay(1000);
200 destination_timeouts = 0;
203 cpu_relax();
205 return FLUSH_COMPLETE;
209 * uv_flush_send_and_wait
211 * Send a broadcast and wait for a broadcast message to complete.
213 * The cpumaskp mask contains the cpus the broadcast was sent to.
215 * Returns 1 if all remote flushing was done. The mask is zeroed.
216 * Returns 0 if some remote flushing remains to be done. The mask is left
217 * unchanged.
219 int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc,
220 cpumask_t *cpumaskp)
222 int completion_status = 0;
223 int right_shift;
224 int tries = 0;
225 int blade;
226 int bit;
227 unsigned long mmr_offset;
228 unsigned long index;
229 cycles_t time1;
230 cycles_t time2;
232 if (cpu < UV_CPUS_PER_ACT_STATUS) {
233 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
234 right_shift = cpu * UV_ACT_STATUS_SIZE;
235 } else {
236 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
237 right_shift =
238 ((cpu - UV_CPUS_PER_ACT_STATUS) * UV_ACT_STATUS_SIZE);
240 time1 = get_cycles();
241 do {
242 tries++;
243 index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) |
244 cpu;
245 uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
246 completion_status = uv_wait_completion(bau_desc, mmr_offset,
247 right_shift);
248 } while (completion_status == FLUSH_RETRY);
249 time2 = get_cycles();
250 __get_cpu_var(ptcstats).sflush += (time2 - time1);
251 if (tries > 1)
252 __get_cpu_var(ptcstats).retriesok++;
254 if (completion_status == FLUSH_GIVEUP) {
256 * Cause the caller to do an IPI-style TLB shootdown on
257 * the cpu's, all of which are still in the mask.
259 __get_cpu_var(ptcstats).ptc_i++;
260 return 0;
264 * Success, so clear the remote cpu's from the mask so we don't
265 * use the IPI method of shootdown on them.
267 for_each_cpu_mask(bit, *cpumaskp) {
268 blade = uv_cpu_to_blade_id(bit);
269 if (blade == this_blade)
270 continue;
271 cpu_clear(bit, *cpumaskp);
273 if (!cpus_empty(*cpumaskp))
274 return 0;
275 return 1;
279 * uv_flush_tlb_others - globally purge translation cache of a virtual
280 * address or all TLB's
281 * @cpumaskp: mask of all cpu's in which the address is to be removed
282 * @mm: mm_struct containing virtual address range
283 * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
285 * This is the entry point for initiating any UV global TLB shootdown.
287 * Purges the translation caches of all specified processors of the given
288 * virtual address, or purges all TLB's on specified processors.
290 * The caller has derived the cpumaskp from the mm_struct and has subtracted
291 * the local cpu from the mask. This function is called only if there
292 * are bits set in the mask. (e.g. flush_tlb_page())
294 * The cpumaskp is converted into a nodemask of the nodes containing
295 * the cpus.
297 * Returns 1 if all remote flushing was done.
298 * Returns 0 if some remote flushing remains to be done.
300 int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm,
301 unsigned long va)
303 int i;
304 int bit;
305 int blade;
306 int cpu;
307 int this_blade;
308 int locals = 0;
309 struct bau_desc *bau_desc;
311 cpu = uv_blade_processor_id();
312 this_blade = uv_numa_blade_id();
313 bau_desc = __get_cpu_var(bau_control).descriptor_base;
314 bau_desc += UV_ITEMS_PER_DESCRIPTOR * cpu;
316 bau_nodes_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
318 i = 0;
319 for_each_cpu_mask(bit, *cpumaskp) {
320 blade = uv_cpu_to_blade_id(bit);
321 BUG_ON(blade > (UV_DISTRIBUTION_SIZE - 1));
322 if (blade == this_blade) {
323 locals++;
324 continue;
326 bau_node_set(blade, &bau_desc->distribution);
327 i++;
329 if (i == 0) {
331 * no off_node flushing; return status for local node
333 if (locals)
334 return 0;
335 else
336 return 1;
338 __get_cpu_var(ptcstats).requestor++;
339 __get_cpu_var(ptcstats).ntargeted += i;
341 bau_desc->payload.address = va;
342 bau_desc->payload.sending_cpu = smp_processor_id();
344 return uv_flush_send_and_wait(cpu, this_blade, bau_desc, cpumaskp);
348 * The BAU message interrupt comes here. (registered by set_intr_gate)
349 * See entry_64.S
351 * We received a broadcast assist message.
353 * Interrupts may have been disabled; this interrupt could represent
354 * the receipt of several messages.
356 * All cores/threads on this node get this interrupt.
357 * The last one to see it does the s/w ack.
358 * (the resource will not be freed until noninterruptable cpus see this
359 * interrupt; hardware will timeout the s/w ack and reply ERROR)
361 void uv_bau_message_interrupt(struct pt_regs *regs)
363 struct bau_payload_queue_entry *va_queue_first;
364 struct bau_payload_queue_entry *va_queue_last;
365 struct bau_payload_queue_entry *msg;
366 struct pt_regs *old_regs = set_irq_regs(regs);
367 cycles_t time1;
368 cycles_t time2;
369 int msg_slot;
370 int sw_ack_slot;
371 int fw;
372 int count = 0;
373 unsigned long local_pnode;
375 ack_APIC_irq();
376 exit_idle();
377 irq_enter();
379 time1 = get_cycles();
381 local_pnode = uv_blade_to_pnode(uv_numa_blade_id());
383 va_queue_first = __get_cpu_var(bau_control).va_queue_first;
384 va_queue_last = __get_cpu_var(bau_control).va_queue_last;
386 msg = __get_cpu_var(bau_control).bau_msg_head;
387 while (msg->sw_ack_vector) {
388 count++;
389 fw = msg->sw_ack_vector;
390 msg_slot = msg - va_queue_first;
391 sw_ack_slot = ffs(fw) - 1;
393 uv_bau_process_message(msg, msg_slot, sw_ack_slot);
395 msg++;
396 if (msg > va_queue_last)
397 msg = va_queue_first;
398 __get_cpu_var(bau_control).bau_msg_head = msg;
400 if (!count)
401 __get_cpu_var(ptcstats).nomsg++;
402 else if (count > 1)
403 __get_cpu_var(ptcstats).multmsg++;
405 time2 = get_cycles();
406 __get_cpu_var(ptcstats).dflush += (time2 - time1);
408 irq_exit();
409 set_irq_regs(old_regs);
412 static void uv_enable_timeouts(void)
414 int i;
415 int blade;
416 int last_blade;
417 int pnode;
418 int cur_cpu = 0;
419 unsigned long apicid;
421 last_blade = -1;
422 for_each_online_node(i) {
423 blade = uv_node_to_blade_id(i);
424 if (blade == last_blade)
425 continue;
426 last_blade = blade;
427 apicid = per_cpu(x86_cpu_to_apicid, cur_cpu);
428 pnode = uv_blade_to_pnode(blade);
429 cur_cpu += uv_blade_nr_possible_cpus(i);
433 static void *uv_ptc_seq_start(struct seq_file *file, loff_t *offset)
435 if (*offset < num_possible_cpus())
436 return offset;
437 return NULL;
440 static void *uv_ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
442 (*offset)++;
443 if (*offset < num_possible_cpus())
444 return offset;
445 return NULL;
448 static void uv_ptc_seq_stop(struct seq_file *file, void *data)
453 * Display the statistics thru /proc
454 * data points to the cpu number
456 static int uv_ptc_seq_show(struct seq_file *file, void *data)
458 struct ptc_stats *stat;
459 int cpu;
461 cpu = *(loff_t *)data;
463 if (!cpu) {
464 seq_printf(file,
465 "# cpu requestor requestee one all sretry dretry ptc_i ");
466 seq_printf(file,
467 "sw_ack sflush dflush sok dnomsg dmult starget\n");
469 if (cpu < num_possible_cpus() && cpu_online(cpu)) {
470 stat = &per_cpu(ptcstats, cpu);
471 seq_printf(file, "cpu %d %ld %ld %ld %ld %ld %ld %ld ",
472 cpu, stat->requestor,
473 stat->requestee, stat->onetlb, stat->alltlb,
474 stat->s_retry, stat->d_retry, stat->ptc_i);
475 seq_printf(file, "%lx %ld %ld %ld %ld %ld %ld\n",
476 uv_read_global_mmr64(uv_blade_to_pnode
477 (uv_cpu_to_blade_id(cpu)),
478 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
479 stat->sflush, stat->dflush,
480 stat->retriesok, stat->nomsg,
481 stat->multmsg, stat->ntargeted);
484 return 0;
488 * 0: display meaning of the statistics
489 * >0: retry limit
491 static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
492 size_t count, loff_t *data)
494 long newmode;
495 char optstr[64];
497 if (count == 0 || count > sizeof(optstr))
498 return -EINVAL;
499 if (copy_from_user(optstr, user, count))
500 return -EFAULT;
501 optstr[count - 1] = '\0';
502 if (strict_strtoul(optstr, 10, &newmode) < 0) {
503 printk(KERN_DEBUG "%s is invalid\n", optstr);
504 return -EINVAL;
507 if (newmode == 0) {
508 printk(KERN_DEBUG "# cpu: cpu number\n");
509 printk(KERN_DEBUG
510 "requestor: times this cpu was the flush requestor\n");
511 printk(KERN_DEBUG
512 "requestee: times this cpu was requested to flush its TLBs\n");
513 printk(KERN_DEBUG
514 "one: times requested to flush a single address\n");
515 printk(KERN_DEBUG
516 "all: times requested to flush all TLB's\n");
517 printk(KERN_DEBUG
518 "sretry: number of retries of source-side timeouts\n");
519 printk(KERN_DEBUG
520 "dretry: number of retries of destination-side timeouts\n");
521 printk(KERN_DEBUG
522 "ptc_i: times UV fell through to IPI-style flushes\n");
523 printk(KERN_DEBUG
524 "sw_ack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n");
525 printk(KERN_DEBUG
526 "sflush_us: cycles spent in uv_flush_tlb_others()\n");
527 printk(KERN_DEBUG
528 "dflush_us: cycles spent in handling flush requests\n");
529 printk(KERN_DEBUG "sok: successes on retry\n");
530 printk(KERN_DEBUG "dnomsg: interrupts with no message\n");
531 printk(KERN_DEBUG
532 "dmult: interrupts with multiple messages\n");
533 printk(KERN_DEBUG "starget: nodes targeted\n");
534 } else {
535 uv_bau_retry_limit = newmode;
536 printk(KERN_DEBUG "timeout retry limit:%d\n",
537 uv_bau_retry_limit);
540 return count;
543 static const struct seq_operations uv_ptc_seq_ops = {
544 .start = uv_ptc_seq_start,
545 .next = uv_ptc_seq_next,
546 .stop = uv_ptc_seq_stop,
547 .show = uv_ptc_seq_show
550 static int uv_ptc_proc_open(struct inode *inode, struct file *file)
552 return seq_open(file, &uv_ptc_seq_ops);
555 static const struct file_operations proc_uv_ptc_operations = {
556 .open = uv_ptc_proc_open,
557 .read = seq_read,
558 .write = uv_ptc_proc_write,
559 .llseek = seq_lseek,
560 .release = seq_release,
563 static int __init uv_ptc_init(void)
565 struct proc_dir_entry *proc_uv_ptc;
567 if (!is_uv_system())
568 return 0;
570 proc_uv_ptc = create_proc_entry(UV_PTC_BASENAME, 0444, NULL);
571 if (!proc_uv_ptc) {
572 printk(KERN_ERR "unable to create %s proc entry\n",
573 UV_PTC_BASENAME);
574 return -EINVAL;
576 proc_uv_ptc->proc_fops = &proc_uv_ptc_operations;
577 return 0;
581 * begin the initialization of the per-blade control structures
583 static struct bau_control * __init uv_table_bases_init(int blade, int node)
585 int i;
586 struct bau_msg_status *msp;
587 struct bau_control *bau_tabp;
589 bau_tabp =
590 kmalloc_node(sizeof(struct bau_control), GFP_KERNEL, node);
591 BUG_ON(!bau_tabp);
593 bau_tabp->msg_statuses =
594 kmalloc_node(sizeof(struct bau_msg_status) *
595 DEST_Q_SIZE, GFP_KERNEL, node);
596 BUG_ON(!bau_tabp->msg_statuses);
598 for (i = 0, msp = bau_tabp->msg_statuses; i < DEST_Q_SIZE; i++, msp++)
599 bau_cpubits_clear(&msp->seen_by, (int)
600 uv_blade_nr_possible_cpus(blade));
602 uv_bau_table_bases[blade] = bau_tabp;
604 return bau_tabp;
608 * finish the initialization of the per-blade control structures
610 static void __init
611 uv_table_bases_finish(int blade, int node, int cur_cpu,
612 struct bau_control *bau_tablesp,
613 struct bau_desc *adp)
615 struct bau_control *bcp;
616 int i;
618 for (i = cur_cpu; i < cur_cpu + uv_blade_nr_possible_cpus(blade); i++) {
619 bcp = (struct bau_control *)&per_cpu(bau_control, i);
621 bcp->bau_msg_head = bau_tablesp->va_queue_first;
622 bcp->va_queue_first = bau_tablesp->va_queue_first;
623 bcp->va_queue_last = bau_tablesp->va_queue_last;
624 bcp->msg_statuses = bau_tablesp->msg_statuses;
625 bcp->descriptor_base = adp;
630 * initialize the sending side's sending buffers
632 static struct bau_desc * __init
633 uv_activation_descriptor_init(int node, int pnode)
635 int i;
636 unsigned long pa;
637 unsigned long m;
638 unsigned long n;
639 unsigned long mmr_image;
640 struct bau_desc *adp;
641 struct bau_desc *ad2;
643 adp = (struct bau_desc *)
644 kmalloc_node(16384, GFP_KERNEL, node);
645 BUG_ON(!adp);
647 pa = __pa((unsigned long)adp);
648 n = pa >> uv_nshift;
649 m = pa & uv_mmask;
651 mmr_image = uv_read_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE);
652 if (mmr_image) {
653 uv_write_global_mmr64(pnode, (unsigned long)
654 UVH_LB_BAU_SB_DESCRIPTOR_BASE,
655 (n << UV_DESC_BASE_PNODE_SHIFT | m));
658 for (i = 0, ad2 = adp; i < UV_ACTIVATION_DESCRIPTOR_SIZE; i++, ad2++) {
659 memset(ad2, 0, sizeof(struct bau_desc));
660 ad2->header.sw_ack_flag = 1;
661 ad2->header.base_dest_nodeid =
662 uv_blade_to_pnode(uv_cpu_to_blade_id(0));
663 ad2->header.command = UV_NET_ENDPOINT_INTD;
664 ad2->header.int_both = 1;
666 * all others need to be set to zero:
667 * fairness chaining multilevel count replied_to
670 return adp;
674 * initialize the destination side's receiving buffers
676 static struct bau_payload_queue_entry * __init
677 uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp)
679 struct bau_payload_queue_entry *pqp;
680 char *cp;
682 pqp = (struct bau_payload_queue_entry *) kmalloc_node(
683 (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry),
684 GFP_KERNEL, node);
685 BUG_ON(!pqp);
687 cp = (char *)pqp + 31;
688 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
689 bau_tablesp->va_queue_first = pqp;
690 uv_write_global_mmr64(pnode,
691 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST,
692 ((unsigned long)pnode <<
693 UV_PAYLOADQ_PNODE_SHIFT) |
694 uv_physnodeaddr(pqp));
695 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
696 uv_physnodeaddr(pqp));
697 bau_tablesp->va_queue_last = pqp + (DEST_Q_SIZE - 1);
698 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST,
699 (unsigned long)
700 uv_physnodeaddr(bau_tablesp->va_queue_last));
701 memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE);
703 return pqp;
707 * Initialization of each UV blade's structures
709 static int __init uv_init_blade(int blade, int node, int cur_cpu)
711 int pnode;
712 unsigned long pa;
713 unsigned long apicid;
714 struct bau_desc *adp;
715 struct bau_payload_queue_entry *pqp;
716 struct bau_control *bau_tablesp;
718 bau_tablesp = uv_table_bases_init(blade, node);
719 pnode = uv_blade_to_pnode(blade);
720 adp = uv_activation_descriptor_init(node, pnode);
721 pqp = uv_payload_queue_init(node, pnode, bau_tablesp);
722 uv_table_bases_finish(blade, node, cur_cpu, bau_tablesp, adp);
724 * the below initialization can't be in firmware because the
725 * messaging IRQ will be determined by the OS
727 apicid = per_cpu(x86_cpu_to_apicid, cur_cpu);
728 pa = uv_read_global_mmr64(pnode, UVH_BAU_DATA_CONFIG);
729 if ((pa & 0xff) != UV_BAU_MESSAGE) {
730 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
731 ((apicid << 32) | UV_BAU_MESSAGE));
733 return 0;
737 * Initialization of BAU-related structures
739 static int __init uv_bau_init(void)
741 int blade;
742 int node;
743 int nblades;
744 int last_blade;
745 int cur_cpu = 0;
747 if (!is_uv_system())
748 return 0;
750 uv_bau_retry_limit = 1;
751 uv_nshift = uv_hub_info->n_val;
752 uv_mmask = (1UL << uv_hub_info->n_val) - 1;
753 nblades = 0;
754 last_blade = -1;
755 for_each_online_node(node) {
756 blade = uv_node_to_blade_id(node);
757 if (blade == last_blade)
758 continue;
759 last_blade = blade;
760 nblades++;
762 uv_bau_table_bases = (struct bau_control **)
763 kmalloc(nblades * sizeof(struct bau_control *), GFP_KERNEL);
764 BUG_ON(!uv_bau_table_bases);
766 last_blade = -1;
767 for_each_online_node(node) {
768 blade = uv_node_to_blade_id(node);
769 if (blade == last_blade)
770 continue;
771 last_blade = blade;
772 uv_init_blade(blade, node, cur_cpu);
773 cur_cpu += uv_blade_nr_possible_cpus(blade);
775 alloc_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1);
776 uv_enable_timeouts();
778 return 0;
780 __initcall(uv_bau_init);
781 __initcall(uv_ptc_init);