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smsc911x: make smsc911x_poll_controller static
[linux-2.6/mini2440.git] / drivers / net / smsc911x.c
blobae327166f97887fc7c806670a00eff041da6bc73
1 /***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
23 *
24 * Supported devices:
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
27 * LAN9210, LAN9211
28 * LAN9220, LAN9221
29 *
30 */
31
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/timer.h>
46 #include <linux/version.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
50 #include <linux/io.h>
51 #include <linux/phy.h>
52 #include <linux/smsc911x.h>
53 #include "smsc911x.h"
54
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
58
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION);
61
62 #if USE_DEBUG > 0
63 static int debug = 16;
64 #else
65 static int debug = 3;
66 #endif
67
68 module_param(debug, int, 0);
69 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
70
71 struct smsc911x_data {
72 void __iomem *ioaddr;
73
74 unsigned int idrev;
75
76 /* used to decide which workarounds apply */
77 unsigned int generation;
78
79 /* device configuration (copied from platform_data during probe) */
80 struct smsc911x_platform_config config;
81
82 /* This needs to be acquired before calling any of below:
83 * smsc911x_mac_read(), smsc911x_mac_write()
84 */
85 spinlock_t mac_lock;
86
87 /* spinlock to ensure 16-bit accesses are serialised.
88 * unused with a 32-bit bus */
89 spinlock_t dev_lock;
90
91 struct phy_device *phy_dev;
92 struct mii_bus *mii_bus;
93 int phy_irq[PHY_MAX_ADDR];
94 unsigned int using_extphy;
95 int last_duplex;
96 int last_carrier;
97
98 u32 msg_enable;
99 unsigned int gpio_setting;
100 unsigned int gpio_orig_setting;
101 struct net_device *dev;
102 struct napi_struct napi;
103
104 unsigned int software_irq_signal;
105
106 #ifdef USE_PHY_WORK_AROUND
107 #define MIN_PACKET_SIZE (64)
108 char loopback_tx_pkt[MIN_PACKET_SIZE];
109 char loopback_rx_pkt[MIN_PACKET_SIZE];
110 unsigned int resetcount;
111 #endif
112
113 /* Members for Multicast filter workaround */
114 unsigned int multicast_update_pending;
115 unsigned int set_bits_mask;
116 unsigned int clear_bits_mask;
117 unsigned int hashhi;
118 unsigned int hashlo;
119 };
120
121 /* The 16-bit access functions are significantly slower, due to the locking
122 * necessary. If your bus hardware can be configured to do this for you
123 * (in response to a single 32-bit operation from software), you should use
124 * the 32-bit access functions instead. */
125
126 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
127 {
128 if (pdata->config.flags & SMSC911X_USE_32BIT)
129 return readl(pdata->ioaddr + reg);
130
131 if (pdata->config.flags & SMSC911X_USE_16BIT) {
132 u32 data;
133 unsigned long flags;
134
135 /* these two 16-bit reads must be performed consecutively, so
136 * must not be interrupted by our own ISR (which would start
137 * another read operation) */
138 spin_lock_irqsave(&pdata->dev_lock, flags);
139 data = ((readw(pdata->ioaddr + reg) & 0xFFFF) |
140 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
141 spin_unlock_irqrestore(&pdata->dev_lock, flags);
142
143 return data;
144 }
145
146 BUG();
147 }
148
149 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
150 u32 val)
151 {
152 if (pdata->config.flags & SMSC911X_USE_32BIT) {
153 writel(val, pdata->ioaddr + reg);
154 return;
155 }
156
157 if (pdata->config.flags & SMSC911X_USE_16BIT) {
158 unsigned long flags;
159
160 /* these two 16-bit writes must be performed consecutively, so
161 * must not be interrupted by our own ISR (which would start
162 * another read operation) */
163 spin_lock_irqsave(&pdata->dev_lock, flags);
164 writew(val & 0xFFFF, pdata->ioaddr + reg);
165 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
166 spin_unlock_irqrestore(&pdata->dev_lock, flags);
167 return;
168 }
169
170 BUG();
171 }
172
173 /* Writes a packet to the TX_DATA_FIFO */
174 static inline void
175 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
176 unsigned int wordcount)
177 {
178 if (pdata->config.flags & SMSC911X_USE_32BIT) {
179 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
180 return;
181 }
182
183 if (pdata->config.flags & SMSC911X_USE_16BIT) {
184 while (wordcount--)
185 smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
186 return;
187 }
188
189 BUG();
190 }
191
192 /* Reads a packet out of the RX_DATA_FIFO */
193 static inline void
194 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
195 unsigned int wordcount)
196 {
197 if (pdata->config.flags & SMSC911X_USE_32BIT) {
198 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
199 return;
200 }
201
202 if (pdata->config.flags & SMSC911X_USE_16BIT) {
203 while (wordcount--)
204 *buf++ = smsc911x_reg_read(pdata, RX_DATA_FIFO);
205 return;
206 }
207
208 BUG();
209 }
210
211 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
212 * and smsc911x_mac_write, so assumes mac_lock is held */
213 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
214 {
215 int i;
216 u32 val;
217
218 SMSC_ASSERT_MAC_LOCK(pdata);
219
220 for (i = 0; i < 40; i++) {
221 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
222 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
223 return 0;
224 }
225 SMSC_WARNING(HW, "Timed out waiting for MAC not BUSY. "
226 "MAC_CSR_CMD: 0x%08X", val);
227 return -EIO;
228 }
229
230 /* Fetches a MAC register value. Assumes mac_lock is acquired */
231 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
232 {
233 unsigned int temp;
234
235 SMSC_ASSERT_MAC_LOCK(pdata);
236
237 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
238 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
239 SMSC_WARNING(HW, "MAC busy at entry");
240 return 0xFFFFFFFF;
241 }
242
243 /* Send the MAC cmd */
244 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
245 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
246
247 /* Workaround for hardware read-after-write restriction */
248 temp = smsc911x_reg_read(pdata, BYTE_TEST);
249
250 /* Wait for the read to complete */
251 if (likely(smsc911x_mac_complete(pdata) == 0))
252 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
253
254 SMSC_WARNING(HW, "MAC busy after read");
255 return 0xFFFFFFFF;
256 }
257
258 /* Set a mac register, mac_lock must be acquired before calling */
259 static void smsc911x_mac_write(struct smsc911x_data *pdata,
260 unsigned int offset, u32 val)
261 {
262 unsigned int temp;
263
264 SMSC_ASSERT_MAC_LOCK(pdata);
265
266 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
267 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
268 SMSC_WARNING(HW,
269 "smsc911x_mac_write failed, MAC busy at entry");
270 return;
271 }
272
273 /* Send data to write */
274 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
275
276 /* Write the actual data */
277 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
278 MAC_CSR_CMD_CSR_BUSY_));
279
280 /* Workaround for hardware read-after-write restriction */
281 temp = smsc911x_reg_read(pdata, BYTE_TEST);
282
283 /* Wait for the write to complete */
284 if (likely(smsc911x_mac_complete(pdata) == 0))
285 return;
286
287 SMSC_WARNING(HW,
288 "smsc911x_mac_write failed, MAC busy after write");
289 }
290
291 /* Get a phy register */
292 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
293 {
294 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
295 unsigned long flags;
296 unsigned int addr;
297 int i, reg;
298
299 spin_lock_irqsave(&pdata->mac_lock, flags);
300
301 /* Confirm MII not busy */
302 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
303 SMSC_WARNING(HW,
304 "MII is busy in smsc911x_mii_read???");
305 reg = -EIO;
306 goto out;
307 }
308
309 /* Set the address, index & direction (read from PHY) */
310 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
311 smsc911x_mac_write(pdata, MII_ACC, addr);
312
313 /* Wait for read to complete w/ timeout */
314 for (i = 0; i < 100; i++)
315 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
316 reg = smsc911x_mac_read(pdata, MII_DATA);
317 goto out;
318 }
319
320 SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
321 reg = -EIO;
322
323 out:
324 spin_unlock_irqrestore(&pdata->mac_lock, flags);
325 return reg;
326 }
327
328 /* Set a phy register */
329 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
330 u16 val)
331 {
332 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
333 unsigned long flags;
334 unsigned int addr;
335 int i, reg;
336
337 spin_lock_irqsave(&pdata->mac_lock, flags);
338
339 /* Confirm MII not busy */
340 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
341 SMSC_WARNING(HW,
342 "MII is busy in smsc911x_mii_write???");
343 reg = -EIO;
344 goto out;
345 }
346
347 /* Put the data to write in the MAC */
348 smsc911x_mac_write(pdata, MII_DATA, val);
349
350 /* Set the address, index & direction (write to PHY) */
351 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
352 MII_ACC_MII_WRITE_;
353 smsc911x_mac_write(pdata, MII_ACC, addr);
354
355 /* Wait for write to complete w/ timeout */
356 for (i = 0; i < 100; i++)
357 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
358 reg = 0;
359 goto out;
360 }
361
362 SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
363 reg = -EIO;
364
365 out:
366 spin_unlock_irqrestore(&pdata->mac_lock, flags);
367 return reg;
368 }
369
370 /* Autodetects and initialises external phy for SMSC9115 and SMSC9117 flavors.
371 * If something goes wrong, returns -ENODEV to revert back to internal phy.
372 * Performed at initialisation only, so interrupts are enabled */
373 static int smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
374 {
375 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
376
377 /* External phy is requested, supported, and detected */
378 if (hwcfg & HW_CFG_EXT_PHY_DET_) {
379
380 /* Switch to external phy. Assuming tx and rx are stopped
381 * because smsc911x_phy_initialise is called before
382 * smsc911x_rx_initialise and tx_initialise. */
383
384 /* Disable phy clocks to the MAC */
385 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
386 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
387 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
388 udelay(10); /* Enough time for clocks to stop */
389
390 /* Switch to external phy */
391 hwcfg |= HW_CFG_EXT_PHY_EN_;
392 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
393
394 /* Enable phy clocks to the MAC */
395 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
396 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
397 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
398 udelay(10); /* Enough time for clocks to restart */
399
400 hwcfg |= HW_CFG_SMI_SEL_;
401 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
402
403 SMSC_TRACE(HW, "Successfully switched to external PHY");
404 pdata->using_extphy = 1;
405 } else {
406 SMSC_WARNING(HW, "No external PHY detected, "
407 "Using internal PHY instead.");
408 /* Use internal phy */
409 return -ENODEV;
410 }
411 return 0;
412 }
413
414 /* Fetches a tx status out of the status fifo */
415 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
416 {
417 unsigned int result =
418 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
419
420 if (result != 0)
421 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
422
423 return result;
424 }
425
426 /* Fetches the next rx status */
427 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
428 {
429 unsigned int result =
430 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
431
432 if (result != 0)
433 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
434
435 return result;
436 }
437
438 #ifdef USE_PHY_WORK_AROUND
439 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
440 {
441 unsigned int tries;
442 u32 wrsz;
443 u32 rdsz;
444 ulong bufp;
445
446 for (tries = 0; tries < 10; tries++) {
447 unsigned int txcmd_a;
448 unsigned int txcmd_b;
449 unsigned int status;
450 unsigned int pktlength;
451 unsigned int i;
452
453 /* Zero-out rx packet memory */
454 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
455
456 /* Write tx packet to 118 */
457 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
458 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
459 txcmd_a |= MIN_PACKET_SIZE;
460
461 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
462
463 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
464 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
465
466 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
467 wrsz = MIN_PACKET_SIZE + 3;
468 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
469 wrsz >>= 2;
470
471 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
472
473 /* Wait till transmit is done */
474 i = 60;
475 do {
476 udelay(5);
477 status = smsc911x_tx_get_txstatus(pdata);
478 } while ((i--) && (!status));
479
480 if (!status) {
481 SMSC_WARNING(HW, "Failed to transmit "
482 "during loopback test");
483 continue;
484 }
485 if (status & TX_STS_ES_) {
486 SMSC_WARNING(HW, "Transmit encountered "
487 "errors during loopback test");
488 continue;
489 }
490
491 /* Wait till receive is done */
492 i = 60;
493 do {
494 udelay(5);
495 status = smsc911x_rx_get_rxstatus(pdata);
496 } while ((i--) && (!status));
497
498 if (!status) {
499 SMSC_WARNING(HW,
500 "Failed to receive during loopback test");
501 continue;
502 }
503 if (status & RX_STS_ES_) {
504 SMSC_WARNING(HW, "Receive encountered "
505 "errors during loopback test");
506 continue;
507 }
508
509 pktlength = ((status & 0x3FFF0000UL) >> 16);
510 bufp = (ulong)pdata->loopback_rx_pkt;
511 rdsz = pktlength + 3;
512 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
513 rdsz >>= 2;
514
515 smsc911x_rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
516
517 if (pktlength != (MIN_PACKET_SIZE + 4)) {
518 SMSC_WARNING(HW, "Unexpected packet size "
519 "during loop back test, size=%d, will retry",
520 pktlength);
521 } else {
522 unsigned int j;
523 int mismatch = 0;
524 for (j = 0; j < MIN_PACKET_SIZE; j++) {
525 if (pdata->loopback_tx_pkt[j]
526 != pdata->loopback_rx_pkt[j]) {
527 mismatch = 1;
528 break;
529 }
530 }
531 if (!mismatch) {
532 SMSC_TRACE(HW, "Successfully verified "
533 "loopback packet");
534 return 0;
535 } else {
536 SMSC_WARNING(HW, "Data mismatch "
537 "during loop back test, will retry");
538 }
539 }
540 }
541
542 return -EIO;
543 }
544
545 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
546 {
547 struct phy_device *phy_dev = pdata->phy_dev;
548 unsigned int temp;
549 unsigned int i = 100000;
550
551 BUG_ON(!phy_dev);
552 BUG_ON(!phy_dev->bus);
553
554 SMSC_TRACE(HW, "Performing PHY BCR Reset");
555 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
556 do {
557 msleep(1);
558 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
559 MII_BMCR);
560 } while ((i--) && (temp & BMCR_RESET));
561
562 if (temp & BMCR_RESET) {
563 SMSC_WARNING(HW, "PHY reset failed to complete.");
564 return -EIO;
565 }
566 /* Extra delay required because the phy may not be completed with
567 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
568 * enough delay but using 1ms here to be safe */
569 msleep(1);
570
571 return 0;
572 }
573
574 static int smsc911x_phy_loopbacktest(struct net_device *dev)
575 {
576 struct smsc911x_data *pdata = netdev_priv(dev);
577 struct phy_device *phy_dev = pdata->phy_dev;
578 int result = -EIO;
579 unsigned int i, val;
580 unsigned long flags;
581
582 /* Initialise tx packet using broadcast destination address */
583 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
584
585 /* Use incrementing source address */
586 for (i = 6; i < 12; i++)
587 pdata->loopback_tx_pkt[i] = (char)i;
588
589 /* Set length type field */
590 pdata->loopback_tx_pkt[12] = 0x00;
591 pdata->loopback_tx_pkt[13] = 0x00;
592
593 for (i = 14; i < MIN_PACKET_SIZE; i++)
594 pdata->loopback_tx_pkt[i] = (char)i;
595
596 val = smsc911x_reg_read(pdata, HW_CFG);
597 val &= HW_CFG_TX_FIF_SZ_;
598 val |= HW_CFG_SF_;
599 smsc911x_reg_write(pdata, HW_CFG, val);
600
601 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
602 smsc911x_reg_write(pdata, RX_CFG,
603 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
604
605 for (i = 0; i < 10; i++) {
606 /* Set PHY to 10/FD, no ANEG, and loopback mode */
607 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
608 BMCR_LOOPBACK | BMCR_FULLDPLX);
609
610 /* Enable MAC tx/rx, FD */
611 spin_lock_irqsave(&pdata->mac_lock, flags);
612 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
613 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
614 spin_unlock_irqrestore(&pdata->mac_lock, flags);
615
616 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
617 result = 0;
618 break;
619 }
620 pdata->resetcount++;
621
622 /* Disable MAC rx */
623 spin_lock_irqsave(&pdata->mac_lock, flags);
624 smsc911x_mac_write(pdata, MAC_CR, 0);
625 spin_unlock_irqrestore(&pdata->mac_lock, flags);
626
627 smsc911x_phy_reset(pdata);
628 }
629
630 /* Disable MAC */
631 spin_lock_irqsave(&pdata->mac_lock, flags);
632 smsc911x_mac_write(pdata, MAC_CR, 0);
633 spin_unlock_irqrestore(&pdata->mac_lock, flags);
634
635 /* Cancel PHY loopback mode */
636 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
637
638 smsc911x_reg_write(pdata, TX_CFG, 0);
639 smsc911x_reg_write(pdata, RX_CFG, 0);
640
641 return result;
642 }
643 #endif /* USE_PHY_WORK_AROUND */
644
645 static u8 smsc95xx_resolve_flowctrl_fulldplx(u16 lcladv, u16 rmtadv)
646 {
647 u8 cap = 0;
648
649 if (lcladv & ADVERTISE_PAUSE_CAP) {
650 if (lcladv & ADVERTISE_PAUSE_ASYM) {
651 if (rmtadv & LPA_PAUSE_CAP)
652 cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
653 else if (rmtadv & LPA_PAUSE_ASYM)
654 cap = FLOW_CTRL_RX;
655 } else {
656 if (rmtadv & LPA_PAUSE_CAP)
657 cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
658 }
659 } else if (lcladv & ADVERTISE_PAUSE_ASYM) {
660 if ((rmtadv & LPA_PAUSE_CAP) && (rmtadv & LPA_PAUSE_ASYM))
661 cap = FLOW_CTRL_TX;
662 }
663
664 return cap;
665 }
666
667 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
668 {
669 struct phy_device *phy_dev = pdata->phy_dev;
670 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
671 u32 flow;
672 unsigned long flags;
673
674 if (phy_dev->duplex == DUPLEX_FULL) {
675 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
676 u16 rmtadv = phy_read(phy_dev, MII_LPA);
677 u8 cap = smsc95xx_resolve_flowctrl_fulldplx(lcladv, rmtadv);
678
679 if (cap & FLOW_CTRL_RX)
680 flow = 0xFFFF0002;
681 else
682 flow = 0;
683
684 if (cap & FLOW_CTRL_TX)
685 afc |= 0xF;
686 else
687 afc &= ~0xF;
688
689 SMSC_TRACE(HW, "rx pause %s, tx pause %s",
690 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
691 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
692 } else {
693 SMSC_TRACE(HW, "half duplex");
694 flow = 0;
695 afc |= 0xF;
696 }
697
698 spin_lock_irqsave(&pdata->mac_lock, flags);
699 smsc911x_mac_write(pdata, FLOW, flow);
700 spin_unlock_irqrestore(&pdata->mac_lock, flags);
701
702 smsc911x_reg_write(pdata, AFC_CFG, afc);
703 }
704
705 /* Update link mode if anything has changed. Called periodically when the
706 * PHY is in polling mode, even if nothing has changed. */
707 static void smsc911x_phy_adjust_link(struct net_device *dev)
708 {
709 struct smsc911x_data *pdata = netdev_priv(dev);
710 struct phy_device *phy_dev = pdata->phy_dev;
711 unsigned long flags;
712 int carrier;
713
714 if (phy_dev->duplex != pdata->last_duplex) {
715 unsigned int mac_cr;
716 SMSC_TRACE(HW, "duplex state has changed");
717
718 spin_lock_irqsave(&pdata->mac_lock, flags);
719 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
720 if (phy_dev->duplex) {
721 SMSC_TRACE(HW,
722 "configuring for full duplex mode");
723 mac_cr |= MAC_CR_FDPX_;
724 } else {
725 SMSC_TRACE(HW,
726 "configuring for half duplex mode");
727 mac_cr &= ~MAC_CR_FDPX_;
728 }
729 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
730 spin_unlock_irqrestore(&pdata->mac_lock, flags);
731
732 smsc911x_phy_update_flowcontrol(pdata);
733 pdata->last_duplex = phy_dev->duplex;
734 }
735
736 carrier = netif_carrier_ok(dev);
737 if (carrier != pdata->last_carrier) {
738 SMSC_TRACE(HW, "carrier state has changed");
739 if (carrier) {
740 SMSC_TRACE(HW, "configuring for carrier OK");
741 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
742 (!pdata->using_extphy)) {
743 /* Restore orginal GPIO configuration */
744 pdata->gpio_setting = pdata->gpio_orig_setting;
745 smsc911x_reg_write(pdata, GPIO_CFG,
746 pdata->gpio_setting);
747 }
748 } else {
749 SMSC_TRACE(HW, "configuring for no carrier");
750 /* Check global setting that LED1
751 * usage is 10/100 indicator */
752 pdata->gpio_setting = smsc911x_reg_read(pdata,
753 GPIO_CFG);
754 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_)
755 && (!pdata->using_extphy)) {
756 /* Force 10/100 LED off, after saving
757 * orginal GPIO configuration */
758 pdata->gpio_orig_setting = pdata->gpio_setting;
759
760 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
761 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
762 | GPIO_CFG_GPIODIR0_
763 | GPIO_CFG_GPIOD0_);
764 smsc911x_reg_write(pdata, GPIO_CFG,
765 pdata->gpio_setting);
766 }
767 }
768 pdata->last_carrier = carrier;
769 }
770 }
771
772 static int smsc911x_mii_probe(struct net_device *dev)
773 {
774 struct smsc911x_data *pdata = netdev_priv(dev);
775 struct phy_device *phydev = NULL;
776 int phy_addr;
777
778 /* find the first phy */
779 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
780 if (pdata->mii_bus->phy_map[phy_addr]) {
781 phydev = pdata->mii_bus->phy_map[phy_addr];
782 SMSC_TRACE(PROBE, "PHY %d: addr %d, phy_id 0x%08X",
783 phy_addr, phydev->addr, phydev->phy_id);
784 break;
785 }
786 }
787
788 if (!phydev) {
789 pr_err("%s: no PHY found\n", dev->name);
790 return -ENODEV;
791 }
792
793 phydev = phy_connect(dev, phydev->dev.bus_id,
794 &smsc911x_phy_adjust_link, 0, pdata->config.phy_interface);
795
796 if (IS_ERR(phydev)) {
797 pr_err("%s: Could not attach to PHY\n", dev->name);
798 return PTR_ERR(phydev);
799 }
800
801 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
802 dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
803
804 /* mask with MAC supported features */
805 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
806 SUPPORTED_Asym_Pause);
807 phydev->advertising = phydev->supported;
808
809 pdata->phy_dev = phydev;
810 pdata->last_duplex = -1;
811 pdata->last_carrier = -1;
812
813 #ifdef USE_PHY_WORK_AROUND
814 if (smsc911x_phy_loopbacktest(dev) < 0) {
815 SMSC_WARNING(HW, "Failed Loop Back Test");
816 return -ENODEV;
817 }
818 SMSC_TRACE(HW, "Passed Loop Back Test");
819 #endif /* USE_PHY_WORK_AROUND */
820
821 SMSC_TRACE(HW, "phy initialised succesfully");
822 return 0;
823 }
824
825 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
826 struct net_device *dev)
827 {
828 struct smsc911x_data *pdata = netdev_priv(dev);
829 int err = -ENXIO, i;
830
831 pdata->mii_bus = mdiobus_alloc();
832 if (!pdata->mii_bus) {
833 err = -ENOMEM;
834 goto err_out_1;
835 }
836
837 pdata->mii_bus->name = SMSC_MDIONAME;
838 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
839 pdata->mii_bus->priv = pdata;
840 pdata->mii_bus->read = smsc911x_mii_read;
841 pdata->mii_bus->write = smsc911x_mii_write;
842 pdata->mii_bus->irq = pdata->phy_irq;
843 for (i = 0; i < PHY_MAX_ADDR; ++i)
844 pdata->mii_bus->irq[i] = PHY_POLL;
845
846 pdata->mii_bus->parent = &pdev->dev;
847 dev_set_drvdata(&pdev->dev, &pdata->mii_bus);
848
849 pdata->using_extphy = 0;
850
851 switch (pdata->idrev & 0xFFFF0000) {
852 case 0x01170000:
853 case 0x01150000:
854 case 0x117A0000:
855 case 0x115A0000:
856 /* External PHY supported, try to autodetect */
857 if (smsc911x_phy_initialise_external(pdata) < 0) {
858 SMSC_TRACE(HW, "No external PHY detected, "
859 "using internal PHY");
860 }
861 break;
862 default:
863 SMSC_TRACE(HW, "External PHY is not supported, "
864 "using internal PHY");
865 break;
866 }
867
868 if (!pdata->using_extphy) {
869 /* Mask all PHYs except ID 1 (internal) */
870 pdata->mii_bus->phy_mask = ~(1 << 1);
871 }
872
873 if (mdiobus_register(pdata->mii_bus)) {
874 SMSC_WARNING(PROBE, "Error registering mii bus");
875 goto err_out_free_bus_2;
876 }
877
878 if (smsc911x_mii_probe(dev) < 0) {
879 SMSC_WARNING(PROBE, "Error registering mii bus");
880 goto err_out_unregister_bus_3;
881 }
882
883 return 0;
884
885 err_out_unregister_bus_3:
886 mdiobus_unregister(pdata->mii_bus);
887 err_out_free_bus_2:
888 mdiobus_free(pdata->mii_bus);
889 err_out_1:
890 return err;
891 }
892
893 /* Gets the number of tx statuses in the fifo */
894 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
895 {
896 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
897 & TX_FIFO_INF_TSUSED_) >> 16;
898 }
899
900 /* Reads tx statuses and increments counters where necessary */
901 static void smsc911x_tx_update_txcounters(struct net_device *dev)
902 {
903 struct smsc911x_data *pdata = netdev_priv(dev);
904 unsigned int tx_stat;
905
906 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
907 if (unlikely(tx_stat & 0x80000000)) {
908 /* In this driver the packet tag is used as the packet
909 * length. Since a packet length can never reach the
910 * size of 0x8000, this bit is reserved. It is worth
911 * noting that the "reserved bit" in the warning above
912 * does not reference a hardware defined reserved bit
913 * but rather a driver defined one.
914 */
915 SMSC_WARNING(HW,
916 "Packet tag reserved bit is high");
917 } else {
918 if (unlikely(tx_stat & 0x00008000)) {
919 dev->stats.tx_errors++;
920 } else {
921 dev->stats.tx_packets++;
922 dev->stats.tx_bytes += (tx_stat >> 16);
923 }
924 if (unlikely(tx_stat & 0x00000100)) {
925 dev->stats.collisions += 16;
926 dev->stats.tx_aborted_errors += 1;
927 } else {
928 dev->stats.collisions +=
929 ((tx_stat >> 3) & 0xF);
930 }
931 if (unlikely(tx_stat & 0x00000800))
932 dev->stats.tx_carrier_errors += 1;
933 if (unlikely(tx_stat & 0x00000200)) {
934 dev->stats.collisions++;
935 dev->stats.tx_aborted_errors++;
936 }
937 }
938 }
939 }
940
941 /* Increments the Rx error counters */
942 static void
943 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
944 {
945 int crc_err = 0;
946
947 if (unlikely(rxstat & 0x00008000)) {
948 dev->stats.rx_errors++;
949 if (unlikely(rxstat & 0x00000002)) {
950 dev->stats.rx_crc_errors++;
951 crc_err = 1;
952 }
953 }
954 if (likely(!crc_err)) {
955 if (unlikely((rxstat & 0x00001020) == 0x00001020)) {
956 /* Frame type indicates length,
957 * and length error is set */
958 dev->stats.rx_length_errors++;
959 }
960 if (rxstat & RX_STS_MCAST_)
961 dev->stats.multicast++;
962 }
963 }
964
965 /* Quickly dumps bad packets */
966 static void
967 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
968 {
969 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
970
971 if (likely(pktwords >= 4)) {
972 unsigned int timeout = 500;
973 unsigned int val;
974 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
975 do {
976 udelay(1);
977 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
978 } while (timeout-- && (val & RX_DP_CTRL_RX_FFWD_));
979
980 if (unlikely(timeout == 0))
981 SMSC_WARNING(HW, "Timed out waiting for "
982 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
983 } else {
984 unsigned int temp;
985 while (pktwords--)
986 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
987 }
988 }
989
990 /* NAPI poll function */
991 static int smsc911x_poll(struct napi_struct *napi, int budget)
992 {
993 struct smsc911x_data *pdata =
994 container_of(napi, struct smsc911x_data, napi);
995 struct net_device *dev = pdata->dev;
996 int npackets = 0;
997
998 while (likely(netif_running(dev)) && (npackets < budget)) {
999 unsigned int pktlength;
1000 unsigned int pktwords;
1001 struct sk_buff *skb;
1002 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1003
1004 if (!rxstat) {
1005 unsigned int temp;
1006 /* We processed all packets available. Tell NAPI it can
1007 * stop polling then re-enable rx interrupts */
1008 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1009 netif_rx_complete(dev, napi);
1010 temp = smsc911x_reg_read(pdata, INT_EN);
1011 temp |= INT_EN_RSFL_EN_;
1012 smsc911x_reg_write(pdata, INT_EN, temp);
1013 break;
1014 }
1015
1016 /* Count packet for NAPI scheduling, even if it has an error.
1017 * Error packets still require cycles to discard */
1018 npackets++;
1019
1020 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1021 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1022 smsc911x_rx_counterrors(dev, rxstat);
1023
1024 if (unlikely(rxstat & RX_STS_ES_)) {
1025 SMSC_WARNING(RX_ERR,
1026 "Discarding packet with error bit set");
1027 /* Packet has an error, discard it and continue with
1028 * the next */
1029 smsc911x_rx_fastforward(pdata, pktwords);
1030 dev->stats.rx_dropped++;
1031 continue;
1032 }
1033
1034 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1035 if (unlikely(!skb)) {
1036 SMSC_WARNING(RX_ERR,
1037 "Unable to allocate skb for rx packet");
1038 /* Drop the packet and stop this polling iteration */
1039 smsc911x_rx_fastforward(pdata, pktwords);
1040 dev->stats.rx_dropped++;
1041 break;
1042 }
1043
1044 skb->data = skb->head;
1045 skb_reset_tail_pointer(skb);
1046
1047 /* Align IP on 16B boundary */
1048 skb_reserve(skb, NET_IP_ALIGN);
1049 skb_put(skb, pktlength - 4);
1050 smsc911x_rx_readfifo(pdata, (unsigned int *)skb->head,
1051 pktwords);
1052 skb->protocol = eth_type_trans(skb, dev);
1053 skb->ip_summed = CHECKSUM_NONE;
1054 netif_receive_skb(skb);
1055
1056 /* Update counters */
1057 dev->stats.rx_packets++;
1058 dev->stats.rx_bytes += (pktlength - 4);
1059 dev->last_rx = jiffies;
1060 }
1061
1062 /* Return total received packets */
1063 return npackets;
1064 }
1065
1066 /* Returns hash bit number for given MAC address
1067 * Example:
1068 * 01 00 5E 00 00 01 -> returns bit number 31 */
1069 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1070 {
1071 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1072 }
1073
1074 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1075 {
1076 /* Performs the multicast & mac_cr update. This is called when
1077 * safe on the current hardware, and with the mac_lock held */
1078 unsigned int mac_cr;
1079
1080 SMSC_ASSERT_MAC_LOCK(pdata);
1081
1082 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1083 mac_cr |= pdata->set_bits_mask;
1084 mac_cr &= ~(pdata->clear_bits_mask);
1085 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1086 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1087 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1088 SMSC_TRACE(HW, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1089 mac_cr, pdata->hashhi, pdata->hashlo);
1090 }
1091
1092 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1093 {
1094 unsigned int mac_cr;
1095
1096 /* This function is only called for older LAN911x devices
1097 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1098 * be modified during Rx - newer devices immediately update the
1099 * registers.
1100 *
1101 * This is called from interrupt context */
1102
1103 spin_lock(&pdata->mac_lock);
1104
1105 /* Check Rx has stopped */
1106 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1107 SMSC_WARNING(DRV, "Rx not stopped");
1108
1109 /* Perform the update - safe to do now Rx has stopped */
1110 smsc911x_rx_multicast_update(pdata);
1111
1112 /* Re-enable Rx */
1113 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1114 mac_cr |= MAC_CR_RXEN_;
1115 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1116
1117 pdata->multicast_update_pending = 0;
1118
1119 spin_unlock(&pdata->mac_lock);
1120 }
1121
1122 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1123 {
1124 unsigned int timeout;
1125 unsigned int temp;
1126
1127 /* Reset the LAN911x */
1128 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1129 timeout = 10;
1130 do {
1131 udelay(10);
1132 temp = smsc911x_reg_read(pdata, HW_CFG);
1133 } while ((--timeout) && (temp & HW_CFG_SRST_));
1134
1135 if (unlikely(temp & HW_CFG_SRST_)) {
1136 SMSC_WARNING(DRV, "Failed to complete reset");
1137 return -EIO;
1138 }
1139 return 0;
1140 }
1141
1142 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1143 static void
1144 smsc911x_set_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1145 {
1146 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1147 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1148 (dev_addr[1] << 8) | dev_addr[0];
1149
1150 SMSC_ASSERT_MAC_LOCK(pdata);
1151
1152 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1153 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1154 }
1155
1156 static int smsc911x_open(struct net_device *dev)
1157 {
1158 struct smsc911x_data *pdata = netdev_priv(dev);
1159 unsigned int timeout;
1160 unsigned int temp;
1161 unsigned int intcfg;
1162
1163 /* if the phy is not yet registered, retry later*/
1164 if (!pdata->phy_dev) {
1165 SMSC_WARNING(HW, "phy_dev is NULL");
1166 return -EAGAIN;
1167 }
1168
1169 if (!is_valid_ether_addr(dev->dev_addr)) {
1170 SMSC_WARNING(HW, "dev_addr is not a valid MAC address");
1171 return -EADDRNOTAVAIL;
1172 }
1173
1174 /* Reset the LAN911x */
1175 if (smsc911x_soft_reset(pdata)) {
1176 SMSC_WARNING(HW, "soft reset failed");
1177 return -EIO;
1178 }
1179
1180 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1181 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1182
1183 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1184 timeout = 50;
1185 while ((timeout--) &&
1186 (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_)) {
1187 udelay(10);
1188 }
1189
1190 if (unlikely(timeout == 0))
1191 SMSC_WARNING(IFUP,
1192 "Timed out waiting for EEPROM busy bit to clear");
1193
1194 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1195
1196 /* The soft reset above cleared the device's MAC address,
1197 * restore it from local copy (set in probe) */
1198 spin_lock_irq(&pdata->mac_lock);
1199 smsc911x_set_mac_address(pdata, dev->dev_addr);
1200 spin_unlock_irq(&pdata->mac_lock);
1201
1202 /* Initialise irqs, but leave all sources disabled */
1203 smsc911x_reg_write(pdata, INT_EN, 0);
1204 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1205
1206 /* Set interrupt deassertion to 100uS */
1207 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1208
1209 if (pdata->config.irq_polarity) {
1210 SMSC_TRACE(IFUP, "irq polarity: active high");
1211 intcfg |= INT_CFG_IRQ_POL_;
1212 } else {
1213 SMSC_TRACE(IFUP, "irq polarity: active low");
1214 }
1215
1216 if (pdata->config.irq_type) {
1217 SMSC_TRACE(IFUP, "irq type: push-pull");
1218 intcfg |= INT_CFG_IRQ_TYPE_;
1219 } else {
1220 SMSC_TRACE(IFUP, "irq type: open drain");
1221 }
1222
1223 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1224
1225 SMSC_TRACE(IFUP, "Testing irq handler using IRQ %d", dev->irq);
1226 pdata->software_irq_signal = 0;
1227 smp_wmb();
1228
1229 temp = smsc911x_reg_read(pdata, INT_EN);
1230 temp |= INT_EN_SW_INT_EN_;
1231 smsc911x_reg_write(pdata, INT_EN, temp);
1232
1233 timeout = 1000;
1234 while (timeout--) {
1235 if (pdata->software_irq_signal)
1236 break;
1237 msleep(1);
1238 }
1239
1240 if (!pdata->software_irq_signal) {
1241 dev_warn(&dev->dev, "ISR failed signaling test (IRQ %d)\n",
1242 dev->irq);
1243 return -ENODEV;
1244 }
1245 SMSC_TRACE(IFUP, "IRQ handler passed test using IRQ %d", dev->irq);
1246
1247 dev_info(&dev->dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1248 (unsigned long)pdata->ioaddr, dev->irq);
1249
1250 /* Bring the PHY up */
1251 phy_start(pdata->phy_dev);
1252
1253 temp = smsc911x_reg_read(pdata, HW_CFG);
1254 /* Preserve TX FIFO size and external PHY configuration */
1255 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1256 temp |= HW_CFG_SF_;
1257 smsc911x_reg_write(pdata, HW_CFG, temp);
1258
1259 temp = smsc911x_reg_read(pdata, FIFO_INT);
1260 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1261 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1262 smsc911x_reg_write(pdata, FIFO_INT, temp);
1263
1264 /* set RX Data offset to 2 bytes for alignment */
1265 smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1266
1267 /* enable NAPI polling before enabling RX interrupts */
1268 napi_enable(&pdata->napi);
1269
1270 temp = smsc911x_reg_read(pdata, INT_EN);
1271 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_);
1272 smsc911x_reg_write(pdata, INT_EN, temp);
1273
1274 spin_lock_irq(&pdata->mac_lock);
1275 temp = smsc911x_mac_read(pdata, MAC_CR);
1276 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1277 smsc911x_mac_write(pdata, MAC_CR, temp);
1278 spin_unlock_irq(&pdata->mac_lock);
1279
1280 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1281
1282 netif_start_queue(dev);
1283 return 0;
1284 }
1285
1286 /* Entry point for stopping the interface */
1287 static int smsc911x_stop(struct net_device *dev)
1288 {
1289 struct smsc911x_data *pdata = netdev_priv(dev);
1290 unsigned int temp;
1291
1292 BUG_ON(!pdata->phy_dev);
1293
1294 /* Disable all device interrupts */
1295 temp = smsc911x_reg_read(pdata, INT_CFG);
1296 temp &= ~INT_CFG_IRQ_EN_;
1297 smsc911x_reg_write(pdata, INT_CFG, temp);
1298
1299 /* Stop Tx and Rx polling */
1300 netif_stop_queue(dev);
1301 napi_disable(&pdata->napi);
1302
1303 /* At this point all Rx and Tx activity is stopped */
1304 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1305 smsc911x_tx_update_txcounters(dev);
1306
1307 /* Bring the PHY down */
1308 phy_stop(pdata->phy_dev);
1309
1310 SMSC_TRACE(IFDOWN, "Interface stopped");
1311 return 0;
1312 }
1313
1314 /* Entry point for transmitting a packet */
1315 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1316 {
1317 struct smsc911x_data *pdata = netdev_priv(dev);
1318 unsigned int freespace;
1319 unsigned int tx_cmd_a;
1320 unsigned int tx_cmd_b;
1321 unsigned int temp;
1322 u32 wrsz;
1323 ulong bufp;
1324
1325 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1326
1327 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1328 SMSC_WARNING(TX_ERR,
1329 "Tx data fifo low, space available: %d", freespace);
1330
1331 /* Word alignment adjustment */
1332 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1333 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1334 tx_cmd_a |= (unsigned int)skb->len;
1335
1336 tx_cmd_b = ((unsigned int)skb->len) << 16;
1337 tx_cmd_b |= (unsigned int)skb->len;
1338
1339 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1340 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1341
1342 bufp = (ulong)skb->data & (~0x3);
1343 wrsz = (u32)skb->len + 3;
1344 wrsz += (u32)((ulong)skb->data & 0x3);
1345 wrsz >>= 2;
1346
1347 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1348 freespace -= (skb->len + 32);
1349 dev_kfree_skb(skb);
1350 dev->trans_start = jiffies;
1351
1352 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1353 smsc911x_tx_update_txcounters(dev);
1354
1355 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1356 netif_stop_queue(dev);
1357 temp = smsc911x_reg_read(pdata, FIFO_INT);
1358 temp &= 0x00FFFFFF;
1359 temp |= 0x32000000;
1360 smsc911x_reg_write(pdata, FIFO_INT, temp);
1361 }
1362
1363 return NETDEV_TX_OK;
1364 }
1365
1366 /* Entry point for getting status counters */
1367 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1368 {
1369 struct smsc911x_data *pdata = netdev_priv(dev);
1370 smsc911x_tx_update_txcounters(dev);
1371 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1372 return &dev->stats;
1373 }
1374
1375 /* Entry point for setting addressing modes */
1376 static void smsc911x_set_multicast_list(struct net_device *dev)
1377 {
1378 struct smsc911x_data *pdata = netdev_priv(dev);
1379 unsigned long flags;
1380
1381 if (dev->flags & IFF_PROMISC) {
1382 /* Enabling promiscuous mode */
1383 pdata->set_bits_mask = MAC_CR_PRMS_;
1384 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1385 pdata->hashhi = 0;
1386 pdata->hashlo = 0;
1387 } else if (dev->flags & IFF_ALLMULTI) {
1388 /* Enabling all multicast mode */
1389 pdata->set_bits_mask = MAC_CR_MCPAS_;
1390 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1391 pdata->hashhi = 0;
1392 pdata->hashlo = 0;
1393 } else if (dev->mc_count > 0) {
1394 /* Enabling specific multicast addresses */
1395 unsigned int hash_high = 0;
1396 unsigned int hash_low = 0;
1397 unsigned int count = 0;
1398 struct dev_mc_list *mc_list = dev->mc_list;
1399
1400 pdata->set_bits_mask = MAC_CR_HPFILT_;
1401 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1402
1403 while (mc_list) {
1404 count++;
1405 if ((mc_list->dmi_addrlen) == ETH_ALEN) {
1406 unsigned int bitnum =
1407 smsc911x_hash(mc_list->dmi_addr);
1408 unsigned int mask = 0x01 << (bitnum & 0x1F);
1409 if (bitnum & 0x20)
1410 hash_high |= mask;
1411 else
1412 hash_low |= mask;
1413 } else {
1414 SMSC_WARNING(DRV, "dmi_addrlen != 6");
1415 }
1416 mc_list = mc_list->next;
1417 }
1418 if (count != (unsigned int)dev->mc_count)
1419 SMSC_WARNING(DRV, "mc_count != dev->mc_count");
1420
1421 pdata->hashhi = hash_high;
1422 pdata->hashlo = hash_low;
1423 } else {
1424 /* Enabling local MAC address only */
1425 pdata->set_bits_mask = 0;
1426 pdata->clear_bits_mask =
1427 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1428 pdata->hashhi = 0;
1429 pdata->hashlo = 0;
1430 }
1431
1432 spin_lock_irqsave(&pdata->mac_lock, flags);
1433
1434 if (pdata->generation <= 1) {
1435 /* Older hardware revision - cannot change these flags while
1436 * receiving data */
1437 if (!pdata->multicast_update_pending) {
1438 unsigned int temp;
1439 SMSC_TRACE(HW, "scheduling mcast update");
1440 pdata->multicast_update_pending = 1;
1441
1442 /* Request the hardware to stop, then perform the
1443 * update when we get an RX_STOP interrupt */
1444 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1445 temp = smsc911x_reg_read(pdata, INT_EN);
1446 temp |= INT_EN_RXSTOP_INT_EN_;
1447 smsc911x_reg_write(pdata, INT_EN, temp);
1448
1449 temp = smsc911x_mac_read(pdata, MAC_CR);
1450 temp &= ~(MAC_CR_RXEN_);
1451 smsc911x_mac_write(pdata, MAC_CR, temp);
1452 } else {
1453 /* There is another update pending, this should now
1454 * use the newer values */
1455 }
1456 } else {
1457 /* Newer hardware revision - can write immediately */
1458 smsc911x_rx_multicast_update(pdata);
1459 }
1460
1461 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1462 }
1463
1464 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1465 {
1466 struct net_device *dev = dev_id;
1467 struct smsc911x_data *pdata = netdev_priv(dev);
1468 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1469 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1470 int serviced = IRQ_NONE;
1471 u32 temp;
1472
1473 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1474 temp = smsc911x_reg_read(pdata, INT_EN);
1475 temp &= (~INT_EN_SW_INT_EN_);
1476 smsc911x_reg_write(pdata, INT_EN, temp);
1477 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1478 pdata->software_irq_signal = 1;
1479 smp_wmb();
1480 serviced = IRQ_HANDLED;
1481 }
1482
1483 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1484 /* Called when there is a multicast update scheduled and
1485 * it is now safe to complete the update */
1486 SMSC_TRACE(INTR, "RX Stop interrupt");
1487 temp = smsc911x_reg_read(pdata, INT_EN);
1488 temp &= (~INT_EN_RXSTOP_INT_EN_);
1489 smsc911x_reg_write(pdata, INT_EN, temp);
1490 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1491 smsc911x_rx_multicast_update_workaround(pdata);
1492 serviced = IRQ_HANDLED;
1493 }
1494
1495 if (intsts & inten & INT_STS_TDFA_) {
1496 temp = smsc911x_reg_read(pdata, FIFO_INT);
1497 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1498 smsc911x_reg_write(pdata, FIFO_INT, temp);
1499 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1500 netif_wake_queue(dev);
1501 serviced = IRQ_HANDLED;
1502 }
1503
1504 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1505 SMSC_TRACE(INTR, "RX Error interrupt");
1506 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1507 serviced = IRQ_HANDLED;
1508 }
1509
1510 if (likely(intsts & inten & INT_STS_RSFL_)) {
1511 if (likely(netif_rx_schedule_prep(dev, &pdata->napi))) {
1512 /* Disable Rx interrupts */
1513 temp = smsc911x_reg_read(pdata, INT_EN);
1514 temp &= (~INT_EN_RSFL_EN_);
1515 smsc911x_reg_write(pdata, INT_EN, temp);
1516 /* Schedule a NAPI poll */
1517 __netif_rx_schedule(dev, &pdata->napi);
1518 } else {
1519 SMSC_WARNING(RX_ERR,
1520 "netif_rx_schedule_prep failed");
1521 }
1522 serviced = IRQ_HANDLED;
1523 }
1524
1525 return serviced;
1526 }
1527
1528 #ifdef CONFIG_NET_POLL_CONTROLLER
1529 static void smsc911x_poll_controller(struct net_device *dev)
1530 {
1531 disable_irq(dev->irq);
1532 smsc911x_irqhandler(0, dev);
1533 enable_irq(dev->irq);
1534 }
1535 #endif /* CONFIG_NET_POLL_CONTROLLER */
1536
1537 /* Standard ioctls for mii-tool */
1538 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1539 {
1540 struct smsc911x_data *pdata = netdev_priv(dev);
1541
1542 if (!netif_running(dev) || !pdata->phy_dev)
1543 return -EINVAL;
1544
1545 return phy_mii_ioctl(pdata->phy_dev, if_mii(ifr), cmd);
1546 }
1547
1548 static int
1549 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1550 {
1551 struct smsc911x_data *pdata = netdev_priv(dev);
1552
1553 cmd->maxtxpkt = 1;
1554 cmd->maxrxpkt = 1;
1555 return phy_ethtool_gset(pdata->phy_dev, cmd);
1556 }
1557
1558 static int
1559 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1560 {
1561 struct smsc911x_data *pdata = netdev_priv(dev);
1562
1563 return phy_ethtool_sset(pdata->phy_dev, cmd);
1564 }
1565
1566 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1567 struct ethtool_drvinfo *info)
1568 {
1569 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1570 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1571 strlcpy(info->bus_info, dev->dev.parent->bus_id,
1572 sizeof(info->bus_info));
1573 }
1574
1575 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1576 {
1577 struct smsc911x_data *pdata = netdev_priv(dev);
1578
1579 return phy_start_aneg(pdata->phy_dev);
1580 }
1581
1582 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1583 {
1584 struct smsc911x_data *pdata = netdev_priv(dev);
1585 return pdata->msg_enable;
1586 }
1587
1588 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1589 {
1590 struct smsc911x_data *pdata = netdev_priv(dev);
1591 pdata->msg_enable = level;
1592 }
1593
1594 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1595 {
1596 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1597 sizeof(u32);
1598 }
1599
1600 static void
1601 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1602 void *buf)
1603 {
1604 struct smsc911x_data *pdata = netdev_priv(dev);
1605 struct phy_device *phy_dev = pdata->phy_dev;
1606 unsigned long flags;
1607 unsigned int i;
1608 unsigned int j = 0;
1609 u32 *data = buf;
1610
1611 regs->version = pdata->idrev;
1612 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1613 data[j++] = smsc911x_reg_read(pdata, i);
1614
1615 for (i = MAC_CR; i <= WUCSR; i++) {
1616 spin_lock_irqsave(&pdata->mac_lock, flags);
1617 data[j++] = smsc911x_mac_read(pdata, i);
1618 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1619 }
1620
1621 for (i = 0; i <= 31; i++)
1622 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1623 }
1624
1625 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1626 {
1627 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1628 temp &= ~GPIO_CFG_EEPR_EN_;
1629 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1630 msleep(1);
1631 }
1632
1633 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1634 {
1635 int timeout = 100;
1636 u32 e2cmd;
1637
1638 SMSC_TRACE(DRV, "op 0x%08x", op);
1639 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1640 SMSC_WARNING(DRV, "Busy at start");
1641 return -EBUSY;
1642 }
1643
1644 e2cmd = op | E2P_CMD_EPC_BUSY_;
1645 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1646
1647 do {
1648 msleep(1);
1649 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1650 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (timeout--));
1651
1652 if (!timeout) {
1653 SMSC_TRACE(DRV, "TIMED OUT");
1654 return -EAGAIN;
1655 }
1656
1657 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1658 SMSC_TRACE(DRV, "Error occured during eeprom operation");
1659 return -EINVAL;
1660 }
1661
1662 return 0;
1663 }
1664
1665 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1666 u8 address, u8 *data)
1667 {
1668 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1669 int ret;
1670
1671 SMSC_TRACE(DRV, "address 0x%x", address);
1672 ret = smsc911x_eeprom_send_cmd(pdata, op);
1673
1674 if (!ret)
1675 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1676
1677 return ret;
1678 }
1679
1680 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1681 u8 address, u8 data)
1682 {
1683 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1684 int ret;
1685
1686 SMSC_TRACE(DRV, "address 0x%x, data 0x%x", address, data);
1687 ret = smsc911x_eeprom_send_cmd(pdata, op);
1688
1689 if (!ret) {
1690 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1691 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1692 ret = smsc911x_eeprom_send_cmd(pdata, op);
1693 }
1694
1695 return ret;
1696 }
1697
1698 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1699 {
1700 return SMSC911X_EEPROM_SIZE;
1701 }
1702
1703 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1704 struct ethtool_eeprom *eeprom, u8 *data)
1705 {
1706 struct smsc911x_data *pdata = netdev_priv(dev);
1707 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1708 int len;
1709 int i;
1710
1711 smsc911x_eeprom_enable_access(pdata);
1712
1713 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1714 for (i = 0; i < len; i++) {
1715 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1716 if (ret < 0) {
1717 eeprom->len = 0;
1718 return ret;
1719 }
1720 }
1721
1722 memcpy(data, &eeprom_data[eeprom->offset], len);
1723 eeprom->len = len;
1724 return 0;
1725 }
1726
1727 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1728 struct ethtool_eeprom *eeprom, u8 *data)
1729 {
1730 int ret;
1731 struct smsc911x_data *pdata = netdev_priv(dev);
1732
1733 smsc911x_eeprom_enable_access(pdata);
1734 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1735 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1736 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1737
1738 /* Single byte write, according to man page */
1739 eeprom->len = 1;
1740
1741 return ret;
1742 }
1743
1744 static struct ethtool_ops smsc911x_ethtool_ops = {
1745 .get_settings = smsc911x_ethtool_getsettings,
1746 .set_settings = smsc911x_ethtool_setsettings,
1747 .get_link = ethtool_op_get_link,
1748 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1749 .nway_reset = smsc911x_ethtool_nwayreset,
1750 .get_msglevel = smsc911x_ethtool_getmsglevel,
1751 .set_msglevel = smsc911x_ethtool_setmsglevel,
1752 .get_regs_len = smsc911x_ethtool_getregslen,
1753 .get_regs = smsc911x_ethtool_getregs,
1754 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1755 .get_eeprom = smsc911x_ethtool_get_eeprom,
1756 .set_eeprom = smsc911x_ethtool_set_eeprom,
1757 };
1758
1759 /* Initializing private device structures, only called from probe */
1760 static int __devinit smsc911x_init(struct net_device *dev)
1761 {
1762 struct smsc911x_data *pdata = netdev_priv(dev);
1763 unsigned int byte_test;
1764
1765 SMSC_TRACE(PROBE, "Driver Parameters:");
1766 SMSC_TRACE(PROBE, "LAN base: 0x%08lX",
1767 (unsigned long)pdata->ioaddr);
1768 SMSC_TRACE(PROBE, "IRQ: %d", dev->irq);
1769 SMSC_TRACE(PROBE, "PHY will be autodetected.");
1770
1771 spin_lock_init(&pdata->dev_lock);
1772
1773 if (pdata->ioaddr == 0) {
1774 SMSC_WARNING(PROBE, "pdata->ioaddr: 0x00000000");
1775 return -ENODEV;
1776 }
1777
1778 /* Check byte ordering */
1779 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1780 SMSC_TRACE(PROBE, "BYTE_TEST: 0x%08X", byte_test);
1781 if (byte_test == 0x43218765) {
1782 SMSC_TRACE(PROBE, "BYTE_TEST looks swapped, "
1783 "applying WORD_SWAP");
1784 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1785
1786 /* 1 dummy read of BYTE_TEST is needed after a write to
1787 * WORD_SWAP before its contents are valid */
1788 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1789
1790 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1791 }
1792
1793 if (byte_test != 0x87654321) {
1794 SMSC_WARNING(DRV, "BYTE_TEST: 0x%08X", byte_test);
1795 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1796 SMSC_WARNING(PROBE,
1797 "top 16 bits equal to bottom 16 bits");
1798 SMSC_TRACE(PROBE, "This may mean the chip is set "
1799 "for 32 bit while the bus is reading 16 bit");
1800 }
1801 return -ENODEV;
1802 }
1803
1804 /* Default generation to zero (all workarounds apply) */
1805 pdata->generation = 0;
1806
1807 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1808 switch (pdata->idrev & 0xFFFF0000) {
1809 case 0x01180000:
1810 case 0x01170000:
1811 case 0x01160000:
1812 case 0x01150000:
1813 /* LAN911[5678] family */
1814 pdata->generation = pdata->idrev & 0x0000FFFF;
1815 break;
1816
1817 case 0x118A0000:
1818 case 0x117A0000:
1819 case 0x116A0000:
1820 case 0x115A0000:
1821 /* LAN921[5678] family */
1822 pdata->generation = 3;
1823 break;
1824
1825 case 0x92100000:
1826 case 0x92110000:
1827 case 0x92200000:
1828 case 0x92210000:
1829 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1830 pdata->generation = 4;
1831 break;
1832
1833 default:
1834 SMSC_WARNING(PROBE, "LAN911x not identified, idrev: 0x%08X",
1835 pdata->idrev);
1836 return -ENODEV;
1837 }
1838
1839 SMSC_TRACE(PROBE, "LAN911x identified, idrev: 0x%08X, generation: %d",
1840 pdata->idrev, pdata->generation);
1841
1842 if (pdata->generation == 0)
1843 SMSC_WARNING(PROBE,
1844 "This driver is not intended for this chip revision");
1845
1846 /* Reset the LAN911x */
1847 if (smsc911x_soft_reset(pdata))
1848 return -ENODEV;
1849
1850 /* Disable all interrupt sources until we bring the device up */
1851 smsc911x_reg_write(pdata, INT_EN, 0);
1852
1853 ether_setup(dev);
1854 dev->open = smsc911x_open;
1855 dev->stop = smsc911x_stop;
1856 dev->hard_start_xmit = smsc911x_hard_start_xmit;
1857 dev->get_stats = smsc911x_get_stats;
1858 dev->set_multicast_list = smsc911x_set_multicast_list;
1859 dev->flags |= IFF_MULTICAST;
1860 dev->do_ioctl = smsc911x_do_ioctl;
1861 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
1862 dev->ethtool_ops = &smsc911x_ethtool_ops;
1863
1864 #ifdef CONFIG_NET_POLL_CONTROLLER
1865 dev->poll_controller = smsc911x_poll_controller;
1866 #endif /* CONFIG_NET_POLL_CONTROLLER */
1867
1868 return 0;
1869 }
1870
1871 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
1872 {
1873 struct net_device *dev;
1874 struct smsc911x_data *pdata;
1875 struct resource *res;
1876
1877 dev = platform_get_drvdata(pdev);
1878 BUG_ON(!dev);
1879 pdata = netdev_priv(dev);
1880 BUG_ON(!pdata);
1881 BUG_ON(!pdata->ioaddr);
1882 BUG_ON(!pdata->phy_dev);
1883
1884 SMSC_TRACE(IFDOWN, "Stopping driver.");
1885
1886 phy_disconnect(pdata->phy_dev);
1887 pdata->phy_dev = NULL;
1888 mdiobus_unregister(pdata->mii_bus);
1889 mdiobus_free(pdata->mii_bus);
1890
1891 platform_set_drvdata(pdev, NULL);
1892 unregister_netdev(dev);
1893 free_irq(dev->irq, dev);
1894 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1895 "smsc911x-memory");
1896 if (!res)
1897 platform_get_resource(pdev, IORESOURCE_MEM, 0);
1898
1899 release_mem_region(res->start, res->end - res->start);
1900
1901 iounmap(pdata->ioaddr);
1902
1903 free_netdev(dev);
1904
1905 return 0;
1906 }
1907
1908 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
1909 {
1910 struct net_device *dev;
1911 struct smsc911x_data *pdata;
1912 struct smsc911x_platform_config *config = pdev->dev.platform_data;
1913 struct resource *res;
1914 unsigned int intcfg = 0;
1915 int res_size;
1916 int retval;
1917 DECLARE_MAC_BUF(mac);
1918
1919 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME, SMSC_DRV_VERSION);
1920
1921 /* platform data specifies irq & dynamic bus configuration */
1922 if (!pdev->dev.platform_data) {
1923 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME);
1924 retval = -ENODEV;
1925 goto out_0;
1926 }
1927
1928 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1929 "smsc911x-memory");
1930 if (!res)
1931 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1932 if (!res) {
1933 pr_warning("%s: Could not allocate resource.\n",
1934 SMSC_CHIPNAME);
1935 retval = -ENODEV;
1936 goto out_0;
1937 }
1938 res_size = res->end - res->start;
1939
1940 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
1941 retval = -EBUSY;
1942 goto out_0;
1943 }
1944
1945 dev = alloc_etherdev(sizeof(struct smsc911x_data));
1946 if (!dev) {
1947 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME);
1948 retval = -ENOMEM;
1949 goto out_release_io_1;
1950 }
1951
1952 SET_NETDEV_DEV(dev, &pdev->dev);
1953
1954 pdata = netdev_priv(dev);
1955
1956 dev->irq = platform_get_irq(pdev, 0);
1957 pdata->ioaddr = ioremap_nocache(res->start, res_size);
1958
1959 /* copy config parameters across to pdata */
1960 memcpy(&pdata->config, config, sizeof(pdata->config));
1961
1962 pdata->dev = dev;
1963 pdata->msg_enable = ((1 << debug) - 1);
1964
1965 if (pdata->ioaddr == NULL) {
1966 SMSC_WARNING(PROBE,
1967 "Error smsc911x base address invalid");
1968 retval = -ENOMEM;
1969 goto out_free_netdev_2;
1970 }
1971
1972 retval = smsc911x_init(dev);
1973 if (retval < 0)
1974 goto out_unmap_io_3;
1975
1976 /* configure irq polarity and type before connecting isr */
1977 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
1978 intcfg |= INT_CFG_IRQ_POL_;
1979
1980 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
1981 intcfg |= INT_CFG_IRQ_TYPE_;
1982
1983 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1984
1985 /* Ensure interrupts are globally disabled before connecting ISR */
1986 smsc911x_reg_write(pdata, INT_EN, 0);
1987 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1988
1989 retval = request_irq(dev->irq, smsc911x_irqhandler, IRQF_DISABLED,
1990 SMSC_CHIPNAME, dev);
1991 if (retval) {
1992 SMSC_WARNING(PROBE,
1993 "Unable to claim requested irq: %d", dev->irq);
1994 goto out_unmap_io_3;
1995 }
1996
1997 platform_set_drvdata(pdev, dev);
1998
1999 retval = register_netdev(dev);
2000 if (retval) {
2001 SMSC_WARNING(PROBE,
2002 "Error %i registering device", retval);
2003 goto out_unset_drvdata_4;
2004 } else {
2005 SMSC_TRACE(PROBE, "Network interface: \"%s\"", dev->name);
2006 }
2007
2008 spin_lock_init(&pdata->mac_lock);
2009
2010 retval = smsc911x_mii_init(pdev, dev);
2011 if (retval) {
2012 SMSC_WARNING(PROBE,
2013 "Error %i initialising mii", retval);
2014 goto out_unregister_netdev_5;
2015 }
2016
2017 spin_lock_irq(&pdata->mac_lock);
2018
2019 /* Check if mac address has been specified when bringing interface up */
2020 if (is_valid_ether_addr(dev->dev_addr)) {
2021 smsc911x_set_mac_address(pdata, dev->dev_addr);
2022 SMSC_TRACE(PROBE, "MAC Address is specified by configuration");
2023 } else {
2024 /* Try reading mac address from device. if EEPROM is present
2025 * it will already have been set */
2026 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2027 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2028 dev->dev_addr[0] = (u8)(mac_low32);
2029 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2030 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2031 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2032 dev->dev_addr[4] = (u8)(mac_high16);
2033 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2034
2035 if (is_valid_ether_addr(dev->dev_addr)) {
2036 /* eeprom values are valid so use them */
2037 SMSC_TRACE(PROBE,
2038 "Mac Address is read from LAN911x EEPROM");
2039 } else {
2040 /* eeprom values are invalid, generate random MAC */
2041 random_ether_addr(dev->dev_addr);
2042 smsc911x_set_mac_address(pdata, dev->dev_addr);
2043 SMSC_TRACE(PROBE,
2044 "MAC Address is set to random_ether_addr");
2045 }
2046 }
2047
2048 spin_unlock_irq(&pdata->mac_lock);
2049
2050 dev_info(&dev->dev, "MAC Address: %s\n",
2051 print_mac(mac, dev->dev_addr));
2052
2053 return 0;
2054
2055 out_unregister_netdev_5:
2056 unregister_netdev(dev);
2057 out_unset_drvdata_4:
2058 platform_set_drvdata(pdev, NULL);
2059 free_irq(dev->irq, dev);
2060 out_unmap_io_3:
2061 iounmap(pdata->ioaddr);
2062 out_free_netdev_2:
2063 free_netdev(dev);
2064 out_release_io_1:
2065 release_mem_region(res->start, res->end - res->start);
2066 out_0:
2067 return retval;
2068 }
2069
2070 static struct platform_driver smsc911x_driver = {
2071 .probe = smsc911x_drv_probe,
2072 .remove = smsc911x_drv_remove,
2073 .driver = {
2074 .name = SMSC_CHIPNAME,
2075 },
2076 };
2077
2078 /* Entry point for loading the module */
2079 static int __init smsc911x_init_module(void)
2080 {
2081 return platform_driver_register(&smsc911x_driver);
2082 }
2083
2084 /* entry point for unloading the module */
2085 static void __exit smsc911x_cleanup_module(void)
2086 {
2087 platform_driver_unregister(&smsc911x_driver);
2088 }
2089
2090 module_init(smsc911x_init_module);
2091 module_exit(smsc911x_cleanup_module);
Support for the Chinese Samsung S3C2440 based development boards