x86: set_cyc2ns_scale() remove prev scale
[linux-2.6/mini2440.git] / arch / x86 / kernel / tsc_64.c
blobceeba01e7f479a9dabc73906d5d2e243ff5e7926
1 #include <linux/kernel.h>
2 #include <linux/sched.h>
3 #include <linux/interrupt.h>
4 #include <linux/init.h>
5 #include <linux/clocksource.h>
6 #include <linux/time.h>
7 #include <linux/acpi.h>
8 #include <linux/cpufreq.h>
9 #include <linux/acpi_pmtmr.h>
11 #include <asm/hpet.h>
12 #include <asm/timex.h>
13 #include <asm/timer.h>
15 static int notsc __initdata = 0;
17 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
18 EXPORT_SYMBOL(cpu_khz);
19 unsigned int tsc_khz;
20 EXPORT_SYMBOL(tsc_khz);
22 /* Accelerators for sched_clock()
23 * convert from cycles(64bits) => nanoseconds (64bits)
24 * basic equation:
25 * ns = cycles / (freq / ns_per_sec)
26 * ns = cycles * (ns_per_sec / freq)
27 * ns = cycles * (10^9 / (cpu_khz * 10^3))
28 * ns = cycles * (10^6 / cpu_khz)
30 * Then we use scaling math (suggested by george@mvista.com) to get:
31 * ns = cycles * (10^6 * SC / cpu_khz) / SC
32 * ns = cycles * cyc2ns_scale / SC
34 * And since SC is a constant power of two, we can convert the div
35 * into a shift.
37 * We can use khz divisor instead of mhz to keep a better precision, since
38 * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
39 * (mathieu.desnoyers@polymtl.ca)
41 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
43 DEFINE_PER_CPU(unsigned long, cyc2ns);
45 static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
47 unsigned long long tsc_now, ns_now;
48 unsigned long flags, *scale;
50 local_irq_save(flags);
51 sched_clock_idle_sleep_event();
53 scale = &per_cpu(cyc2ns, cpu);
55 rdtscll(tsc_now);
56 ns_now = __cycles_2_ns(tsc_now);
58 if (cpu_khz)
59 *scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz;
61 sched_clock_idle_wakeup_event(0);
62 local_irq_restore(flags);
65 unsigned long long native_sched_clock(void)
67 unsigned long a = 0;
69 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
70 * which means it is not completely exact and may not be monotonous
71 * between CPUs. But the errors should be too small to matter for
72 * scheduling purposes.
75 rdtscll(a);
76 return cycles_2_ns(a);
79 /* We need to define a real function for sched_clock, to override the
80 weak default version */
81 #ifdef CONFIG_PARAVIRT
82 unsigned long long sched_clock(void)
84 return paravirt_sched_clock();
86 #else
87 unsigned long long
88 sched_clock(void) __attribute__((alias("native_sched_clock")));
89 #endif
92 static int tsc_unstable;
94 int check_tsc_unstable(void)
96 return tsc_unstable;
98 EXPORT_SYMBOL_GPL(check_tsc_unstable);
100 #ifdef CONFIG_CPU_FREQ
102 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
103 * changes.
105 * RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
106 * not that important because current Opteron setups do not support
107 * scaling on SMP anyroads.
109 * Should fix up last_tsc too. Currently gettimeofday in the
110 * first tick after the change will be slightly wrong.
113 static unsigned int ref_freq;
114 static unsigned long loops_per_jiffy_ref;
115 static unsigned long tsc_khz_ref;
117 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
118 void *data)
120 struct cpufreq_freqs *freq = data;
121 unsigned long *lpj, dummy;
123 if (cpu_has(&cpu_data(freq->cpu), X86_FEATURE_CONSTANT_TSC))
124 return 0;
126 lpj = &dummy;
127 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
128 #ifdef CONFIG_SMP
129 lpj = &cpu_data(freq->cpu).loops_per_jiffy;
130 #else
131 lpj = &boot_cpu_data.loops_per_jiffy;
132 #endif
134 if (!ref_freq) {
135 ref_freq = freq->old;
136 loops_per_jiffy_ref = *lpj;
137 tsc_khz_ref = tsc_khz;
139 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
140 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
141 (val == CPUFREQ_RESUMECHANGE)) {
142 *lpj =
143 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
145 tsc_khz = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
146 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
147 mark_tsc_unstable("cpufreq changes");
150 set_cyc2ns_scale(tsc_khz_ref, freq->cpu);
152 return 0;
155 static struct notifier_block time_cpufreq_notifier_block = {
156 .notifier_call = time_cpufreq_notifier
159 static int __init cpufreq_tsc(void)
161 cpufreq_register_notifier(&time_cpufreq_notifier_block,
162 CPUFREQ_TRANSITION_NOTIFIER);
163 return 0;
166 core_initcall(cpufreq_tsc);
168 #endif
170 #define MAX_RETRIES 5
171 #define SMI_TRESHOLD 50000
174 * Read TSC and the reference counters. Take care of SMI disturbance
176 static unsigned long __init tsc_read_refs(unsigned long *pm,
177 unsigned long *hpet)
179 unsigned long t1, t2;
180 int i;
182 for (i = 0; i < MAX_RETRIES; i++) {
183 t1 = get_cycles();
184 if (hpet)
185 *hpet = hpet_readl(HPET_COUNTER) & 0xFFFFFFFF;
186 else
187 *pm = acpi_pm_read_early();
188 t2 = get_cycles();
189 if ((t2 - t1) < SMI_TRESHOLD)
190 return t2;
192 return ULONG_MAX;
196 * tsc_calibrate - calibrate the tsc on boot
198 void __init tsc_calibrate(void)
200 unsigned long flags, tsc1, tsc2, tr1, tr2, pm1, pm2, hpet1, hpet2;
201 int hpet = is_hpet_enabled(), cpu;
203 local_irq_save(flags);
205 tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL);
207 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
209 outb(0xb0, 0x43);
210 outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
211 outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42);
212 tr1 = get_cycles();
213 while ((inb(0x61) & 0x20) == 0);
214 tr2 = get_cycles();
216 tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL);
218 local_irq_restore(flags);
221 * Preset the result with the raw and inaccurate PIT
222 * calibration value
224 tsc_khz = (tr2 - tr1) / 50;
226 /* hpet or pmtimer available ? */
227 if (!hpet && !pm1 && !pm2) {
228 printk(KERN_INFO "TSC calibrated against PIT\n");
229 return;
232 /* Check, whether the sampling was disturbed by an SMI */
233 if (tsc1 == ULONG_MAX || tsc2 == ULONG_MAX) {
234 printk(KERN_WARNING "TSC calibration disturbed by SMI, "
235 "using PIT calibration result\n");
236 return;
239 tsc2 = (tsc2 - tsc1) * 1000000L;
241 if (hpet) {
242 printk(KERN_INFO "TSC calibrated against HPET\n");
243 if (hpet2 < hpet1)
244 hpet2 += 0x100000000;
245 hpet2 -= hpet1;
246 tsc1 = (hpet2 * hpet_readl(HPET_PERIOD)) / 1000000;
247 } else {
248 printk(KERN_INFO "TSC calibrated against PM_TIMER\n");
249 if (pm2 < pm1)
250 pm2 += ACPI_PM_OVRRUN;
251 pm2 -= pm1;
252 tsc1 = (pm2 * 1000000000) / PMTMR_TICKS_PER_SEC;
255 tsc_khz = tsc2 / tsc1;
257 for_each_possible_cpu(cpu)
258 set_cyc2ns_scale(tsc_khz, cpu);
262 * Make an educated guess if the TSC is trustworthy and synchronized
263 * over all CPUs.
265 __cpuinit int unsynchronized_tsc(void)
267 if (tsc_unstable)
268 return 1;
270 #ifdef CONFIG_SMP
271 if (apic_is_clustered_box())
272 return 1;
273 #endif
275 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
276 return 0;
278 /* Assume multi socket systems are not synchronized */
279 return num_present_cpus() > 1;
282 int __init notsc_setup(char *s)
284 notsc = 1;
285 return 1;
288 __setup("notsc", notsc_setup);
291 /* clock source code: */
292 static cycle_t read_tsc(void)
294 cycle_t ret = (cycle_t)get_cycles();
295 return ret;
298 static cycle_t __vsyscall_fn vread_tsc(void)
300 cycle_t ret = (cycle_t)vget_cycles();
301 return ret;
304 static struct clocksource clocksource_tsc = {
305 .name = "tsc",
306 .rating = 300,
307 .read = read_tsc,
308 .mask = CLOCKSOURCE_MASK(64),
309 .shift = 22,
310 .flags = CLOCK_SOURCE_IS_CONTINUOUS |
311 CLOCK_SOURCE_MUST_VERIFY,
312 .vread = vread_tsc,
315 void mark_tsc_unstable(char *reason)
317 if (!tsc_unstable) {
318 tsc_unstable = 1;
319 printk("Marking TSC unstable due to %s\n", reason);
320 /* Change only the rating, when not registered */
321 if (clocksource_tsc.mult)
322 clocksource_change_rating(&clocksource_tsc, 0);
323 else
324 clocksource_tsc.rating = 0;
327 EXPORT_SYMBOL_GPL(mark_tsc_unstable);
329 void __init init_tsc_clocksource(void)
331 if (!notsc) {
332 clocksource_tsc.mult = clocksource_khz2mult(tsc_khz,
333 clocksource_tsc.shift);
334 if (check_tsc_unstable())
335 clocksource_tsc.rating = 0;
337 clocksource_register(&clocksource_tsc);