2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
58 #include <asm/pgtable.h>
59 #include <asm/tlbflush.h>
63 #include <linux/mc146818rtc.h>
65 #include <mach_apic.h>
66 #include <mach_wakecpu.h>
67 #include <smpboot_hooks.h>
70 * FIXME: For x86_64, those are defined in other files. But moving them here,
71 * would make the setup areas dependent on smp, which is a loss. When we
72 * integrate apic between arches, we can probably do a better job, but
73 * right now, they'll stay here -- glommer
76 /* which logical CPU number maps to which CPU (physical APIC ID) */
77 u16 x86_cpu_to_apicid_init
[NR_CPUS
] __initdata
=
78 { [0 ... NR_CPUS
-1] = BAD_APICID
};
79 void *x86_cpu_to_apicid_early_ptr
;
81 u16 x86_bios_cpu_apicid_init
[NR_CPUS
] __initdata
82 = { [0 ... NR_CPUS
-1] = BAD_APICID
};
83 void *x86_bios_cpu_apicid_early_ptr
;
86 u8 apicid_2_node
[MAX_APICID
];
89 /* Internal processor count */
90 unsigned int num_processors
;
92 /* State of each CPU */
93 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
95 unsigned disabled_cpus __cpuinitdata
;
97 /* Store all idle threads, this can be reused instead of creating
98 * a new thread. Also avoids complicated thread destroy functionality
101 #ifdef CONFIG_HOTPLUG_CPU
103 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
104 * removed after init for !CONFIG_HOTPLUG_CPU.
106 static DEFINE_PER_CPU(struct task_struct
*, idle_thread_array
);
107 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
108 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
110 struct task_struct
*idle_thread_array
[NR_CPUS
] __cpuinitdata
;
111 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
112 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
115 /* Number of siblings per CPU package */
116 int smp_num_siblings
= 1;
117 EXPORT_SYMBOL(smp_num_siblings
);
119 /* Last level cache ID of each logical CPU */
120 DEFINE_PER_CPU(u16
, cpu_llc_id
) = BAD_APICID
;
122 /* bitmap of online cpus */
123 cpumask_t cpu_online_map __read_mostly
;
124 EXPORT_SYMBOL(cpu_online_map
);
126 cpumask_t cpu_callin_map
;
127 cpumask_t cpu_callout_map
;
128 cpumask_t cpu_possible_map
;
129 EXPORT_SYMBOL(cpu_possible_map
);
131 /* representing HT siblings of each logical CPU */
132 DEFINE_PER_CPU(cpumask_t
, cpu_sibling_map
);
133 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
135 /* representing HT and core siblings of each logical CPU */
136 DEFINE_PER_CPU(cpumask_t
, cpu_core_map
);
137 EXPORT_PER_CPU_SYMBOL(cpu_core_map
);
139 /* Per CPU bogomips and other parameters */
140 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86
, cpu_info
);
141 EXPORT_PER_CPU_SYMBOL(cpu_info
);
143 static atomic_t init_deasserted
;
145 static int boot_cpu_logical_apicid
;
147 /* ready for x86_64, no harm for x86, since it will overwrite after alloc */
148 unsigned char *trampoline_base
= __va(SMP_TRAMPOLINE_BASE
);
150 /* representing cpus for which sibling maps can be computed */
151 static cpumask_t cpu_sibling_setup_map
;
153 /* Set if we find a B stepping CPU */
154 int __cpuinitdata smp_b_stepping
;
156 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
158 /* which logical CPUs are on which nodes */
159 cpumask_t node_to_cpumask_map
[MAX_NUMNODES
] __read_mostly
=
160 { [0 ... MAX_NUMNODES
-1] = CPU_MASK_NONE
};
161 EXPORT_SYMBOL(node_to_cpumask_map
);
162 /* which node each logical CPU is on */
163 int cpu_to_node_map
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = 0 };
164 EXPORT_SYMBOL(cpu_to_node_map
);
166 /* set up a mapping between cpu and node. */
167 static void map_cpu_to_node(int cpu
, int node
)
169 printk(KERN_INFO
"Mapping cpu %d to node %d\n", cpu
, node
);
170 cpu_set(cpu
, node_to_cpumask_map
[node
]);
171 cpu_to_node_map
[cpu
] = node
;
174 /* undo a mapping between cpu and node. */
175 static void unmap_cpu_to_node(int cpu
)
179 printk(KERN_INFO
"Unmapping cpu %d from all nodes\n", cpu
);
180 for (node
= 0; node
< MAX_NUMNODES
; node
++)
181 cpu_clear(cpu
, node_to_cpumask_map
[node
]);
182 cpu_to_node_map
[cpu
] = 0;
184 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
185 #define map_cpu_to_node(cpu, node) ({})
186 #define unmap_cpu_to_node(cpu) ({})
190 u8 cpu_2_logical_apicid
[NR_CPUS
] __read_mostly
=
191 { [0 ... NR_CPUS
-1] = BAD_APICID
};
193 void map_cpu_to_logical_apicid(void)
195 int cpu
= smp_processor_id();
196 int apicid
= logical_smp_processor_id();
197 int node
= apicid_to_node(apicid
);
199 if (!node_online(node
))
200 node
= first_online_node
;
202 cpu_2_logical_apicid
[cpu
] = apicid
;
203 map_cpu_to_node(cpu
, node
);
206 void unmap_cpu_to_logical_apicid(int cpu
)
208 cpu_2_logical_apicid
[cpu
] = BAD_APICID
;
209 unmap_cpu_to_node(cpu
);
212 #define unmap_cpu_to_logical_apicid(cpu) do {} while (0)
213 #define map_cpu_to_logical_apicid() do {} while (0)
217 * Report back to the Boot Processor.
220 void __cpuinit
smp_callin(void)
223 unsigned long timeout
;
226 * If waken up by an INIT in an 82489DX configuration
227 * we may get here before an INIT-deassert IPI reaches
228 * our local APIC. We have to wait for the IPI or we'll
229 * lock up on an APIC access.
231 wait_for_init_deassert(&init_deasserted
);
234 * (This works even if the APIC is not enabled.)
236 phys_id
= GET_APIC_ID(read_apic_id());
237 cpuid
= smp_processor_id();
238 if (cpu_isset(cpuid
, cpu_callin_map
)) {
239 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__
,
242 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
245 * STARTUP IPIs are fragile beasts as they might sometimes
246 * trigger some glue motherboard logic. Complete APIC bus
247 * silence for 1 second, this overestimates the time the
248 * boot CPU is spending to send the up to 2 STARTUP IPIs
249 * by a factor of two. This should be enough.
253 * Waiting 2s total for startup (udelay is not yet working)
255 timeout
= jiffies
+ 2*HZ
;
256 while (time_before(jiffies
, timeout
)) {
258 * Has the boot CPU finished it's STARTUP sequence?
260 if (cpu_isset(cpuid
, cpu_callout_map
))
265 if (!time_before(jiffies
, timeout
)) {
266 panic("%s: CPU%d started up but did not get a callout!\n",
271 * the boot CPU has finished the init stage and is spinning
272 * on callin_map until we finish. We are free to set up this
273 * CPU, first the APIC. (this is probably redundant on most
277 Dprintk("CALLIN, before setup_local_APIC().\n");
278 smp_callin_clear_local_apic();
280 end_local_APIC_setup();
281 map_cpu_to_logical_apicid();
286 * Need to enable IRQs because it can take longer and then
287 * the NMI watchdog might kill us.
292 Dprintk("Stack at about %p\n", &cpuid
);
295 * Save our processor parameters
297 smp_store_cpu_info(cpuid
);
300 * Allow the master to continue.
302 cpu_set(cpuid
, cpu_callin_map
);
306 * Activate a secondary processor.
308 void __cpuinit
start_secondary(void *unused
)
311 * Don't put *anything* before cpu_init(), SMP booting is too
312 * fragile that we want to limit the things done here to the
313 * most necessary things.
322 /* otherwise gcc will move up smp_processor_id before the cpu_init */
325 * Check TSC synchronization with the BP:
327 check_tsc_sync_target();
329 if (nmi_watchdog
== NMI_IO_APIC
) {
330 disable_8259A_irq(0);
331 enable_NMI_through_LVT0();
335 /* This must be done before setting cpu_online_map */
336 set_cpu_sibling_map(raw_smp_processor_id());
340 * We need to hold call_lock, so there is no inconsistency
341 * between the time smp_call_function() determines number of
342 * IPI recipients, and the time when the determination is made
343 * for which cpus receive the IPI. Holding this
344 * lock helps us to not include this cpu in a currently in progress
345 * smp_call_function().
347 lock_ipi_call_lock();
349 spin_lock(&vector_lock
);
351 /* Setup the per cpu irq handling data structures */
352 __setup_vector_irq(smp_processor_id());
354 * Allow the master to continue.
356 spin_unlock(&vector_lock
);
358 cpu_set(smp_processor_id(), cpu_online_map
);
359 unlock_ipi_call_lock();
360 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
362 setup_secondary_clock();
370 * Everything has been set up for the secondary
371 * CPUs - they just need to reload everything
372 * from the task structure
373 * This function must not return.
375 void __devinit
initialize_secondary(void)
378 * We don't actually need to load the full TSS,
379 * basically just the stack pointer and the ip.
386 :"m" (current
->thread
.sp
), "m" (current
->thread
.ip
));
390 static void __cpuinit
smp_apply_quirks(struct cpuinfo_x86
*c
)
394 * Mask B, Pentium, but not Pentium MMX
396 if (c
->x86_vendor
== X86_VENDOR_INTEL
&&
398 c
->x86_mask
>= 1 && c
->x86_mask
<= 4 &&
401 * Remember we have B step Pentia with bugs
406 * Certain Athlons might work (for various values of 'work') in SMP
407 * but they are not certified as MP capable.
409 if ((c
->x86_vendor
== X86_VENDOR_AMD
) && (c
->x86
== 6)) {
411 if (num_possible_cpus() == 1)
414 /* Athlon 660/661 is valid. */
415 if ((c
->x86_model
== 6) && ((c
->x86_mask
== 0) ||
419 /* Duron 670 is valid */
420 if ((c
->x86_model
== 7) && (c
->x86_mask
== 0))
424 * Athlon 662, Duron 671, and Athlon >model 7 have capability
425 * bit. It's worth noting that the A5 stepping (662) of some
426 * Athlon XP's have the MP bit set.
427 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
430 if (((c
->x86_model
== 6) && (c
->x86_mask
>= 2)) ||
431 ((c
->x86_model
== 7) && (c
->x86_mask
>= 1)) ||
436 /* If we get here, not a certified SMP capable AMD system. */
437 add_taint(TAINT_UNSAFE_SMP
);
445 void smp_checks(void)
448 printk(KERN_WARNING
"WARNING: SMP operation may be unreliable"
449 "with B stepping processors.\n");
452 * Don't taint if we are running SMP kernel on a single non-MP
455 if (tainted
& TAINT_UNSAFE_SMP
) {
456 if (num_online_cpus())
457 printk(KERN_INFO
"WARNING: This combination of AMD"
458 "processors is not suitable for SMP.\n");
460 tainted
&= ~TAINT_UNSAFE_SMP
;
465 * The bootstrap kernel entry code has set these up. Save them for
469 void __cpuinit
smp_store_cpu_info(int id
)
471 struct cpuinfo_x86
*c
= &cpu_data(id
);
476 identify_secondary_cpu(c
);
481 void __cpuinit
set_cpu_sibling_map(int cpu
)
484 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
486 cpu_set(cpu
, cpu_sibling_setup_map
);
488 if (smp_num_siblings
> 1) {
489 for_each_cpu_mask(i
, cpu_sibling_setup_map
) {
490 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
&&
491 c
->cpu_core_id
== cpu_data(i
).cpu_core_id
) {
492 cpu_set(i
, per_cpu(cpu_sibling_map
, cpu
));
493 cpu_set(cpu
, per_cpu(cpu_sibling_map
, i
));
494 cpu_set(i
, per_cpu(cpu_core_map
, cpu
));
495 cpu_set(cpu
, per_cpu(cpu_core_map
, i
));
496 cpu_set(i
, c
->llc_shared_map
);
497 cpu_set(cpu
, cpu_data(i
).llc_shared_map
);
501 cpu_set(cpu
, per_cpu(cpu_sibling_map
, cpu
));
504 cpu_set(cpu
, c
->llc_shared_map
);
506 if (current_cpu_data
.x86_max_cores
== 1) {
507 per_cpu(cpu_core_map
, cpu
) = per_cpu(cpu_sibling_map
, cpu
);
512 for_each_cpu_mask(i
, cpu_sibling_setup_map
) {
513 if (per_cpu(cpu_llc_id
, cpu
) != BAD_APICID
&&
514 per_cpu(cpu_llc_id
, cpu
) == per_cpu(cpu_llc_id
, i
)) {
515 cpu_set(i
, c
->llc_shared_map
);
516 cpu_set(cpu
, cpu_data(i
).llc_shared_map
);
518 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
) {
519 cpu_set(i
, per_cpu(cpu_core_map
, cpu
));
520 cpu_set(cpu
, per_cpu(cpu_core_map
, i
));
522 * Does this new cpu bringup a new core?
524 if (cpus_weight(per_cpu(cpu_sibling_map
, cpu
)) == 1) {
526 * for each core in package, increment
527 * the booted_cores for this new cpu
529 if (first_cpu(per_cpu(cpu_sibling_map
, i
)) == i
)
532 * increment the core count for all
533 * the other cpus in this package
536 cpu_data(i
).booted_cores
++;
537 } else if (i
!= cpu
&& !c
->booted_cores
)
538 c
->booted_cores
= cpu_data(i
).booted_cores
;
543 /* maps the cpu to the sched domain representing multi-core */
544 cpumask_t
cpu_coregroup_map(int cpu
)
546 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
548 * For perf, we return last level cache shared map.
549 * And for power savings, we return cpu_core_map
551 if (sched_mc_power_savings
|| sched_smt_power_savings
)
552 return per_cpu(cpu_core_map
, cpu
);
554 return c
->llc_shared_map
;
558 * Currently trivial. Write the real->protected mode
559 * bootstrap into the page concerned. The caller
560 * has made sure it's suitably aligned.
563 unsigned long __cpuinit
setup_trampoline(void)
565 memcpy(trampoline_base
, trampoline_data
,
566 trampoline_end
- trampoline_data
);
567 return virt_to_phys(trampoline_base
);
572 * We are called very early to get the low memory for the
573 * SMP bootup trampoline page.
575 void __init
smp_alloc_memory(void)
577 trampoline_base
= alloc_bootmem_low_pages(PAGE_SIZE
);
579 * Has to be in very low memory so we can execute
582 if (__pa(trampoline_base
) >= 0x9F000)
587 void impress_friends(void)
590 unsigned long bogosum
= 0;
592 * Allow the user to impress friends.
594 Dprintk("Before bogomips.\n");
595 for_each_possible_cpu(cpu
)
596 if (cpu_isset(cpu
, cpu_callout_map
))
597 bogosum
+= cpu_data(cpu
).loops_per_jiffy
;
599 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
602 (bogosum
/(5000/HZ
))%100);
604 Dprintk("Before bogocount - setting activated=1.\n");
607 static inline void __inquire_remote_apic(int apicid
)
609 unsigned i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
610 char *names
[] = { "ID", "VERSION", "SPIV" };
614 printk(KERN_INFO
"Inquiring remote APIC #%d...\n", apicid
);
616 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
617 printk(KERN_INFO
"... APIC #%d %s: ", apicid
, names
[i
]);
622 status
= safe_apic_wait_icr_idle();
625 "a previous APIC delivery may have failed\n");
627 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(apicid
));
628 apic_write_around(APIC_ICR
, APIC_DM_REMRD
| regs
[i
]);
633 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
634 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
637 case APIC_ICR_RR_VALID
:
638 status
= apic_read(APIC_RRR
);
639 printk(KERN_CONT
"%08x\n", status
);
642 printk(KERN_CONT
"failed\n");
647 #ifdef WAKE_SECONDARY_VIA_NMI
649 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
650 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
651 * won't ... remember to clear down the APIC, etc later.
654 wakeup_secondary_cpu(int logical_apicid
, unsigned long start_eip
)
656 unsigned long send_status
, accept_status
= 0;
660 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(logical_apicid
));
662 /* Boot on the stack */
663 /* Kick the second */
664 apic_write_around(APIC_ICR
, APIC_DM_NMI
| APIC_DEST_LOGICAL
);
666 Dprintk("Waiting for send to finish...\n");
667 send_status
= safe_apic_wait_icr_idle();
670 * Give the other CPU some time to accept the IPI.
674 * Due to the Pentium erratum 3AP.
676 maxlvt
= lapic_get_maxlvt();
678 apic_read_around(APIC_SPIV
);
679 apic_write(APIC_ESR
, 0);
681 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
682 Dprintk("NMI sent.\n");
685 printk(KERN_ERR
"APIC never delivered???\n");
687 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
689 return (send_status
| accept_status
);
691 #endif /* WAKE_SECONDARY_VIA_NMI */
693 #ifdef WAKE_SECONDARY_VIA_INIT
695 wakeup_secondary_cpu(int phys_apicid
, unsigned long start_eip
)
697 unsigned long send_status
, accept_status
= 0;
698 int maxlvt
, num_starts
, j
;
701 * Be paranoid about clearing APIC errors.
703 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
704 apic_read_around(APIC_SPIV
);
705 apic_write(APIC_ESR
, 0);
709 Dprintk("Asserting INIT.\n");
712 * Turn INIT on target chip
714 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
719 apic_write_around(APIC_ICR
, APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
722 Dprintk("Waiting for send to finish...\n");
723 send_status
= safe_apic_wait_icr_idle();
727 Dprintk("Deasserting INIT.\n");
730 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
733 apic_write_around(APIC_ICR
, APIC_INT_LEVELTRIG
| APIC_DM_INIT
);
735 Dprintk("Waiting for send to finish...\n");
736 send_status
= safe_apic_wait_icr_idle();
739 atomic_set(&init_deasserted
, 1);
742 * Should we send STARTUP IPIs ?
744 * Determine this based on the APIC version.
745 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
747 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
753 * Paravirt / VMI wants a startup IPI hook here to set up the
754 * target processor state.
756 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
758 (unsigned long)init_rsp
);
760 (unsigned long)stack_start
.sp
);
764 * Run STARTUP IPI loop.
766 Dprintk("#startup loops: %d.\n", num_starts
);
768 maxlvt
= lapic_get_maxlvt();
770 for (j
= 1; j
<= num_starts
; j
++) {
771 Dprintk("Sending STARTUP #%d.\n", j
);
772 apic_read_around(APIC_SPIV
);
773 apic_write(APIC_ESR
, 0);
775 Dprintk("After apic_write.\n");
782 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
784 /* Boot on the stack */
785 /* Kick the second */
786 apic_write_around(APIC_ICR
, APIC_DM_STARTUP
787 | (start_eip
>> 12));
790 * Give the other CPU some time to accept the IPI.
794 Dprintk("Startup point 1.\n");
796 Dprintk("Waiting for send to finish...\n");
797 send_status
= safe_apic_wait_icr_idle();
800 * Give the other CPU some time to accept the IPI.
804 * Due to the Pentium erratum 3AP.
807 apic_read_around(APIC_SPIV
);
808 apic_write(APIC_ESR
, 0);
810 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
811 if (send_status
|| accept_status
)
814 Dprintk("After Startup.\n");
817 printk(KERN_ERR
"APIC never delivered???\n");
819 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
821 return (send_status
| accept_status
);
823 #endif /* WAKE_SECONDARY_VIA_INIT */
826 struct work_struct work
;
827 struct task_struct
*idle
;
828 struct completion done
;
832 static void __cpuinit
do_fork_idle(struct work_struct
*work
)
834 struct create_idle
*c_idle
=
835 container_of(work
, struct create_idle
, work
);
837 c_idle
->idle
= fork_idle(c_idle
->cpu
);
838 complete(&c_idle
->done
);
841 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
843 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
844 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
845 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
848 unsigned long boot_error
= 0;
850 unsigned long start_ip
;
851 unsigned short nmi_high
= 0, nmi_low
= 0;
852 struct create_idle c_idle
= {
854 .done
= COMPLETION_INITIALIZER_ONSTACK(c_idle
.done
),
856 INIT_WORK(&c_idle
.work
, do_fork_idle
);
858 /* allocate memory for gdts of secondary cpus. Hotplug is considered */
859 if (!cpu_gdt_descr
[cpu
].address
&&
860 !(cpu_gdt_descr
[cpu
].address
= get_zeroed_page(GFP_KERNEL
))) {
861 printk(KERN_ERR
"Failed to allocate GDT for CPU %d\n", cpu
);
865 /* Allocate node local memory for AP pdas */
866 if (cpu_pda(cpu
) == &boot_cpu_pda
[cpu
]) {
867 struct x8664_pda
*newpda
, *pda
;
868 int node
= cpu_to_node(cpu
);
870 newpda
= kmalloc_node(sizeof(struct x8664_pda
), GFP_ATOMIC
,
873 memcpy(newpda
, pda
, sizeof(struct x8664_pda
));
874 cpu_pda(cpu
) = newpda
;
877 "Could not allocate node local PDA for CPU %d on node %d\n",
882 alternatives_smp_switch(1);
884 c_idle
.idle
= get_idle_for_cpu(cpu
);
887 * We can't use kernel_thread since we must avoid to
888 * reschedule the child.
891 c_idle
.idle
->thread
.sp
= (unsigned long) (((struct pt_regs
*)
892 (THREAD_SIZE
+ task_stack_page(c_idle
.idle
))) - 1);
893 init_idle(c_idle
.idle
, cpu
);
897 if (!keventd_up() || current_is_keventd())
898 c_idle
.work
.func(&c_idle
.work
);
900 schedule_work(&c_idle
.work
);
901 wait_for_completion(&c_idle
.done
);
904 if (IS_ERR(c_idle
.idle
)) {
905 printk("failed fork for CPU %d\n", cpu
);
906 return PTR_ERR(c_idle
.idle
);
909 set_idle_for_cpu(cpu
, c_idle
.idle
);
912 per_cpu(current_task
, cpu
) = c_idle
.idle
;
914 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
915 c_idle
.idle
->thread
.ip
= (unsigned long) start_secondary
;
916 /* Stack for startup_32 can be just as for start_secondary onwards */
917 stack_start
.sp
= (void *) c_idle
.idle
->thread
.sp
;
920 cpu_pda(cpu
)->pcurrent
= c_idle
.idle
;
921 init_rsp
= c_idle
.idle
->thread
.sp
;
922 load_sp0(&per_cpu(init_tss
, cpu
), &c_idle
.idle
->thread
);
923 initial_code
= (unsigned long)start_secondary
;
924 clear_tsk_thread_flag(c_idle
.idle
, TIF_FORK
);
927 /* start_ip had better be page-aligned! */
928 start_ip
= setup_trampoline();
930 /* So we see what's up */
931 printk(KERN_INFO
"Booting processor %d/%d ip %lx\n",
932 cpu
, apicid
, start_ip
);
935 * This grunge runs the startup process for
936 * the targeted processor.
939 atomic_set(&init_deasserted
, 0);
941 Dprintk("Setting warm reset code and vector.\n");
943 store_NMI_vector(&nmi_high
, &nmi_low
);
945 smpboot_setup_warm_reset_vector(start_ip
);
947 * Be paranoid about clearing APIC errors.
949 apic_write(APIC_ESR
, 0);
953 * Starting actual IPI sequence...
955 boot_error
= wakeup_secondary_cpu(apicid
, start_ip
);
959 * allow APs to start initializing.
961 Dprintk("Before Callout %d.\n", cpu
);
962 cpu_set(cpu
, cpu_callout_map
);
963 Dprintk("After Callout %d.\n", cpu
);
966 * Wait 5s total for a response
968 for (timeout
= 0; timeout
< 50000; timeout
++) {
969 if (cpu_isset(cpu
, cpu_callin_map
))
970 break; /* It has booted */
974 if (cpu_isset(cpu
, cpu_callin_map
)) {
975 /* number CPUs logically, starting from 1 (BSP is 0) */
977 printk(KERN_INFO
"CPU%d: ", cpu
);
978 print_cpu_info(&cpu_data(cpu
));
979 Dprintk("CPU has booted.\n");
982 if (*((volatile unsigned char *)trampoline_base
)
984 /* trampoline started but...? */
985 printk(KERN_ERR
"Stuck ??\n");
987 /* trampoline code not run */
988 printk(KERN_ERR
"Not responding.\n");
989 inquire_remote_apic(apicid
);
994 /* Try to put things back the way they were before ... */
995 unmap_cpu_to_logical_apicid(cpu
);
997 clear_node_cpumask(cpu
); /* was set by numa_add_cpu */
999 cpu_clear(cpu
, cpu_callout_map
); /* was set by do_boot_cpu() */
1000 cpu_clear(cpu
, cpu_initialized
); /* was set by cpu_init() */
1001 cpu_clear(cpu
, cpu_possible_map
);
1002 cpu_clear(cpu
, cpu_present_map
);
1003 per_cpu(x86_cpu_to_apicid
, cpu
) = BAD_APICID
;
1006 /* mark "stuck" area as not stuck */
1007 *((volatile unsigned long *)trampoline_base
) = 0;
1012 int __cpuinit
native_cpu_up(unsigned int cpu
)
1014 int apicid
= cpu_present_to_apicid(cpu
);
1015 unsigned long flags
;
1018 WARN_ON(irqs_disabled());
1020 Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu
);
1022 if (apicid
== BAD_APICID
|| apicid
== boot_cpu_physical_apicid
||
1023 !physid_isset(apicid
, phys_cpu_present_map
)) {
1024 printk(KERN_ERR
"%s: bad cpu %d\n", __func__
, cpu
);
1029 * Already booted CPU?
1031 if (cpu_isset(cpu
, cpu_callin_map
)) {
1032 Dprintk("do_boot_cpu %d Already started\n", cpu
);
1037 * Save current MTRR state in case it was changed since early boot
1038 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
1042 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
1044 #ifdef CONFIG_X86_32
1045 /* init low mem mapping */
1046 clone_pgd_range(swapper_pg_dir
, swapper_pg_dir
+ USER_PGD_PTRS
,
1047 min_t(unsigned long, KERNEL_PGD_PTRS
, USER_PGD_PTRS
));
1051 err
= do_boot_cpu(apicid
, cpu
);
1053 Dprintk("do_boot_cpu failed %d\n", err
);
1058 * Check TSC synchronization with the AP (keep irqs disabled
1061 local_irq_save(flags
);
1062 check_tsc_sync_source(cpu
);
1063 local_irq_restore(flags
);
1065 while (!cpu_isset(cpu
, cpu_online_map
)) {
1067 touch_nmi_watchdog();
1074 * Fall back to non SMP mode after errors.
1076 * RED-PEN audit/test this more. I bet there is more state messed up here.
1078 static __init
void disable_smp(void)
1080 cpu_present_map
= cpumask_of_cpu(0);
1081 cpu_possible_map
= cpumask_of_cpu(0);
1082 #ifdef CONFIG_X86_32
1083 smpboot_clear_io_apic_irqs();
1085 if (smp_found_config
)
1086 phys_cpu_present_map
=
1087 physid_mask_of_physid(boot_cpu_physical_apicid
);
1089 phys_cpu_present_map
= physid_mask_of_physid(0);
1090 map_cpu_to_logical_apicid();
1091 cpu_set(0, per_cpu(cpu_sibling_map
, 0));
1092 cpu_set(0, per_cpu(cpu_core_map
, 0));
1096 * Various sanity checks.
1098 static int __init
smp_sanity_check(unsigned max_cpus
)
1101 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map
)) {
1102 printk(KERN_WARNING
"weird, boot CPU (#%d) not listed"
1103 "by the BIOS.\n", hard_smp_processor_id());
1104 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1108 * If we couldn't find an SMP configuration at boot time,
1109 * get out of here now!
1111 if (!smp_found_config
&& !acpi_lapic
) {
1113 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
1115 if (APIC_init_uniprocessor())
1116 printk(KERN_NOTICE
"Local APIC not detected."
1117 " Using dummy APIC emulation.\n");
1122 * Should not be necessary because the MP table should list the boot
1123 * CPU too, but we do it for the sake of robustness anyway.
1125 if (!check_phys_apicid_present(boot_cpu_physical_apicid
)) {
1127 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1128 boot_cpu_physical_apicid
);
1129 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1134 * If we couldn't find a local APIC, then get out of here now!
1136 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) &&
1138 printk(KERN_ERR
"BIOS bug, local APIC #%d not detected!...\n",
1139 boot_cpu_physical_apicid
);
1140 printk(KERN_ERR
"... forcing use of dummy APIC emulation."
1141 "(tell your hw vendor)\n");
1142 smpboot_clear_io_apic();
1146 verify_local_APIC();
1149 * If SMP should be disabled, then really disable it!
1152 printk(KERN_INFO
"SMP mode deactivated,"
1153 "forcing use of dummy APIC emulation.\n");
1154 smpboot_clear_io_apic();
1155 #ifdef CONFIG_X86_32
1156 if (nmi_watchdog
== NMI_LOCAL_APIC
) {
1157 printk(KERN_INFO
"activating minimal APIC for"
1158 "NMI watchdog use.\n");
1161 end_local_APIC_setup();
1170 static void __init
smp_cpu_index_default(void)
1173 struct cpuinfo_x86
*c
;
1175 for_each_cpu_mask(i
, cpu_possible_map
) {
1177 /* mark all to hotplug */
1178 c
->cpu_index
= NR_CPUS
;
1183 * Prepare for SMP bootup. The MP table or ACPI has been read
1184 * earlier. Just do some sanity checking here and enable APIC mode.
1186 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
1188 nmi_watchdog_default();
1189 smp_cpu_index_default();
1190 current_cpu_data
= boot_cpu_data
;
1191 cpu_callin_map
= cpumask_of_cpu(0);
1194 * Setup boot CPU information
1196 smp_store_cpu_info(0); /* Final full version of the data */
1197 boot_cpu_logical_apicid
= logical_smp_processor_id();
1198 current_thread_info()->cpu
= 0; /* needed? */
1199 set_cpu_sibling_map(0);
1201 if (smp_sanity_check(max_cpus
) < 0) {
1202 printk(KERN_INFO
"SMP disabled\n");
1208 if (GET_APIC_ID(read_apic_id()) != boot_cpu_physical_apicid
) {
1209 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1210 GET_APIC_ID(read_apic_id()), boot_cpu_physical_apicid
);
1211 /* Or can we switch back to PIC here? */
1215 #ifdef CONFIG_X86_32
1219 * Switch from PIC to APIC mode.
1223 #ifdef CONFIG_X86_64
1225 * Enable IO APIC before setting up error vector
1227 if (!skip_ioapic_setup
&& nr_ioapics
)
1230 end_local_APIC_setup();
1232 map_cpu_to_logical_apicid();
1234 setup_portio_remap();
1236 smpboot_setup_io_apic();
1238 * Set up local APIC timer on boot CPU.
1241 printk(KERN_INFO
"CPU%d: ", 0);
1242 print_cpu_info(&cpu_data(0));
1246 * Early setup to make printk work.
1248 void __init
native_smp_prepare_boot_cpu(void)
1250 int me
= smp_processor_id();
1251 #ifdef CONFIG_X86_32
1253 switch_to_new_gdt();
1255 /* already set me in cpu_online_map in boot_cpu_init() */
1256 cpu_set(me
, cpu_callout_map
);
1257 per_cpu(cpu_state
, me
) = CPU_ONLINE
;
1260 void __init
native_smp_cpus_done(unsigned int max_cpus
)
1263 * Cleanup possible dangling ends...
1265 smpboot_restore_warm_reset_vector();
1267 Dprintk("Boot done.\n");
1271 #ifdef CONFIG_X86_IO_APIC
1272 setup_ioapic_dest();
1274 check_nmi_watchdog();
1275 #ifdef CONFIG_X86_32
1280 #ifdef CONFIG_HOTPLUG_CPU
1282 # ifdef CONFIG_X86_32
1283 void cpu_exit_clear(void)
1285 int cpu
= raw_smp_processor_id();
1292 cpu_clear(cpu
, cpu_callout_map
);
1293 cpu_clear(cpu
, cpu_callin_map
);
1295 unmap_cpu_to_logical_apicid(cpu
);
1297 # endif /* CONFIG_X86_32 */
1299 void remove_siblinginfo(int cpu
)
1302 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
1304 for_each_cpu_mask(sibling
, per_cpu(cpu_core_map
, cpu
)) {
1305 cpu_clear(cpu
, per_cpu(cpu_core_map
, sibling
));
1307 * last thread sibling in this cpu core going down
1309 if (cpus_weight(per_cpu(cpu_sibling_map
, cpu
)) == 1)
1310 cpu_data(sibling
).booted_cores
--;
1313 for_each_cpu_mask(sibling
, per_cpu(cpu_sibling_map
, cpu
))
1314 cpu_clear(cpu
, per_cpu(cpu_sibling_map
, sibling
));
1315 cpus_clear(per_cpu(cpu_sibling_map
, cpu
));
1316 cpus_clear(per_cpu(cpu_core_map
, cpu
));
1317 c
->phys_proc_id
= 0;
1319 cpu_clear(cpu
, cpu_sibling_setup_map
);
1322 int additional_cpus __initdata
= -1;
1324 static __init
int setup_additional_cpus(char *s
)
1326 return s
&& get_option(&s
, &additional_cpus
) ? 0 : -EINVAL
;
1328 early_param("additional_cpus", setup_additional_cpus
);
1331 * cpu_possible_map should be static, it cannot change as cpu's
1332 * are onlined, or offlined. The reason is per-cpu data-structures
1333 * are allocated by some modules at init time, and dont expect to
1334 * do this dynamically on cpu arrival/departure.
1335 * cpu_present_map on the other hand can change dynamically.
1336 * In case when cpu_hotplug is not compiled, then we resort to current
1337 * behaviour, which is cpu_possible == cpu_present.
1340 * Three ways to find out the number of additional hotplug CPUs:
1341 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1342 * - The user can overwrite it with additional_cpus=NUM
1343 * - Otherwise don't reserve additional CPUs.
1344 * We do this because additional CPUs waste a lot of memory.
1347 __init
void prefill_possible_map(void)
1352 if (additional_cpus
== -1) {
1353 if (disabled_cpus
> 0)
1354 additional_cpus
= disabled_cpus
;
1356 additional_cpus
= 0;
1358 possible
= num_processors
+ additional_cpus
;
1359 if (possible
> NR_CPUS
)
1362 printk(KERN_INFO
"SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1363 possible
, max_t(int, possible
- num_processors
, 0));
1365 for (i
= 0; i
< possible
; i
++)
1366 cpu_set(i
, cpu_possible_map
);
1369 static void __ref
remove_cpu_from_maps(int cpu
)
1371 cpu_clear(cpu
, cpu_online_map
);
1372 #ifdef CONFIG_X86_64
1373 cpu_clear(cpu
, cpu_callout_map
);
1374 cpu_clear(cpu
, cpu_callin_map
);
1375 /* was set by cpu_init() */
1376 clear_bit(cpu
, (unsigned long *)&cpu_initialized
);
1377 clear_node_cpumask(cpu
);
1381 int __cpu_disable(void)
1383 int cpu
= smp_processor_id();
1386 * Perhaps use cpufreq to drop frequency, but that could go
1387 * into generic code.
1389 * We won't take down the boot processor on i386 due to some
1390 * interrupts only being able to be serviced by the BSP.
1391 * Especially so if we're not using an IOAPIC -zwane
1396 if (nmi_watchdog
== NMI_LOCAL_APIC
)
1397 stop_apic_nmi_watchdog(NULL
);
1402 * Allow any queued timer interrupts to get serviced
1403 * This is only a temporary solution until we cleanup
1404 * fixup_irqs as we do for IA64.
1409 local_irq_disable();
1410 remove_siblinginfo(cpu
);
1412 /* It's now safe to remove this processor from the online map */
1413 remove_cpu_from_maps(cpu
);
1414 fixup_irqs(cpu_online_map
);
1418 void __cpu_die(unsigned int cpu
)
1420 /* We don't do anything here: idle task is faking death itself. */
1423 for (i
= 0; i
< 10; i
++) {
1424 /* They ack this in play_dead by setting CPU_DEAD */
1425 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
) {
1426 printk(KERN_INFO
"CPU %d is now offline\n", cpu
);
1427 if (1 == num_online_cpus())
1428 alternatives_smp_switch(0);
1433 printk(KERN_ERR
"CPU %u didn't die...\n", cpu
);
1435 #else /* ... !CONFIG_HOTPLUG_CPU */
1436 int __cpu_disable(void)
1441 void __cpu_die(unsigned int cpu
)
1443 /* We said "no" in __cpu_disable */
1449 * If the BIOS enumerates physical processors before logical,
1450 * maxcpus=N at enumeration-time can be used to disable HT.
1452 static int __init
parse_maxcpus(char *arg
)
1454 extern unsigned int maxcpus
;
1456 maxcpus
= simple_strtoul(arg
, NULL
, 0);
1459 early_param("maxcpus", parse_maxcpus
);