arch/x86/kernel/mpparse_64.c

   1 /*
   2  *      Intel Multiprocessor Specification 1.1 and 1.4
   3  *      compliant MP-table parsing routines.
   4  *
   5  *      (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
   6  *      (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
   7  *
   8  *      Fixes
   9  *              Erich Boleyn    :       MP v1.4 and additional changes.
  10  *              Alan Cox        :       Added EBDA scanning
  11  *              Ingo Molnar     :       various cleanups and rewrites
  12  *              Maciej W. Rozycki:      Bits for default MP configurations
  13  *              Paul Diefenbaugh:       Added full ACPI support
  14  */
  15
  16 #include <linux/mm.h>
  17 #include <linux/init.h>
  18 #include <linux/delay.h>
  19 #include <linux/bootmem.h>
  20 #include <linux/kernel_stat.h>
  21 #include <linux/mc146818rtc.h>
  22 #include <linux/acpi.h>
  23 #include <linux/module.h>
  24
  25 #include <asm/smp.h>
  26 #include <asm/mtrr.h>
  27 #include <asm/mpspec.h>
  28 #include <asm/pgalloc.h>
  29 #include <asm/io_apic.h>
  30 #include <asm/proto.h>
  31 #include <asm/acpi.h>
  32 #include <asm/bios_ebda.h>
  33
  34 #include <mach_apic.h>
  35
  36 /* Have we found an MP table */
  37 int smp_found_config;
  38
  39 /*
  40  * Various Linux-internal data structures created from the
  41  * MP-table.
  42  */
  43 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
  44 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
  45
  46 static int mp_current_pci_id = 0;
  47 /* I/O APIC entries */
  48 struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
  49
  50 /* # of MP IRQ source entries */
  51 struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
  52
  53 /* MP IRQ source entries */
  54 int mp_irq_entries;
  55
  56 int nr_ioapics;
  57
  58 /* Make it easy to share the UP and SMP code: */
  59 #ifndef CONFIG_X86_SMP
  60 unsigned int num_processors;
  61 unsigned disabled_cpus __cpuinitdata;
  62 #ifndef CONFIG_X86_LOCAL_APIC
  63 unsigned int boot_cpu_physical_apicid = -1U;
  64 #endif
  65 #endif
  66
  67 /*
  68  * Intel MP BIOS table parsing routines:
  69  */
  70
  71 /*
  72  * Checksum an MP configuration block.
  73  */
  74
  75 static int __init mpf_checksum(unsigned char *mp, int len)
  76 {
  77         int sum = 0;
  78
  79         while (len--)
  80                 sum += *mp++;
  81
  82         return sum & 0xFF;
  83 }
  84
  85 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
  86 {
  87         char *bootup_cpu = "";
  88
  89         if (!(m->mpc_cpuflag & CPU_ENABLED)) {
  90                 disabled_cpus++;
  91                 return;
  92         }
  93         if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
  94                 bootup_cpu = " (Bootup-CPU)";
  95                 boot_cpu_physical_apicid = m->mpc_apicid;
  96         }
  97
  98         printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
  99         generic_processor_info(m->mpc_apicid, 0);
 100 }
 101
 102 static void __init MP_bus_info(struct mpc_config_bus *m)
 103 {
 104         char str[7];
 105
 106         memcpy(str, m->mpc_bustype, 6);
 107         str[6] = 0;
 108         Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
 109
 110         if (strncmp(str, "ISA", 3) == 0) {
 111                 set_bit(m->mpc_busid, mp_bus_not_pci);
 112         } else if (strncmp(str, "PCI", 3) == 0) {
 113                 clear_bit(m->mpc_busid, mp_bus_not_pci);
 114                 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
 115                 mp_current_pci_id++;
 116         } else {
 117                 printk(KERN_ERR "Unknown bustype %s\n", str);
 118         }
 119 }
 120
 121 static int bad_ioapic(unsigned long address)
 122 {
 123         if (nr_ioapics >= MAX_IO_APICS) {
 124                 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
 125                        "(found %d)\n", MAX_IO_APICS, nr_ioapics);
 126                 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
 127         }
 128         if (!address) {
 129                 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
 130                        " found in table, skipping!\n");
 131                 return 1;
 132         }
 133         return 0;
 134 }
 135
 136 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
 137 {
 138         if (!(m->mpc_flags & MPC_APIC_USABLE))
 139                 return;
 140
 141         printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
 142                m->mpc_apicaddr);
 143
 144         if (bad_ioapic(m->mpc_apicaddr))
 145                 return;
 146
 147         mp_ioapics[nr_ioapics] = *m;
 148         nr_ioapics++;
 149 }
 150
 151 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
 152 {
 153         mp_irqs[mp_irq_entries] = *m;
 154         Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
 155                 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
 156                 m->mpc_irqtype, m->mpc_irqflag & 3,
 157                 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
 158                 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
 159         if (++mp_irq_entries >= MAX_IRQ_SOURCES)
 160                 panic("Max # of irq sources exceeded!!\n");
 161 }
 162
 163 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
 164 {
 165         Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
 166                 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
 167                 m->mpc_irqtype, m->mpc_irqflag & 3,
 168                 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
 169                 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
 170 }
 171
 172 /*
 173  * Read/parse the MPC
 174  */
 175 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
 176 {
 177         char str[16];
 178         int count = sizeof(*mpc);
 179         unsigned char *mpt = ((unsigned char *)mpc) + count;
 180
 181         if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
 182                 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
 183                        mpc->mpc_signature[0],
 184                        mpc->mpc_signature[1],
 185                        mpc->mpc_signature[2], mpc->mpc_signature[3]);
 186                 return 0;
 187         }
 188         if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
 189                 printk(KERN_ERR "MPTABLE: checksum error!\n");
 190                 return 0;
 191         }
 192         if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
 193                 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
 194                        mpc->mpc_spec);
 195                 return 0;
 196         }
 197         if (!mpc->mpc_lapic) {
 198                 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
 199                 return 0;
 200         }
 201         memcpy(str, mpc->mpc_oem, 8);
 202         str[8] = 0;
 203         printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
 204
 205         memcpy(str, mpc->mpc_productid, 12);
 206         str[12] = 0;
 207         printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
 208
 209         printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
 210
 211         /* save the local APIC address, it might be non-default */
 212         if (!acpi_lapic)
 213                 mp_lapic_addr = mpc->mpc_lapic;
 214
 215         if (early)
 216                 return 1;
 217
 218         /*
 219          *      Now process the configuration blocks.
 220          */
 221         while (count < mpc->mpc_length) {
 222                 switch (*mpt) {
 223                 case MP_PROCESSOR:
 224                         {
 225                                 struct mpc_config_processor *m =
 226                                     (struct mpc_config_processor *)mpt;
 227                                 if (!acpi_lapic)
 228                                         MP_processor_info(m);
 229                                 mpt += sizeof(*m);
 230                                 count += sizeof(*m);
 231                                 break;
 232                         }
 233                 case MP_BUS:
 234                         {
 235                                 struct mpc_config_bus *m =
 236                                     (struct mpc_config_bus *)mpt;
 237                                 MP_bus_info(m);
 238                                 mpt += sizeof(*m);
 239                                 count += sizeof(*m);
 240                                 break;
 241                         }
 242                 case MP_IOAPIC:
 243                         {
 244                                 struct mpc_config_ioapic *m =
 245                                     (struct mpc_config_ioapic *)mpt;
 246                                 MP_ioapic_info(m);
 247                                 mpt += sizeof(*m);
 248                                 count += sizeof(*m);
 249                                 break;
 250                         }
 251                 case MP_INTSRC:
 252                         {
 253                                 struct mpc_config_intsrc *m =
 254                                     (struct mpc_config_intsrc *)mpt;
 255
 256                                 MP_intsrc_info(m);
 257                                 mpt += sizeof(*m);
 258                                 count += sizeof(*m);
 259                                 break;
 260                         }
 261                 case MP_LINTSRC:
 262                         {
 263                                 struct mpc_config_lintsrc *m =
 264                                     (struct mpc_config_lintsrc *)mpt;
 265                                 MP_lintsrc_info(m);
 266                                 mpt += sizeof(*m);
 267                                 count += sizeof(*m);
 268                                 break;
 269                         }
 270                 }
 271         }
 272         setup_apic_routing();
 273         if (!num_processors)
 274                 printk(KERN_ERR "MPTABLE: no processors registered!\n");
 275         return num_processors;
 276 }
 277
 278 static int __init ELCR_trigger(unsigned int irq)
 279 {
 280         unsigned int port;
 281
 282         port = 0x4d0 + (irq >> 3);
 283         return (inb(port) >> (irq & 7)) & 1;
 284 }
 285
 286 static void __init construct_default_ioirq_mptable(int mpc_default_type)
 287 {
 288         struct mpc_config_intsrc intsrc;
 289         int i;
 290         int ELCR_fallback = 0;
 291
 292         intsrc.mpc_type = MP_INTSRC;
 293         intsrc.mpc_irqflag = 0; /* conforming */
 294         intsrc.mpc_srcbus = 0;
 295         intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
 296
 297         intsrc.mpc_irqtype = mp_INT;
 298
 299         /*
 300          *  If true, we have an ISA/PCI system with no IRQ entries
 301          *  in the MP table. To prevent the PCI interrupts from being set up
 302          *  incorrectly, we try to use the ELCR. The sanity check to see if
 303          *  there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
 304          *  never be level sensitive, so we simply see if the ELCR agrees.
 305          *  If it does, we assume it's valid.
 306          */
 307         if (mpc_default_type == 5) {
 308                 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
 309                        "falling back to ELCR\n");
 310
 311                 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
 312                     ELCR_trigger(13))
 313                         printk(KERN_ERR "ELCR contains invalid data... "
 314                                "not using ELCR\n");
 315                 else {
 316                         printk(KERN_INFO
 317                                "Using ELCR to identify PCI interrupts\n");
 318                         ELCR_fallback = 1;
 319                 }
 320         }
 321
 322         for (i = 0; i < 16; i++) {
 323                 switch (mpc_default_type) {
 324                 case 2:
 325                         if (i == 0 || i == 13)
 326                                 continue;       /* IRQ0 & IRQ13 not connected */
 327                         /* fall through */
 328                 default:
 329                         if (i == 2)
 330                                 continue;       /* IRQ2 is never connected */
 331                 }
 332
 333                 if (ELCR_fallback) {
 334                         /*
 335                          *  If the ELCR indicates a level-sensitive interrupt, we
 336                          *  copy that information over to the MP table in the
 337                          *  irqflag field (level sensitive, active high polarity).
 338                          */
 339                         if (ELCR_trigger(i))
 340                                 intsrc.mpc_irqflag = 13;
 341                         else
 342                                 intsrc.mpc_irqflag = 0;
 343                 }
 344
 345                 intsrc.mpc_srcbusirq = i;
 346                 intsrc.mpc_dstirq = i ? i : 2;  /* IRQ0 to INTIN2 */
 347                 MP_intsrc_info(&intsrc);
 348         }
 349
 350         intsrc.mpc_irqtype = mp_ExtINT;
 351         intsrc.mpc_srcbusirq = 0;
 352         intsrc.mpc_dstirq = 0;  /* 8259A to INTIN0 */
 353         MP_intsrc_info(&intsrc);
 354 }
 355
 356 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
 357 {
 358         struct mpc_config_processor processor;
 359         struct mpc_config_bus bus;
 360         struct mpc_config_ioapic ioapic;
 361         struct mpc_config_lintsrc lintsrc;
 362         int linttypes[2] = { mp_ExtINT, mp_NMI };
 363         int i;
 364
 365         /*
 366          * local APIC has default address
 367          */
 368         mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
 369
 370         /*
 371          * 2 CPUs, numbered 0 & 1.
 372          */
 373         processor.mpc_type = MP_PROCESSOR;
 374         processor.mpc_apicver = 0;
 375         processor.mpc_cpuflag = CPU_ENABLED;
 376         processor.mpc_cpufeature = 0;
 377         processor.mpc_featureflag = 0;
 378         processor.mpc_reserved[0] = 0;
 379         processor.mpc_reserved[1] = 0;
 380         for (i = 0; i < 2; i++) {
 381                 processor.mpc_apicid = i;
 382                 MP_processor_info(&processor);
 383         }
 384
 385         bus.mpc_type = MP_BUS;
 386         bus.mpc_busid = 0;
 387         switch (mpc_default_type) {
 388         default:
 389                 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
 390                        mpc_default_type);
 391                 /* fall through */
 392         case 1:
 393         case 5:
 394                 memcpy(bus.mpc_bustype, "ISA   ", 6);
 395                 break;
 396         }
 397         MP_bus_info(&bus);
 398         if (mpc_default_type > 4) {
 399                 bus.mpc_busid = 1;
 400                 memcpy(bus.mpc_bustype, "PCI   ", 6);
 401                 MP_bus_info(&bus);
 402         }
 403
 404         ioapic.mpc_type = MP_IOAPIC;
 405         ioapic.mpc_apicid = 2;
 406         ioapic.mpc_apicver = 0;
 407         ioapic.mpc_flags = MPC_APIC_USABLE;
 408         ioapic.mpc_apicaddr = 0xFEC00000;
 409         MP_ioapic_info(&ioapic);
 410
 411         /*
 412          * We set up most of the low 16 IO-APIC pins according to MPS rules.
 413          */
 414         construct_default_ioirq_mptable(mpc_default_type);
 415
 416         lintsrc.mpc_type = MP_LINTSRC;
 417         lintsrc.mpc_irqflag = 0;        /* conforming */
 418         lintsrc.mpc_srcbusid = 0;
 419         lintsrc.mpc_srcbusirq = 0;
 420         lintsrc.mpc_destapic = MP_APIC_ALL;
 421         for (i = 0; i < 2; i++) {
 422                 lintsrc.mpc_irqtype = linttypes[i];
 423                 lintsrc.mpc_destapiclint = i;
 424                 MP_lintsrc_info(&lintsrc);
 425         }
 426 }
 427
 428 static struct intel_mp_floating *mpf_found;
 429
 430 /*
 431  * Scan the memory blocks for an SMP configuration block.
 432  */
 433 static void __init __get_smp_config(unsigned early)
 434 {
 435         struct intel_mp_floating *mpf = mpf_found;
 436
 437         if (acpi_lapic && early)
 438                 return;
 439         /*
 440          * ACPI supports both logical (e.g. Hyper-Threading) and physical
 441          * processors, where MPS only supports physical.
 442          */
 443         if (acpi_lapic && acpi_ioapic) {
 444                 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
 445                        "information\n");
 446                 return;
 447         } else if (acpi_lapic)
 448                 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
 449                        "configuration information\n");
 450
 451         printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
 452                mpf->mpf_specification);
 453
 454         /*
 455          * Now see if we need to read further.
 456          */
 457         if (mpf->mpf_feature1 != 0) {
 458                 if (early) {
 459                         /*
 460                          * local APIC has default address
 461                          */
 462                         mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
 463                         return;
 464                 }
 465
 466                 printk(KERN_INFO "Default MP configuration #%d\n",
 467                        mpf->mpf_feature1);
 468                 construct_default_ISA_mptable(mpf->mpf_feature1);
 469
 470         } else if (mpf->mpf_physptr) {
 471
 472                 /*
 473                  * Read the physical hardware table.  Anything here will
 474                  * override the defaults.
 475                  */
 476                 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
 477                         smp_found_config = 0;
 478                         printk(KERN_ERR
 479                                "BIOS bug, MP table errors detected!...\n");
 480                         printk(KERN_ERR "... disabling SMP support. "
 481                                "(tell your hw vendor)\n");
 482                         return;
 483                 }
 484
 485                 if (early)
 486                         return;
 487                 /*
 488                  * If there are no explicit MP IRQ entries, then we are
 489                  * broken.  We set up most of the low 16 IO-APIC pins to
 490                  * ISA defaults and hope it will work.
 491                  */
 492                 if (!mp_irq_entries) {
 493                         struct mpc_config_bus bus;
 494
 495                         printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
 496                                "using default mptable. "
 497                                "(tell your hw vendor)\n");
 498
 499                         bus.mpc_type = MP_BUS;
 500                         bus.mpc_busid = 0;
 501                         memcpy(bus.mpc_bustype, "ISA   ", 6);
 502                         MP_bus_info(&bus);
 503
 504                         construct_default_ioirq_mptable(0);
 505                 }
 506
 507         } else
 508                 BUG();
 509
 510         if (!early)
 511                 printk(KERN_INFO "Processors: %d\n", num_processors);
 512         /*
 513          * Only use the first configuration found.
 514          */
 515 }
 516
 517 void __init early_get_smp_config(void)
 518 {
 519         __get_smp_config(1);
 520 }
 521
 522 void __init get_smp_config(void)
 523 {
 524         __get_smp_config(0);
 525 }
 526
 527 static int __init smp_scan_config(unsigned long base, unsigned long length,
 528                                   unsigned reserve)
 529 {
 530         extern void __bad_mpf_size(void);
 531         unsigned int *bp = phys_to_virt(base);
 532         struct intel_mp_floating *mpf;
 533
 534         Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
 535         if (sizeof(*mpf) != 16)
 536                 __bad_mpf_size();
 537
 538         while (length > 0) {
 539                 mpf = (struct intel_mp_floating *)bp;
 540                 if ((*bp == SMP_MAGIC_IDENT) &&
 541                     (mpf->mpf_length == 1) &&
 542                     !mpf_checksum((unsigned char *)bp, 16) &&
 543                     ((mpf->mpf_specification == 1)
 544                      || (mpf->mpf_specification == 4))) {
 545
 546                         smp_found_config = 1;
 547                         mpf_found = mpf;
 548
 549                         if (!reserve)
 550                                 return 1;
 551
 552                         reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
 553                         if (mpf->mpf_physptr)
 554                                 reserve_bootmem_generic(mpf->mpf_physptr,
 555                                                         PAGE_SIZE);
 556                         return 1;
 557                 }
 558                 bp += 4;
 559                 length -= 16;
 560         }
 561         return 0;
 562 }
 563
 564 static void __init __find_smp_config(unsigned reserve)
 565 {
 566         unsigned int address;
 567
 568         /*
 569          * FIXME: Linux assumes you have 640K of base ram..
 570          * this continues the error...
 571          *
 572          * 1) Scan the bottom 1K for a signature
 573          * 2) Scan the top 1K of base RAM
 574          * 3) Scan the 64K of bios
 575          */
 576         if (smp_scan_config(0x0, 0x400, reserve) ||
 577             smp_scan_config(639 * 0x400, 0x400, reserve) ||
 578             smp_scan_config(0xF0000, 0x10000, reserve))
 579                 return;
 580         /*
 581          * If it is an SMP machine we should know now.
 582          *
 583          * there is a real-mode segmented pointer pointing to the
 584          * 4K EBDA area at 0x40E, calculate and scan it here.
 585          *
 586          * NOTE! There are Linux loaders that will corrupt the EBDA
 587          * area, and as such this kind of SMP config may be less
 588          * trustworthy, simply because the SMP table may have been
 589          * stomped on during early boot. These loaders are buggy and
 590          * should be fixed.
 591          *
 592          * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
 593          */
 594
 595         address = get_bios_ebda();
 596         if (address)
 597                 smp_scan_config(address, 0x400, reserve);
 598 }
 599
 600 void __init early_find_smp_config(void)
 601 {
 602         __find_smp_config(0);
 603 }
 604
 605 void __init find_smp_config(void)
 606 {
 607         __find_smp_config(1);
 608 }
 609
 610 /* --------------------------------------------------------------------------
 611                             ACPI-based MP Configuration
 612    -------------------------------------------------------------------------- */
 613
 614 #ifdef CONFIG_ACPI
 615
 616 void __init mp_register_lapic_address(u64 address)
 617 {
 618         mp_lapic_addr = (unsigned long)address;
 619         set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
 620         if (boot_cpu_physical_apicid == -1U)
 621                 boot_cpu_physical_apicid  = GET_APIC_ID(read_apic_id());
 622 }
 623 void __cpuinit mp_register_lapic(int id, u8 enabled)
 624 {
 625         if (!enabled) {
 626                 ++disabled_cpus;
 627                 return;
 628         }
 629
 630         generic_processor_info(id, 0);
 631 }
 632
 633
 634 #define MP_ISA_BUS              0
 635 #define MP_MAX_IOAPIC_PIN       127
 636
 637 static struct mp_ioapic_routing {
 638         int apic_id;
 639         int gsi_base;
 640         int gsi_end;
 641         u32 pin_programmed[4];
 642 } mp_ioapic_routing[MAX_IO_APICS];
 643
 644 static int mp_find_ioapic(int gsi)
 645 {
 646         int i = 0;
 647
 648         /* Find the IOAPIC that manages this GSI. */
 649         for (i = 0; i < nr_ioapics; i++) {
 650                 if ((gsi >= mp_ioapic_routing[i].gsi_base)
 651                     && (gsi <= mp_ioapic_routing[i].gsi_end))
 652                         return i;
 653         }
 654
 655         printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
 656         return -1;
 657 }
 658
 659 static u8 uniq_ioapic_id(u8 id)
 660 {
 661         int i;
 662         DECLARE_BITMAP(used, 256);
 663         bitmap_zero(used, 256);
 664         for (i = 0; i < nr_ioapics; i++) {
 665                 struct mpc_config_ioapic *ia = &mp_ioapics[i];
 666                 __set_bit(ia->mpc_apicid, used);
 667         }
 668         if (!test_bit(id, used))
 669                 return id;
 670         return find_first_zero_bit(used, 256);
 671 }
 672
 673 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
 674 {
 675         int idx = 0;
 676
 677         if (bad_ioapic(address))
 678                 return;
 679
 680         idx = nr_ioapics;
 681
 682         mp_ioapics[idx].mpc_type = MP_IOAPIC;
 683         mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
 684         mp_ioapics[idx].mpc_apicaddr = address;
 685
 686         set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
 687         mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
 688         mp_ioapics[idx].mpc_apicver = 0;
 689
 690         /*
 691          * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
 692          * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
 693          */
 694         mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
 695         mp_ioapic_routing[idx].gsi_base = gsi_base;
 696         mp_ioapic_routing[idx].gsi_end = gsi_base +
 697             io_apic_get_redir_entries(idx);
 698
 699         printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
 700                "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
 701                mp_ioapics[idx].mpc_apicaddr,
 702                mp_ioapic_routing[idx].gsi_base,
 703                mp_ioapic_routing[idx].gsi_end);
 704
 705         nr_ioapics++;
 706 }
 707
 708 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
 709 {
 710         struct mpc_config_intsrc intsrc;
 711         int ioapic = -1;
 712         int pin = -1;
 713
 714         /*
 715          * Convert 'gsi' to 'ioapic.pin'.
 716          */
 717         ioapic = mp_find_ioapic(gsi);
 718         if (ioapic < 0)
 719                 return;
 720         pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
 721
 722         /*
 723          * TBD: This check is for faulty timer entries, where the override
 724          *      erroneously sets the trigger to level, resulting in a HUGE
 725          *      increase of timer interrupts!
 726          */
 727         if ((bus_irq == 0) && (trigger == 3))
 728                 trigger = 1;
 729
 730         intsrc.mpc_type = MP_INTSRC;
 731         intsrc.mpc_irqtype = mp_INT;
 732         intsrc.mpc_irqflag = (trigger << 2) | polarity;
 733         intsrc.mpc_srcbus = MP_ISA_BUS;
 734         intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
 735         intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;     /* APIC ID */
 736         intsrc.mpc_dstirq = pin;        /* INTIN# */
 737
 738         Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
 739                 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
 740                 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
 741                 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
 742
 743         mp_irqs[mp_irq_entries] = intsrc;
 744         if (++mp_irq_entries == MAX_IRQ_SOURCES)
 745                 panic("Max # of irq sources exceeded!\n");
 746 }
 747
 748 void __init mp_config_acpi_legacy_irqs(void)
 749 {
 750         struct mpc_config_intsrc intsrc;
 751         int i = 0;
 752         int ioapic = -1;
 753
 754         /*
 755          * Fabricate the legacy ISA bus (bus #31).
 756          */
 757         set_bit(MP_ISA_BUS, mp_bus_not_pci);
 758
 759         /*
 760          * Locate the IOAPIC that manages the ISA IRQs (0-15).
 761          */
 762         ioapic = mp_find_ioapic(0);
 763         if (ioapic < 0)
 764                 return;
 765
 766         intsrc.mpc_type = MP_INTSRC;
 767         intsrc.mpc_irqflag = 0; /* Conforming */
 768         intsrc.mpc_srcbus = MP_ISA_BUS;
 769         intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
 770
 771         /*
 772          * Use the default configuration for the IRQs 0-15.  Unless
 773          * overridden by (MADT) interrupt source override entries.
 774          */
 775         for (i = 0; i < 16; i++) {
 776                 int idx;
 777
 778                 for (idx = 0; idx < mp_irq_entries; idx++) {
 779                         struct mpc_config_intsrc *irq = mp_irqs + idx;
 780
 781                         /* Do we already have a mapping for this ISA IRQ? */
 782                         if (irq->mpc_srcbus == MP_ISA_BUS
 783                             && irq->mpc_srcbusirq == i)
 784                                 break;
 785
 786                         /* Do we already have a mapping for this IOAPIC pin */
 787                         if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
 788                             (irq->mpc_dstirq == i))
 789                                 break;
 790                 }
 791
 792                 if (idx != mp_irq_entries) {
 793                         printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
 794                         continue;       /* IRQ already used */
 795                 }
 796
 797                 intsrc.mpc_irqtype = mp_INT;
 798                 intsrc.mpc_srcbusirq = i;       /* Identity mapped */
 799                 intsrc.mpc_dstirq = i;
 800
 801                 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
 802                         "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
 803                         (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
 804                         intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
 805                         intsrc.mpc_dstirq);
 806
 807                 mp_irqs[mp_irq_entries] = intsrc;
 808                 if (++mp_irq_entries == MAX_IRQ_SOURCES)
 809                         panic("Max # of irq sources exceeded!\n");
 810         }
 811 }
 812
 813 int mp_register_gsi(u32 gsi, int triggering, int polarity)
 814 {
 815         int ioapic = -1;
 816         int ioapic_pin = 0;
 817         int idx, bit = 0;
 818
 819         if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
 820                 return gsi;
 821
 822         /* Don't set up the ACPI SCI because it's already set up */
 823         if (acpi_gbl_FADT.sci_interrupt == gsi)
 824                 return gsi;
 825
 826         ioapic = mp_find_ioapic(gsi);
 827         if (ioapic < 0) {
 828                 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
 829                 return gsi;
 830         }
 831
 832         ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
 833
 834         /*
 835          * Avoid pin reprogramming.  PRTs typically include entries
 836          * with redundant pin->gsi mappings (but unique PCI devices);
 837          * we only program the IOAPIC on the first.
 838          */
 839         bit = ioapic_pin % 32;
 840         idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
 841         if (idx > 3) {
 842                 printk(KERN_ERR "Invalid reference to IOAPIC pin "
 843                        "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
 844                        ioapic_pin);
 845                 return gsi;
 846         }
 847         if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
 848                 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
 849                         mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
 850                 return gsi;
 851         }
 852
 853         mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
 854
 855         io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
 856                                 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
 857                                 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
 858         return gsi;
 859 }
 860 #endif /* CONFIG_ACPI */