2 * Copyright (C) 2000 Hewlett-Packard Co
3 * Copyright (C) 2000 David Mosberger-Tang <davidm@hpl.hp.com>
5 * 32-bit integer division.
7 * This code is based on the application note entitled "Divide, Square Root
8 * and Remainder Algorithms for the IA-64 Architecture". This document
9 * is available as Intel document number 248725-002 or via the web at
10 * http://developer.intel.com/software/opensource/numerics/
12 * For more details on the theory behind these algorithms, see "IA-64
13 * and Elementary Functions" by Peter Markstein; HP Professional Books
14 * (http://www.hp.com/go/retailbooks/)
17 #include <asm/asmmacro.h>
28 # define INT_TO_FP(a,b) fcvt.xuf.s1 a=b
29 # define FP_TO_INT(a,b) fcvt.fxu.trunc.s1 a=b
33 # define INT_TO_FP(a,b) fcvt.xf a=b
34 # define FP_TO_INT(a,b) fcvt.fx.trunc.s1 a=b
37 #define PASTE1(a,b) a##b
38 #define PASTE(a,b) PASTE1(a,b)
39 #define NAME PASTE(PASTE(__,SGN),PASTE(OP,si3))
43 // Transfer inputs to FP registers.
44 mov r2 = 0xffdd // r2 = -34 + 65535 (fp reg format bias)
45 EXTEND in0 = in0 // in0 = a
46 EXTEND in1 = in1 // in1 = b
51 sub in1 = r0, in1 // in1 = -b
54 // Convert the inputs to FP, to avoid FP software-assist faults.
58 setf.exp f7 = r2 // f7 = 2^-34
59 frcpa.s1 f6, p6 = f8, f9 // y0 = frcpa(b)
61 (p6) fmpy.s1 f8 = f8, f6 // q0 = a*y0
62 (p6) fnma.s1 f6 = f9, f6, f1 // e0 = -b*y0 + 1
65 setf.sig f9 = in1 // f9 = -b
67 (p6) fma.s1 f8 = f6, f8, f8 // q1 = e0*q0 + q0
68 (p6) fma.s1 f6 = f6, f6, f7 // e1 = e0*e0 + 2^-34
73 (p6) fma.s1 f6 = f6, f8, f8 // q2 = e1*q1 + q1
75 FP_TO_INT(f6, f6) // q = trunc(q2)
78 xma.l f6 = f6, f9, f7 // r = q*(-b) + a
81 getf.sig r8 = f6 // transfer result to result register