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ide: remove ideprobe_init()
[linux-2.6/mini2440.git] / include / linux / ide.h
blobd7c0f9a8bd9e64ee0b5472dac38065db3b43ca63
1 #ifndef _IDE_H
2 #define _IDE_H
3 /*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/hdsmart.h>
13 #include <linux/blkdev.h>
14 #include <linux/proc_fs.h>
15 #include <linux/interrupt.h>
16 #include <linux/bitops.h>
17 #include <linux/bio.h>
18 #include <linux/device.h>
19 #include <linux/pci.h>
20 #include <linux/completion.h>
21 #ifdef CONFIG_BLK_DEV_IDEACPI
22 #include <acpi/acpi.h>
23 #endif
24 #include <asm/byteorder.h>
25 #include <asm/system.h>
26 #include <asm/io.h>
27 #include <asm/semaphore.h>
28 #include <asm/mutex.h>
29
30 #if defined(CRIS) || defined(FRV)
31 # define SUPPORT_VLB_SYNC 0
32 #else
33 # define SUPPORT_VLB_SYNC 1
34 #endif
35
36 /*
37 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
38 * number.
39 */
40
41 #define IDE_NO_IRQ (-1)
42
43 typedef unsigned char byte; /* used everywhere */
44
45 /*
46 * Probably not wise to fiddle with these
47 */
48 #define ERROR_MAX 8 /* Max read/write errors per sector */
49 #define ERROR_RESET 3 /* Reset controller every 4th retry */
50 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
51
52 /*
53 * Tune flags
54 */
55 #define IDE_TUNE_NOAUTO 2
56 #define IDE_TUNE_AUTO 1
57 #define IDE_TUNE_DEFAULT 0
58
59 /*
60 * state flags
61 */
62
63 #define DMA_PIO_RETRY 1 /* retrying in PIO */
64
65 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
66 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
67
68 /*
69 * Definitions for accessing IDE controller registers
70 */
71 #define IDE_NR_PORTS (10)
72
73 #define IDE_DATA_OFFSET (0)
74 #define IDE_ERROR_OFFSET (1)
75 #define IDE_NSECTOR_OFFSET (2)
76 #define IDE_SECTOR_OFFSET (3)
77 #define IDE_LCYL_OFFSET (4)
78 #define IDE_HCYL_OFFSET (5)
79 #define IDE_SELECT_OFFSET (6)
80 #define IDE_STATUS_OFFSET (7)
81 #define IDE_CONTROL_OFFSET (8)
82 #define IDE_IRQ_OFFSET (9)
83
84 #define IDE_FEATURE_OFFSET IDE_ERROR_OFFSET
85 #define IDE_COMMAND_OFFSET IDE_STATUS_OFFSET
86
87 #define IDE_DATA_REG (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
88 #define IDE_ERROR_REG (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
89 #define IDE_NSECTOR_REG (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
90 #define IDE_SECTOR_REG (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
91 #define IDE_LCYL_REG (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
92 #define IDE_HCYL_REG (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
93 #define IDE_SELECT_REG (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
94 #define IDE_STATUS_REG (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
95 #define IDE_CONTROL_REG (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
96 #define IDE_IRQ_REG (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
97
98 #define IDE_FEATURE_REG IDE_ERROR_REG
99 #define IDE_COMMAND_REG IDE_STATUS_REG
100 #define IDE_ALTSTATUS_REG IDE_CONTROL_REG
101 #define IDE_IREASON_REG IDE_NSECTOR_REG
102 #define IDE_BCOUNTL_REG IDE_LCYL_REG
103 #define IDE_BCOUNTH_REG IDE_HCYL_REG
104
105 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
106 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
107 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
108 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
109 #define DRIVE_READY (READY_STAT | SEEK_STAT)
110 #define DATA_READY (DRQ_STAT)
111
112 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
113
114 #define SATA_NR_PORTS (3) /* 16 possible ?? */
115
116 #define SATA_STATUS_OFFSET (0)
117 #define SATA_STATUS_REG (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
118 #define SATA_ERROR_OFFSET (1)
119 #define SATA_ERROR_REG (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
120 #define SATA_CONTROL_OFFSET (2)
121 #define SATA_CONTROL_REG (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
122
123 #define SATA_MISC_OFFSET (0)
124 #define SATA_MISC_REG (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
125 #define SATA_PHY_OFFSET (1)
126 #define SATA_PHY_REG (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
127 #define SATA_IEN_OFFSET (2)
128 #define SATA_IEN_REG (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
129
130 /*
131 * Our Physical Region Descriptor (PRD) table should be large enough
132 * to handle the biggest I/O request we are likely to see. Since requests
133 * can have no more than 256 sectors, and since the typical blocksize is
134 * two or more sectors, we could get by with a limit of 128 entries here for
135 * the usual worst case. Most requests seem to include some contiguous blocks,
136 * further reducing the number of table entries required.
137 *
138 * The driver reverts to PIO mode for individual requests that exceed
139 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
140 * 100% of all crazy scenarios here is not necessary.
141 *
142 * As it turns out though, we must allocate a full 4KB page for this,
143 * so the two PRD tables (ide0 & ide1) will each get half of that,
144 * allowing each to have about 256 entries (8 bytes each) from this.
145 */
146 #define PRD_BYTES 8
147 #define PRD_ENTRIES 256
148
149 /*
150 * Some more useful definitions
151 */
152 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
153 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
154 #define SECTOR_SIZE 512
155 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
156 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
157
158 /*
159 * Timeouts for various operations:
160 */
161 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
162 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
163 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
164 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
165 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
166 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
167
168 /*
169 * Check for an interrupt and acknowledge the interrupt status
170 */
171 struct hwif_s;
172 typedef int (ide_ack_intr_t)(struct hwif_s *);
173
174 /*
175 * hwif_chipset_t is used to keep track of the specific hardware
176 * chipset used by each IDE interface, if known.
177 */
178 enum { ide_unknown, ide_generic, ide_pci,
179 ide_cmd640, ide_dtc2278, ide_ali14xx,
180 ide_qd65xx, ide_umc8672, ide_ht6560b,
181 ide_rz1000, ide_trm290,
182 ide_cmd646, ide_cy82c693, ide_4drives,
183 ide_pmac, ide_etrax100, ide_acorn,
184 ide_au1xxx, ide_forced
185 };
186
187 typedef u8 hwif_chipset_t;
188
189 /*
190 * Structure to hold all information about the location of this port
191 */
192 typedef struct hw_regs_s {
193 unsigned long io_ports[IDE_NR_PORTS]; /* task file registers */
194 int irq; /* our irq number */
195 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
196 hwif_chipset_t chipset;
197 struct device *dev;
198 } hw_regs_t;
199
200 struct hwif_s * ide_find_port(unsigned long);
201
202 struct ide_drive_s;
203 int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *), int,
204 struct hwif_s **);
205
206 void ide_setup_ports( hw_regs_t *hw,
207 unsigned long base,
208 int *offsets,
209 unsigned long ctrl,
210 unsigned long intr,
211 ide_ack_intr_t *ack_intr,
212 #if 0
213 ide_io_ops_t *iops,
214 #endif
215 int irq);
216
217 static inline void ide_std_init_ports(hw_regs_t *hw,
218 unsigned long io_addr,
219 unsigned long ctl_addr)
220 {
221 unsigned int i;
222
223 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
224 hw->io_ports[i] = io_addr++;
225
226 hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
227 }
228
229 #include <asm/ide.h>
230
231 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
232 #undef MAX_HWIFS
233 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
234 #endif
235
236 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
237 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
238 # define ide_default_io_base(index) (0)
239 # define ide_default_irq(base) (0)
240 # define ide_init_default_irq(base) (0)
241 #endif
242
243 #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
244 static inline void ide_init_hwif_ports(hw_regs_t *hw,
245 unsigned long io_addr,
246 unsigned long ctl_addr,
247 int *irq)
248 {
249 if (!ctl_addr)
250 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
251 else
252 ide_std_init_ports(hw, io_addr, ctl_addr);
253
254 if (irq)
255 *irq = 0;
256
257 hw->io_ports[IDE_IRQ_OFFSET] = 0;
258
259 #ifdef CONFIG_PPC32
260 if (ppc_ide_md.ide_init_hwif)
261 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
262 #endif
263 }
264 #else
265 static inline void ide_init_hwif_ports(hw_regs_t *hw,
266 unsigned long io_addr,
267 unsigned long ctl_addr,
268 int *irq)
269 {
270 if (io_addr || ctl_addr)
271 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
272 }
273 #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
274
275 /* Currently only m68k, apus and m8xx need it */
276 #ifndef IDE_ARCH_ACK_INTR
277 # define ide_ack_intr(hwif) (1)
278 #endif
279
280 /* Currently only Atari needs it */
281 #ifndef IDE_ARCH_LOCK
282 # define ide_release_lock() do {} while (0)
283 # define ide_get_lock(hdlr, data) do {} while (0)
284 #endif /* IDE_ARCH_LOCK */
285
286 /*
287 * Now for the data we need to maintain per-drive: ide_drive_t
288 */
289
290 #define ide_scsi 0x21
291 #define ide_disk 0x20
292 #define ide_optical 0x7
293 #define ide_cdrom 0x5
294 #define ide_tape 0x1
295 #define ide_floppy 0x0
296
297 /*
298 * Special Driver Flags
299 *
300 * set_geometry : respecify drive geometry
301 * recalibrate : seek to cyl 0
302 * set_multmode : set multmode count
303 * set_tune : tune interface for drive
304 * serviced : service command
305 * reserved : unused
306 */
307 typedef union {
308 unsigned all : 8;
309 struct {
310 unsigned set_geometry : 1;
311 unsigned recalibrate : 1;
312 unsigned set_multmode : 1;
313 unsigned set_tune : 1;
314 unsigned serviced : 1;
315 unsigned reserved : 3;
316 } b;
317 } special_t;
318
319 /*
320 * ATA-IDE Select Register, aka Device-Head
321 *
322 * head : always zeros here
323 * unit : drive select number: 0/1
324 * bit5 : always 1
325 * lba : using LBA instead of CHS
326 * bit7 : always 1
327 */
328 typedef union {
329 unsigned all : 8;
330 struct {
331 #if defined(__LITTLE_ENDIAN_BITFIELD)
332 unsigned head : 4;
333 unsigned unit : 1;
334 unsigned bit5 : 1;
335 unsigned lba : 1;
336 unsigned bit7 : 1;
337 #elif defined(__BIG_ENDIAN_BITFIELD)
338 unsigned bit7 : 1;
339 unsigned lba : 1;
340 unsigned bit5 : 1;
341 unsigned unit : 1;
342 unsigned head : 4;
343 #else
344 #error "Please fix <asm/byteorder.h>"
345 #endif
346 } b;
347 } select_t, ata_select_t;
348
349 /*
350 * Status returned from various ide_ functions
351 */
352 typedef enum {
353 ide_stopped, /* no drive operation was started */
354 ide_started, /* a drive operation was started, handler was set */
355 } ide_startstop_t;
356
357 struct ide_driver_s;
358 struct ide_settings_s;
359
360 #ifdef CONFIG_BLK_DEV_IDEACPI
361 struct ide_acpi_drive_link;
362 struct ide_acpi_hwif_link;
363 #endif
364
365 typedef struct ide_drive_s {
366 char name[4]; /* drive name, such as "hda" */
367 char driver_req[10]; /* requests specific driver */
368
369 struct request_queue *queue; /* request queue */
370
371 struct request *rq; /* current request */
372 struct ide_drive_s *next; /* circular list of hwgroup drives */
373 void *driver_data; /* extra driver data */
374 struct hd_driveid *id; /* drive model identification info */
375 #ifdef CONFIG_IDE_PROC_FS
376 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
377 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
378 #endif
379 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
380
381 unsigned long sleep; /* sleep until this time */
382 unsigned long service_start; /* time we started last request */
383 unsigned long service_time; /* service time of last request */
384 unsigned long timeout; /* max time to wait for irq */
385
386 special_t special; /* special action flags */
387 select_t select; /* basic drive/head select reg value */
388
389 u8 keep_settings; /* restore settings after drive reset */
390 u8 using_dma; /* disk is using dma for read/write */
391 u8 retry_pio; /* retrying dma capable host in pio */
392 u8 state; /* retry state */
393 u8 waiting_for_dma; /* dma currently in progress */
394 u8 unmask; /* okay to unmask other irqs */
395 u8 bswap; /* byte swap data */
396 u8 noflush; /* don't attempt flushes */
397 u8 dsc_overlap; /* DSC overlap */
398 u8 nice1; /* give potential excess bandwidth */
399
400 unsigned present : 1; /* drive is physically present */
401 unsigned dead : 1; /* device ejected hint */
402 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
403 unsigned noprobe : 1; /* from: hdx=noprobe */
404 unsigned removable : 1; /* 1 if need to do check_media_change */
405 unsigned attach : 1; /* needed for removable devices */
406 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
407 unsigned no_unmask : 1; /* disallow setting unmask bit */
408 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
409 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
410 unsigned nice0 : 1; /* give obvious excess bandwidth */
411 unsigned nice2 : 1; /* give a share in our own bandwidth */
412 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
413 unsigned nodma : 1; /* disallow DMA */
414 unsigned autotune : 2; /* 0=default, 1=autotune, 2=noautotune */
415 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
416 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
417 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
418 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
419 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
420 unsigned post_reset : 1;
421 unsigned udma33_warned : 1;
422
423 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
424 u8 quirk_list; /* considered quirky, set for a specific host */
425 u8 init_speed; /* transfer rate set at boot */
426 u8 current_speed; /* current transfer rate set */
427 u8 desired_speed; /* desired transfer rate set */
428 u8 dn; /* now wide spread use */
429 u8 wcache; /* status of write cache */
430 u8 acoustic; /* acoustic management */
431 u8 media; /* disk, cdrom, tape, floppy, ... */
432 u8 ctl; /* "normal" value for IDE_CONTROL_REG */
433 u8 ready_stat; /* min status value for drive ready */
434 u8 mult_count; /* current multiple sector setting */
435 u8 mult_req; /* requested multiple sector setting */
436 u8 tune_req; /* requested drive tuning setting */
437 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
438 u8 bad_wstat; /* used for ignoring WRERR_STAT */
439 u8 nowerr; /* used for ignoring WRERR_STAT */
440 u8 sect0; /* offset of first sector for DM6:DDO */
441 u8 head; /* "real" number of heads */
442 u8 sect; /* "real" sectors per track */
443 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
444 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
445
446 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
447 unsigned int cyl; /* "real" number of cyls */
448 unsigned int drive_data; /* used by set_pio_mode/selectproc */
449 unsigned int failures; /* current failure count */
450 unsigned int max_failures; /* maximum allowed failure count */
451 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
452
453 u64 capacity64; /* total number of sectors */
454
455 int lun; /* logical unit */
456 int crc_count; /* crc counter to reduce drive speed */
457 #ifdef CONFIG_BLK_DEV_IDEACPI
458 struct ide_acpi_drive_link *acpidata;
459 #endif
460 struct list_head list;
461 struct device gendev;
462 struct completion gendev_rel_comp; /* to deal with device release() */
463 } ide_drive_t;
464
465 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
466
467 #define IDE_CHIPSET_PCI_MASK \
468 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
469 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
470
471 struct ide_port_info;
472
473 typedef struct hwif_s {
474 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
475 struct hwif_s *mate; /* other hwif from same PCI chip */
476 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
477 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
478
479 char name[6]; /* name of interface, eg. "ide0" */
480
481 /* task file registers for pata and sata */
482 unsigned long io_ports[IDE_NR_PORTS];
483 unsigned long sata_scr[SATA_NR_PORTS];
484 unsigned long sata_misc[SATA_NR_PORTS];
485
486 ide_drive_t drives[MAX_DRIVES]; /* drive info */
487
488 u8 major; /* our major number */
489 u8 index; /* 0 for ide0; 1 for ide1; ... */
490 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
491 u8 straight8; /* Alan's straight 8 check */
492 u8 bus_state; /* power state of the IDE bus */
493
494 u32 host_flags;
495
496 u8 pio_mask;
497
498 u8 ultra_mask;
499 u8 mwdma_mask;
500 u8 swdma_mask;
501
502 u8 cbl; /* cable type */
503
504 hwif_chipset_t chipset; /* sub-module for tuning.. */
505
506 struct pci_dev *pci_dev; /* for pci chipsets */
507 const struct ide_port_info *cds; /* chipset device struct */
508
509 ide_ack_intr_t *ack_intr;
510
511 void (*rw_disk)(ide_drive_t *, struct request *);
512
513 #if 0
514 ide_hwif_ops_t *hwifops;
515 #else
516 /* routine to program host for PIO mode */
517 void (*set_pio_mode)(ide_drive_t *, const u8);
518 /* routine to program host for DMA mode */
519 void (*set_dma_mode)(ide_drive_t *, const u8);
520 /* tweaks hardware to select drive */
521 void (*selectproc)(ide_drive_t *);
522 /* chipset polling based on hba specifics */
523 int (*reset_poll)(ide_drive_t *);
524 /* chipset specific changes to default for device-hba resets */
525 void (*pre_reset)(ide_drive_t *);
526 /* routine to reset controller after a disk reset */
527 void (*resetproc)(ide_drive_t *);
528 /* special host masking for drive selection */
529 void (*maskproc)(ide_drive_t *, int);
530 /* check host's drive quirk list */
531 void (*quirkproc)(ide_drive_t *);
532 /* driver soft-power interface */
533 int (*busproc)(ide_drive_t *, int);
534 #endif
535 u8 (*mdma_filter)(ide_drive_t *);
536 u8 (*udma_filter)(ide_drive_t *);
537
538 void (*ata_input_data)(ide_drive_t *, void *, u32);
539 void (*ata_output_data)(ide_drive_t *, void *, u32);
540
541 void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
542 void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
543
544 void (*dma_host_set)(ide_drive_t *, int);
545 int (*dma_setup)(ide_drive_t *);
546 void (*dma_exec_cmd)(ide_drive_t *, u8);
547 void (*dma_start)(ide_drive_t *);
548 int (*ide_dma_end)(ide_drive_t *drive);
549 int (*ide_dma_test_irq)(ide_drive_t *drive);
550 void (*ide_dma_clear_irq)(ide_drive_t *drive);
551 void (*dma_lost_irq)(ide_drive_t *drive);
552 void (*dma_timeout)(ide_drive_t *drive);
553
554 void (*OUTB)(u8 addr, unsigned long port);
555 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
556 void (*OUTW)(u16 addr, unsigned long port);
557 void (*OUTSW)(unsigned long port, void *addr, u32 count);
558 void (*OUTSL)(unsigned long port, void *addr, u32 count);
559
560 u8 (*INB)(unsigned long port);
561 u16 (*INW)(unsigned long port);
562 void (*INSW)(unsigned long port, void *addr, u32 count);
563 void (*INSL)(unsigned long port, void *addr, u32 count);
564
565 /* dma physical region descriptor table (cpu view) */
566 unsigned int *dmatable_cpu;
567 /* dma physical region descriptor table (dma view) */
568 dma_addr_t dmatable_dma;
569 /* Scatter-gather list used to build the above */
570 struct scatterlist *sg_table;
571 int sg_max_nents; /* Maximum number of entries in it */
572 int sg_nents; /* Current number of entries in it */
573 int sg_dma_direction; /* dma transfer direction */
574
575 /* data phase of the active command (currently only valid for PIO/DMA) */
576 int data_phase;
577
578 unsigned int nsect;
579 unsigned int nleft;
580 struct scatterlist *cursg;
581 unsigned int cursg_ofs;
582
583 int rqsize; /* max sectors per request */
584 int irq; /* our irq number */
585
586 unsigned long dma_base; /* base addr for dma ports */
587 unsigned long dma_command; /* dma command register */
588 unsigned long dma_vendor1; /* dma vendor 1 register */
589 unsigned long dma_status; /* dma status register */
590 unsigned long dma_vendor3; /* dma vendor 3 register */
591 unsigned long dma_prdtable; /* actual prd table address */
592
593 unsigned long config_data; /* for use by chipset-specific code */
594 unsigned long select_data; /* for use by chipset-specific code */
595
596 unsigned long extra_base; /* extra addr for dma ports */
597 unsigned extra_ports; /* number of extra dma ports */
598
599 unsigned noprobe : 1; /* don't probe for this interface */
600 unsigned present : 1; /* this interface exists */
601 unsigned hold : 1; /* this interface is always present */
602 unsigned serialized : 1; /* serialized all channel operation */
603 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
604 unsigned reset : 1; /* reset after probe */
605 unsigned auto_poll : 1; /* supports nop auto-poll */
606 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
607 unsigned no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
608 unsigned mmio : 1; /* host uses MMIO */
609
610 struct device gendev;
611 struct completion gendev_rel_comp; /* To deal with device release() */
612
613 void *hwif_data; /* extra hwif data */
614
615 unsigned dma;
616
617 #ifdef CONFIG_BLK_DEV_IDEACPI
618 struct ide_acpi_hwif_link *acpidata;
619 #endif
620 } ____cacheline_internodealigned_in_smp ide_hwif_t;
621
622 /*
623 * internal ide interrupt handler type
624 */
625 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
626 typedef int (ide_expiry_t)(ide_drive_t *);
627
628 typedef struct hwgroup_s {
629 /* irq handler, if active */
630 ide_startstop_t (*handler)(ide_drive_t *);
631 /* irq handler, suspended if active */
632 ide_startstop_t (*handler_save)(ide_drive_t *);
633 /* BOOL: protects all fields below */
634 volatile int busy;
635 /* BOOL: wake us up on timer expiry */
636 unsigned int sleeping : 1;
637 /* BOOL: polling active & poll_timeout field valid */
638 unsigned int polling : 1;
639 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
640 unsigned int resetting : 1;
641
642 /* current drive */
643 ide_drive_t *drive;
644 /* ptr to current hwif in linked-list */
645 ide_hwif_t *hwif;
646
647 /* for pci chipsets */
648 struct pci_dev *pci_dev;
649
650 /* current request */
651 struct request *rq;
652 /* failsafe timer */
653 struct timer_list timer;
654 /* local copy of current write rq */
655 struct request wrq;
656 /* timeout value during long polls */
657 unsigned long poll_timeout;
658 /* queried upon timeouts */
659 int (*expiry)(ide_drive_t *);
660 /* ide_system_bus_speed */
661 int pio_clock;
662 int req_gen;
663 int req_gen_timer;
664
665 unsigned char cmd_buf[4];
666 } ide_hwgroup_t;
667
668 typedef struct ide_driver_s ide_driver_t;
669
670 extern struct mutex ide_setting_mtx;
671
672 int set_io_32bit(ide_drive_t *, int);
673 int set_pio_mode(ide_drive_t *, int);
674 int set_using_dma(ide_drive_t *, int);
675
676 #ifdef CONFIG_IDE_PROC_FS
677 /*
678 * configurable drive settings
679 */
680
681 #define TYPE_INT 0
682 #define TYPE_BYTE 1
683 #define TYPE_SHORT 2
684
685 #define SETTING_READ (1 << 0)
686 #define SETTING_WRITE (1 << 1)
687 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
688
689 typedef int (ide_procset_t)(ide_drive_t *, int);
690 typedef struct ide_settings_s {
691 char *name;
692 int rw;
693 int data_type;
694 int min;
695 int max;
696 int mul_factor;
697 int div_factor;
698 void *data;
699 ide_procset_t *set;
700 int auto_remove;
701 struct ide_settings_s *next;
702 } ide_settings_t;
703
704 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
705
706 /*
707 * /proc/ide interface
708 */
709 typedef struct {
710 const char *name;
711 mode_t mode;
712 read_proc_t *read_proc;
713 write_proc_t *write_proc;
714 } ide_proc_entry_t;
715
716 void proc_ide_create(void);
717 void proc_ide_destroy(void);
718 void ide_proc_register_port(ide_hwif_t *);
719 void ide_proc_unregister_port(ide_hwif_t *);
720 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
721 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
722
723 void ide_add_generic_settings(ide_drive_t *);
724
725 read_proc_t proc_ide_read_capacity;
726 read_proc_t proc_ide_read_geometry;
727
728 #ifdef CONFIG_BLK_DEV_IDEPCI
729 void ide_pci_create_host_proc(const char *, get_info_t *);
730 #endif
731
732 /*
733 * Standard exit stuff:
734 */
735 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
736 { \
737 len -= off; \
738 if (len < count) { \
739 *eof = 1; \
740 if (len <= 0) \
741 return 0; \
742 } else \
743 len = count; \
744 *start = page + off; \
745 return len; \
746 }
747 #else
748 static inline void proc_ide_create(void) { ; }
749 static inline void proc_ide_destroy(void) { ; }
750 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
751 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
752 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
753 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
754 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
755 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
756 #endif
757
758 /*
759 * Power Management step value (rq->pm->pm_step).
760 *
761 * The step value starts at 0 (ide_pm_state_start_suspend) for a
762 * suspend operation or 1000 (ide_pm_state_start_resume) for a
763 * resume operation.
764 *
765 * For each step, the core calls the subdriver start_power_step() first.
766 * This can return:
767 * - ide_stopped : In this case, the core calls us back again unless
768 * step have been set to ide_power_state_completed.
769 * - ide_started : In this case, the channel is left busy until an
770 * async event (interrupt) occurs.
771 * Typically, start_power_step() will issue a taskfile request with
772 * do_rw_taskfile().
773 *
774 * Upon reception of the interrupt, the core will call complete_power_step()
775 * with the error code if any. This routine should update the step value
776 * and return. It should not start a new request. The core will call
777 * start_power_step for the new step value, unless step have been set to
778 * ide_power_state_completed.
779 *
780 * Subdrivers are expected to define their own additional power
781 * steps from 1..999 for suspend and from 1001..1999 for resume,
782 * other values are reserved for future use.
783 */
784
785 enum {
786 ide_pm_state_completed = -1,
787 ide_pm_state_start_suspend = 0,
788 ide_pm_state_start_resume = 1000,
789 };
790
791 /*
792 * Subdrivers support.
793 *
794 * The gendriver.owner field should be set to the module owner of this driver.
795 * The gendriver.name field should be set to the name of this driver
796 */
797 struct ide_driver_s {
798 const char *version;
799 u8 media;
800 unsigned supports_dsc_overlap : 1;
801 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
802 int (*end_request)(ide_drive_t *, int, int);
803 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
804 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
805 struct device_driver gen_driver;
806 int (*probe)(ide_drive_t *);
807 void (*remove)(ide_drive_t *);
808 void (*resume)(ide_drive_t *);
809 void (*shutdown)(ide_drive_t *);
810 #ifdef CONFIG_IDE_PROC_FS
811 ide_proc_entry_t *proc;
812 #endif
813 };
814
815 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
816
817 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
818
819 /*
820 * ide_hwifs[] is the master data structure used to keep track
821 * of just about everything in ide.c. Whenever possible, routines
822 * should be using pointers to a drive (ide_drive_t *) or
823 * pointers to a hwif (ide_hwif_t *), rather than indexing this
824 * structure directly (the allocation/layout may change!).
825 *
826 */
827 #ifndef _IDE_C
828 extern ide_hwif_t ide_hwifs[]; /* master data repository */
829 #endif
830 extern int noautodma;
831
832 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
833 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
834 int uptodate, int nr_sectors);
835
836 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
837
838 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
839 ide_expiry_t *);
840
841 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
842
843 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
844
845 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
846
847 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
848
849 extern void ide_fix_driveid(struct hd_driveid *);
850
851 extern void ide_fixstring(u8 *, const int, const int);
852
853 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
854
855 extern ide_startstop_t ide_do_reset (ide_drive_t *);
856
857 extern void ide_init_drive_cmd (struct request *rq);
858
859 /*
860 * "action" parameter type for ide_do_drive_cmd() below.
861 */
862 typedef enum {
863 ide_wait, /* insert rq at end of list, and wait for it */
864 ide_preempt, /* insert rq in front of current request */
865 ide_head_wait, /* insert rq in front of current request and wait for it */
866 ide_end /* insert rq at end of list, but don't wait for it */
867 } ide_action_t;
868
869 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
870
871 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
872
873 /*
874 * Issue ATA command and wait for completion.
875 * Use for implementing commands in kernel
876 *
877 * (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
878 */
879 extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *);
880
881 enum {
882 IDE_TFLAG_LBA48 = (1 << 0),
883 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
884 IDE_TFLAG_FLAGGED = (1 << 2),
885 IDE_TFLAG_OUT_DATA = (1 << 3),
886 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
887 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
888 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
889 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
890 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
891 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
892 IDE_TFLAG_OUT_HOB_NSECT |
893 IDE_TFLAG_OUT_HOB_LBAL |
894 IDE_TFLAG_OUT_HOB_LBAM |
895 IDE_TFLAG_OUT_HOB_LBAH,
896 IDE_TFLAG_OUT_FEATURE = (1 << 9),
897 IDE_TFLAG_OUT_NSECT = (1 << 10),
898 IDE_TFLAG_OUT_LBAL = (1 << 11),
899 IDE_TFLAG_OUT_LBAM = (1 << 12),
900 IDE_TFLAG_OUT_LBAH = (1 << 13),
901 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
902 IDE_TFLAG_OUT_NSECT |
903 IDE_TFLAG_OUT_LBAL |
904 IDE_TFLAG_OUT_LBAM |
905 IDE_TFLAG_OUT_LBAH,
906 IDE_TFLAG_OUT_DEVICE = (1 << 14),
907 IDE_TFLAG_WRITE = (1 << 15),
908 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
909 IDE_TFLAG_IN_DATA = (1 << 17),
910 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
911 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
912 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
913 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
914 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
915 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
916 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
917 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
918 IDE_TFLAG_IN_HOB_LBAM |
919 IDE_TFLAG_IN_HOB_LBAH,
920 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
921 IDE_TFLAG_IN_HOB_NSECT |
922 IDE_TFLAG_IN_HOB_LBA,
923 IDE_TFLAG_IN_NSECT = (1 << 25),
924 IDE_TFLAG_IN_LBAL = (1 << 26),
925 IDE_TFLAG_IN_LBAM = (1 << 27),
926 IDE_TFLAG_IN_LBAH = (1 << 28),
927 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
928 IDE_TFLAG_IN_LBAM |
929 IDE_TFLAG_IN_LBAH,
930 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
931 IDE_TFLAG_IN_LBA,
932 IDE_TFLAG_IN_DEVICE = (1 << 29),
933 };
934
935 struct ide_taskfile {
936 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
937
938 u8 hob_feature; /* 1-5: additional data to support LBA48 */
939 u8 hob_nsect;
940 u8 hob_lbal;
941 u8 hob_lbam;
942 u8 hob_lbah;
943
944 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
945
946 union { /*  7: */
947 u8 error; /* read: error */
948 u8 feature; /* write: feature */
949 };
950
951 u8 nsect; /* 8: number of sectors */
952 u8 lbal; /* 9: LBA low */
953 u8 lbam; /* 10: LBA mid */
954 u8 lbah; /* 11: LBA high */
955
956 u8 device; /* 12: device select */
957
958 union { /* 13: */
959 u8 status; /*  read: status  */
960 u8 command; /* write: command */
961 };
962 };
963
964 typedef struct ide_task_s {
965 union {
966 struct ide_taskfile tf;
967 u8 tf_array[14];
968 };
969 u32 tf_flags;
970 int data_phase;
971 struct request *rq; /* copy of request */
972 void *special; /* valid_t generally */
973 } ide_task_t;
974
975 void ide_tf_load(ide_drive_t *, ide_task_t *);
976 void ide_tf_read(ide_drive_t *, ide_task_t *);
977
978 extern void SELECT_DRIVE(ide_drive_t *);
979 extern void SELECT_MASK(ide_drive_t *, int);
980
981 extern int drive_is_ready(ide_drive_t *);
982
983 void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
984
985 ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
986
987 int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
988 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
989
990 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
991 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
992 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
993
994 extern int system_bus_clock(void);
995
996 extern int ide_driveid_update(ide_drive_t *);
997 extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
998 extern int ide_config_drive_speed(ide_drive_t *, u8);
999 extern u8 eighty_ninty_three (ide_drive_t *);
1000 extern int set_transfer(ide_drive_t *, ide_task_t *);
1001 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1002
1003 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1004
1005 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1006
1007 extern int ide_spin_wait_hwgroup(ide_drive_t *);
1008 extern void ide_timer_expiry(unsigned long);
1009 extern irqreturn_t ide_intr(int irq, void *dev_id);
1010 extern void do_ide_request(struct request_queue *);
1011
1012 void ide_init_disk(struct gendisk *, ide_drive_t *);
1013
1014 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1015 extern void ide_scan_pcibus(int scan_direction) __init;
1016 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1017 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1018 #else
1019 #define ide_pci_register_driver(d) pci_register_driver(d)
1020 #endif
1021
1022 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1023 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1024
1025 extern void default_hwif_iops(ide_hwif_t *);
1026 extern void default_hwif_mmiops(ide_hwif_t *);
1027 extern void default_hwif_transport(ide_hwif_t *);
1028
1029 typedef struct ide_pci_enablebit_s {
1030 u8 reg; /* byte pci reg holding the enable-bit */
1031 u8 mask; /* mask to isolate the enable-bit */
1032 u8 val; /* value of masked reg when "enabled" */
1033 } ide_pci_enablebit_t;
1034
1035 enum {
1036 /* Uses ISA control ports not PCI ones. */
1037 IDE_HFLAG_ISA_PORTS = (1 << 0),
1038 /* single port device */
1039 IDE_HFLAG_SINGLE = (1 << 1),
1040 /* don't use legacy PIO blacklist */
1041 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1042 /* don't use conservative PIO "downgrade" */
1043 IDE_HFLAG_PIO_NO_DOWNGRADE = (1 << 3),
1044 /* use PIO8/9 for prefetch off/on */
1045 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1046 /* use PIO6/7 for fast-devsel off/on */
1047 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1048 /* use 100-102 and 200-202 PIO values to set DMA modes */
1049 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1050 /*
1051 * keep DMA setting when programming PIO mode, may be used only
1052 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1053 */
1054 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1055 /* program host for the transfer mode after programming device */
1056 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1057 /* don't program host/device for the transfer mode ("smart" hosts) */
1058 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1059 /* trust BIOS for programming chipset/device for DMA */
1060 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1061 /* host uses VDMA */
1062 IDE_HFLAG_VDMA = (1 << 11),
1063 /* ATAPI DMA is unsupported */
1064 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1065 /* set if host is a "bootable" controller */
1066 IDE_HFLAG_BOOTABLE = (1 << 13),
1067 /* host doesn't support DMA */
1068 IDE_HFLAG_NO_DMA = (1 << 14),
1069 /* check if host is PCI IDE device before allowing DMA */
1070 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1071 /* host is CS5510/CS5520 */
1072 IDE_HFLAG_CS5520 = (1 << 16),
1073 /* no LBA48 */
1074 IDE_HFLAG_NO_LBA48 = (1 << 17),
1075 /* no LBA48 DMA */
1076 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1077 /* data FIFO is cleared by an error */
1078 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1079 /* serialize ports */
1080 IDE_HFLAG_SERIALIZE = (1 << 20),
1081 /* use legacy IRQs */
1082 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1083 /* force use of legacy IRQs */
1084 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1085 /* limit LBA48 requests to 256 sectors */
1086 IDE_HFLAG_RQSIZE_256 = (1 << 23),
1087 /* use 32-bit I/O ops */
1088 IDE_HFLAG_IO_32BIT = (1 << 24),
1089 /* unmask IRQs */
1090 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1091 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1092 /* host is CY82C693 */
1093 IDE_HFLAG_CY82C693 = (1 << 27),
1094 };
1095
1096 #ifdef CONFIG_BLK_DEV_OFFBOARD
1097 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_BOOTABLE
1098 #else
1099 # define IDE_HFLAG_OFF_BOARD 0
1100 #endif
1101
1102 struct ide_port_info {
1103 char *name;
1104 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1105 void (*init_iops)(ide_hwif_t *);
1106 void (*init_hwif)(ide_hwif_t *);
1107 void (*init_dma)(ide_hwif_t *, unsigned long);
1108 ide_pci_enablebit_t enablebits[2];
1109 hwif_chipset_t chipset;
1110 u8 extra;
1111 u32 host_flags;
1112 u8 pio_mask;
1113 u8 swdma_mask;
1114 u8 mwdma_mask;
1115 u8 udma_mask;
1116 };
1117
1118 int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1119 int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1120
1121 void ide_map_sg(ide_drive_t *, struct request *);
1122 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1123
1124 #define BAD_DMA_DRIVE 0
1125 #define GOOD_DMA_DRIVE 1
1126
1127 struct drive_list_entry {
1128 const char *id_model;
1129 const char *id_firmware;
1130 };
1131
1132 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1133
1134 #ifdef CONFIG_BLK_DEV_IDEDMA
1135 int __ide_dma_bad_drive(ide_drive_t *);
1136 int ide_id_dma_bug(ide_drive_t *);
1137
1138 u8 ide_find_dma_mode(ide_drive_t *, u8);
1139
1140 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1141 {
1142 return ide_find_dma_mode(drive, XFER_UDMA_6);
1143 }
1144
1145 void ide_dma_off_quietly(ide_drive_t *);
1146 void ide_dma_off(ide_drive_t *);
1147 void ide_dma_on(ide_drive_t *);
1148 int ide_set_dma(ide_drive_t *);
1149 ide_startstop_t ide_dma_intr(ide_drive_t *);
1150
1151 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1152 extern int ide_build_sglist(ide_drive_t *, struct request *);
1153 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1154 extern void ide_destroy_dmatable(ide_drive_t *);
1155 extern int ide_release_dma(ide_hwif_t *);
1156 extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
1157
1158 void ide_dma_host_set(ide_drive_t *, int);
1159 extern int ide_dma_setup(ide_drive_t *);
1160 extern void ide_dma_start(ide_drive_t *);
1161 extern int __ide_dma_end(ide_drive_t *);
1162 extern void ide_dma_lost_irq(ide_drive_t *);
1163 extern void ide_dma_timeout(ide_drive_t *);
1164 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1165
1166 #else
1167 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1168 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1169 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1170 static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1171 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1172 static inline void ide_dma_on(ide_drive_t *drive) { ; }
1173 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1174 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1175 #endif /* CONFIG_BLK_DEV_IDEDMA */
1176
1177 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1178 static inline void ide_release_dma(ide_hwif_t *drive) {;}
1179 #endif
1180
1181 #ifdef CONFIG_BLK_DEV_IDEACPI
1182 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1183 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1184 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1185 extern void ide_acpi_init(ide_hwif_t *hwif);
1186 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1187 #else
1188 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1189 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1190 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1191 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1192 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1193 #endif
1194
1195 extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1196 extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1197 extern void ide_unregister (unsigned int index);
1198
1199 void ide_register_region(struct gendisk *);
1200 void ide_unregister_region(struct gendisk *);
1201
1202 void ide_undecoded_slave(ide_drive_t *);
1203
1204 int ide_device_add_all(u8 idx[MAX_HWIFS]);
1205 int ide_device_add(u8 idx[4]);
1206
1207 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1208 {
1209 return hwif->hwif_data;
1210 }
1211
1212 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1213 {
1214 hwif->hwif_data = data;
1215 }
1216
1217 const char *ide_xfer_verbose(u8 mode);
1218 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1219 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1220
1221 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1222 {
1223 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1224 }
1225
1226 static inline int ide_dev_is_sata(struct hd_driveid *id)
1227 {
1228 /*
1229 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1230 * verifying that word 80 by casting it to a signed type --
1231 * this trick allows us to filter out the reserved values of
1232 * 0x0000 and 0xffff along with the earlier ATA revisions...
1233 */
1234 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1235 return 1;
1236 return 0;
1237 }
1238
1239 u64 ide_get_lba_addr(struct ide_taskfile *, int);
1240 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1241
1242 typedef struct ide_pio_timings_s {
1243 int setup_time; /* Address setup (ns) minimum */
1244 int active_time; /* Active pulse (ns) minimum */
1245 int cycle_time; /* Cycle time (ns) minimum = */
1246 /* active + recovery (+ setup for some chips) */
1247 } ide_pio_timings_t;
1248
1249 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1250 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1251 extern const ide_pio_timings_t ide_pio_timings[6];
1252
1253 int ide_set_pio_mode(ide_drive_t *, u8);
1254 int ide_set_dma_mode(ide_drive_t *, u8);
1255
1256 void ide_set_pio(ide_drive_t *, u8);
1257
1258 static inline void ide_set_max_pio(ide_drive_t *drive)
1259 {
1260 ide_set_pio(drive, 255);
1261 }
1262
1263 extern spinlock_t ide_lock;
1264 extern struct mutex ide_cfg_mtx;
1265 /*
1266 * Structure locking:
1267 *
1268 * ide_cfg_mtx and ide_lock together protect changes to
1269 * ide_hwif_t->{next,hwgroup}
1270 * ide_drive_t->next
1271 *
1272 * ide_hwgroup_t->busy: ide_lock
1273 * ide_hwgroup_t->hwif: ide_lock
1274 * ide_hwif_t->mate: constant, no locking
1275 * ide_drive_t->hwif: constant, no locking
1276 */
1277
1278 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1279
1280 extern struct bus_type ide_bus_type;
1281
1282 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1283 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1284
1285 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1286 #define ide_id_has_flush_cache_ext(id) \
1287 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1288
1289 static inline int hwif_to_node(ide_hwif_t *hwif)
1290 {
1291 struct pci_dev *dev = hwif->pci_dev;
1292 return dev ? pcibus_to_node(dev->bus) : -1;
1293 }
1294
1295 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1296 {
1297 ide_hwif_t *hwif = HWIF(drive);
1298
1299 return &hwif->drives[(drive->dn ^ 1) & 1];
1300 }
1301
1302 #endif /* _IDE_H */
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