2 * linux/drivers/usb/gadget/pxa2xx_udc.c
3 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
5 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
6 * Copyright (C) 2003 Robert Schwebel, Pengutronix
7 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
8 * Copyright (C) 2003 David Brownell
9 * Copyright (C) 2003 Joshua Wise
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 /* #define VERBOSE_DEBUG */
29 #include <linux/device.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/ioport.h>
33 #include <linux/types.h>
34 #include <linux/errno.h>
35 #include <linux/delay.h>
36 #include <linux/slab.h>
37 #include <linux/init.h>
38 #include <linux/timer.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
42 #include <linux/platform_device.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/irq.h>
45 #include <linux/clk.h>
46 #include <linux/err.h>
47 #include <linux/seq_file.h>
48 #include <linux/debugfs.h>
50 #include <asm/byteorder.h>
54 #include <asm/system.h>
55 #include <asm/mach-types.h>
56 #include <asm/unaligned.h>
57 #include <asm/hardware.h>
59 #include <linux/usb/ch9.h>
60 #include <linux/usb/gadget.h>
62 #include <asm/mach/udc_pxa2xx.h>
66 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
67 * series processors. The UDC for the IXP 4xx series is very similar.
68 * There are fifteen endpoints, in addition to ep0.
70 * Such controller drivers work with a gadget driver. The gadget driver
71 * returns descriptors, implements configuration and data protocols used
72 * by the host to interact with this device, and allocates endpoints to
73 * the different protocol interfaces. The controller driver virtualizes
74 * usb hardware so that the gadget drivers will be more portable.
76 * This UDC hardware wants to implement a bit too much USB protocol, so
77 * it constrains the sorts of USB configuration change events that work.
78 * The errata for these chips are misleading; some "fixed" bugs from
79 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
81 * Note that the UDC hardware supports DMA (except on IXP) but that's
82 * not used here. IN-DMA (to host) is simple enough, when the data is
83 * suitably aligned (16 bytes) ... the network stack doesn't do that,
84 * other software can. OUT-DMA is buggy in most chip versions, as well
85 * as poorly designed (data toggle not automatic). So this driver won't
86 * bother using DMA. (Mostly-working IN-DMA support was available in
87 * kernels before 2.6.23, but was never enabled or well tested.)
90 #define DRIVER_VERSION "30-June-2007"
91 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
94 static const char driver_name
[] = "pxa2xx_udc";
96 static const char ep0name
[] = "ep0";
99 #ifdef CONFIG_ARCH_IXP4XX
101 /* cpu-specific register addresses are compiled in to this code */
102 #ifdef CONFIG_ARCH_PXA
103 #error "Can't configure both IXP and PXA"
108 #include "pxa2xx_udc.h"
111 #ifdef CONFIG_USB_PXA2XX_SMALL
112 #define SIZE_STR " (small)"
117 /* ---------------------------------------------------------------------------
118 * endpoint related parts of the api to the usb controller hardware,
119 * used by gadget driver; and the inner talker-to-hardware core.
120 * ---------------------------------------------------------------------------
123 static void pxa2xx_ep_fifo_flush (struct usb_ep
*ep
);
124 static void nuke (struct pxa2xx_ep
*, int status
);
126 /* one GPIO should be used to detect VBUS from the host */
127 static int is_vbus_present(void)
129 struct pxa2xx_udc_mach_info
*mach
= the_controller
->mach
;
131 if (mach
->gpio_vbus
) {
132 int value
= gpio_get_value(mach
->gpio_vbus
);
133 return mach
->gpio_vbus_inverted
? !value
: value
;
135 if (mach
->udc_is_connected
)
136 return mach
->udc_is_connected();
140 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
141 static void pullup_off(void)
143 struct pxa2xx_udc_mach_info
*mach
= the_controller
->mach
;
145 if (mach
->gpio_pullup
)
146 gpio_set_value(mach
->gpio_pullup
, 0);
147 else if (mach
->udc_command
)
148 mach
->udc_command(PXA2XX_UDC_CMD_DISCONNECT
);
151 static void pullup_on(void)
153 struct pxa2xx_udc_mach_info
*mach
= the_controller
->mach
;
155 if (mach
->gpio_pullup
)
156 gpio_set_value(mach
->gpio_pullup
, 1);
157 else if (mach
->udc_command
)
158 mach
->udc_command(PXA2XX_UDC_CMD_CONNECT
);
161 static void pio_irq_enable(int bEndpointAddress
)
163 bEndpointAddress
&= 0xf;
164 if (bEndpointAddress
< 8)
165 UICR0
&= ~(1 << bEndpointAddress
);
167 bEndpointAddress
-= 8;
168 UICR1
&= ~(1 << bEndpointAddress
);
172 static void pio_irq_disable(int bEndpointAddress
)
174 bEndpointAddress
&= 0xf;
175 if (bEndpointAddress
< 8)
176 UICR0
|= 1 << bEndpointAddress
;
178 bEndpointAddress
-= 8;
179 UICR1
|= 1 << bEndpointAddress
;
183 /* The UDCCR reg contains mask and interrupt status bits,
184 * so using '|=' isn't safe as it may ack an interrupt.
186 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
188 static inline void udc_set_mask_UDCCR(int mask
)
190 UDCCR
= (UDCCR
& UDCCR_MASK_BITS
) | (mask
& UDCCR_MASK_BITS
);
193 static inline void udc_clear_mask_UDCCR(int mask
)
195 UDCCR
= (UDCCR
& UDCCR_MASK_BITS
) & ~(mask
& UDCCR_MASK_BITS
);
198 static inline void udc_ack_int_UDCCR(int mask
)
200 /* udccr contains the bits we dont want to change */
201 __u32 udccr
= UDCCR
& UDCCR_MASK_BITS
;
203 UDCCR
= udccr
| (mask
& ~UDCCR_MASK_BITS
);
207 * endpoint enable/disable
209 * we need to verify the descriptors used to enable endpoints. since pxa2xx
210 * endpoint configurations are fixed, and are pretty much always enabled,
211 * there's not a lot to manage here.
213 * because pxa2xx can't selectively initialize bulk (or interrupt) endpoints,
214 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
215 * for a single interface (with only the default altsetting) and for gadget
216 * drivers that don't halt endpoints (not reset by set_interface). that also
217 * means that if you use ISO, you must violate the USB spec rule that all
218 * iso endpoints must be in non-default altsettings.
220 static int pxa2xx_ep_enable (struct usb_ep
*_ep
,
221 const struct usb_endpoint_descriptor
*desc
)
223 struct pxa2xx_ep
*ep
;
224 struct pxa2xx_udc
*dev
;
226 ep
= container_of (_ep
, struct pxa2xx_ep
, ep
);
227 if (!_ep
|| !desc
|| ep
->desc
|| _ep
->name
== ep0name
228 || desc
->bDescriptorType
!= USB_DT_ENDPOINT
229 || ep
->bEndpointAddress
!= desc
->bEndpointAddress
230 || ep
->fifo_size
< le16_to_cpu
231 (desc
->wMaxPacketSize
)) {
232 DMSG("%s, bad ep or descriptor\n", __FUNCTION__
);
236 /* xfer types must match, except that interrupt ~= bulk */
237 if (ep
->bmAttributes
!= desc
->bmAttributes
238 && ep
->bmAttributes
!= USB_ENDPOINT_XFER_BULK
239 && desc
->bmAttributes
!= USB_ENDPOINT_XFER_INT
) {
240 DMSG("%s, %s type mismatch\n", __FUNCTION__
, _ep
->name
);
244 /* hardware _could_ do smaller, but driver doesn't */
245 if ((desc
->bmAttributes
== USB_ENDPOINT_XFER_BULK
246 && le16_to_cpu (desc
->wMaxPacketSize
)
248 || !desc
->wMaxPacketSize
) {
249 DMSG("%s, bad %s maxpacket\n", __FUNCTION__
, _ep
->name
);
254 if (!dev
->driver
|| dev
->gadget
.speed
== USB_SPEED_UNKNOWN
) {
255 DMSG("%s, bogus device state\n", __FUNCTION__
);
262 ep
->ep
.maxpacket
= le16_to_cpu (desc
->wMaxPacketSize
);
264 /* flush fifo (mostly for OUT buffers) */
265 pxa2xx_ep_fifo_flush (_ep
);
267 /* ... reset halt state too, if we could ... */
269 DBG(DBG_VERBOSE
, "enabled %s\n", _ep
->name
);
273 static int pxa2xx_ep_disable (struct usb_ep
*_ep
)
275 struct pxa2xx_ep
*ep
;
278 ep
= container_of (_ep
, struct pxa2xx_ep
, ep
);
279 if (!_ep
|| !ep
->desc
) {
280 DMSG("%s, %s not enabled\n", __FUNCTION__
,
281 _ep
? ep
->ep
.name
: NULL
);
284 local_irq_save(flags
);
286 nuke (ep
, -ESHUTDOWN
);
288 /* flush fifo (mostly for IN buffers) */
289 pxa2xx_ep_fifo_flush (_ep
);
294 local_irq_restore(flags
);
295 DBG(DBG_VERBOSE
, "%s disabled\n", _ep
->name
);
299 /*-------------------------------------------------------------------------*/
301 /* for the pxa2xx, these can just wrap kmalloc/kfree. gadget drivers
302 * must still pass correctly initialized endpoints, since other controller
303 * drivers may care about how it's currently set up (dma issues etc).
307 * pxa2xx_ep_alloc_request - allocate a request data structure
309 static struct usb_request
*
310 pxa2xx_ep_alloc_request (struct usb_ep
*_ep
, gfp_t gfp_flags
)
312 struct pxa2xx_request
*req
;
314 req
= kzalloc(sizeof(*req
), gfp_flags
);
318 INIT_LIST_HEAD (&req
->queue
);
324 * pxa2xx_ep_free_request - deallocate a request data structure
327 pxa2xx_ep_free_request (struct usb_ep
*_ep
, struct usb_request
*_req
)
329 struct pxa2xx_request
*req
;
331 req
= container_of (_req
, struct pxa2xx_request
, req
);
332 WARN_ON (!list_empty (&req
->queue
));
336 /*-------------------------------------------------------------------------*/
339 * done - retire a request; caller blocked irqs
341 static void done(struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
, int status
)
343 unsigned stopped
= ep
->stopped
;
345 list_del_init(&req
->queue
);
347 if (likely (req
->req
.status
== -EINPROGRESS
))
348 req
->req
.status
= status
;
350 status
= req
->req
.status
;
352 if (status
&& status
!= -ESHUTDOWN
)
353 DBG(DBG_VERBOSE
, "complete %s req %p stat %d len %u/%u\n",
354 ep
->ep
.name
, &req
->req
, status
,
355 req
->req
.actual
, req
->req
.length
);
357 /* don't modify queue heads during completion callback */
359 req
->req
.complete(&ep
->ep
, &req
->req
);
360 ep
->stopped
= stopped
;
364 static inline void ep0_idle (struct pxa2xx_udc
*dev
)
366 dev
->ep0state
= EP0_IDLE
;
370 write_packet(volatile u32
*uddr
, struct pxa2xx_request
*req
, unsigned max
)
373 unsigned length
, count
;
375 buf
= req
->req
.buf
+ req
->req
.actual
;
378 /* how big will this packet be? */
379 length
= min(req
->req
.length
- req
->req
.actual
, max
);
380 req
->req
.actual
+= length
;
383 while (likely(count
--))
390 * write to an IN endpoint fifo, as many packets as possible.
391 * irqs will use this to write the rest later.
392 * caller guarantees at least one packet buffer is ready (or a zlp).
395 write_fifo (struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
)
399 max
= le16_to_cpu(ep
->desc
->wMaxPacketSize
);
402 int is_last
, is_short
;
404 count
= write_packet(ep
->reg_uddr
, req
, max
);
406 /* last packet is usually short (or a zlp) */
407 if (unlikely (count
!= max
))
408 is_last
= is_short
= 1;
410 if (likely(req
->req
.length
!= req
->req
.actual
)
415 /* interrupt/iso maxpacket may not fill the fifo */
416 is_short
= unlikely (max
< ep
->fifo_size
);
419 DBG(DBG_VERY_NOISY
, "wrote %s %d bytes%s%s %d left %p\n",
421 is_last
? "/L" : "", is_short
? "/S" : "",
422 req
->req
.length
- req
->req
.actual
, req
);
424 /* let loose that packet. maybe try writing another one,
425 * double buffering might work. TSP, TPC, and TFS
426 * bit values are the same for all normal IN endpoints.
428 *ep
->reg_udccs
= UDCCS_BI_TPC
;
430 *ep
->reg_udccs
= UDCCS_BI_TSP
;
432 /* requests complete when all IN data is in the FIFO */
435 if (list_empty(&ep
->queue
))
436 pio_irq_disable (ep
->bEndpointAddress
);
440 // TODO experiment: how robust can fifo mode tweaking be?
441 // double buffering is off in the default fifo mode, which
442 // prevents TFS from being set here.
444 } while (*ep
->reg_udccs
& UDCCS_BI_TFS
);
448 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
449 * ep0 data stage. these chips want very simple state transitions.
452 void ep0start(struct pxa2xx_udc
*dev
, u32 flags
, const char *tag
)
454 UDCCS0
= flags
|UDCCS0_SA
|UDCCS0_OPR
;
456 dev
->req_pending
= 0;
457 DBG(DBG_VERY_NOISY
, "%s %s, %02x/%02x\n",
458 __FUNCTION__
, tag
, UDCCS0
, flags
);
462 write_ep0_fifo (struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
)
467 count
= write_packet(&UDDR0
, req
, EP0_FIFO_SIZE
);
468 ep
->dev
->stats
.write
.bytes
+= count
;
470 /* last packet "must be" short (or a zlp) */
471 is_short
= (count
!= EP0_FIFO_SIZE
);
473 DBG(DBG_VERY_NOISY
, "ep0in %d bytes %d left %p\n", count
,
474 req
->req
.length
- req
->req
.actual
, req
);
476 if (unlikely (is_short
)) {
477 if (ep
->dev
->req_pending
)
478 ep0start(ep
->dev
, UDCCS0_IPR
, "short IN");
482 count
= req
->req
.length
;
485 #ifndef CONFIG_ARCH_IXP4XX
487 /* This seems to get rid of lost status irqs in some cases:
488 * host responds quickly, or next request involves config
489 * change automagic, or should have been hidden, or ...
491 * FIXME get rid of all udelays possible...
493 if (count
>= EP0_FIFO_SIZE
) {
496 if ((UDCCS0
& UDCCS0_OPR
) != 0) {
497 /* clear OPR, generate ack */
507 } else if (ep
->dev
->req_pending
)
508 ep0start(ep
->dev
, 0, "IN");
514 * read_fifo - unload packet(s) from the fifo we use for usb OUT
515 * transfers and put them into the request. caller should have made
516 * sure there's at least one packet ready.
518 * returns true if the request completed because of short packet or the
519 * request buffer having filled (and maybe overran till end-of-packet).
522 read_fifo (struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
)
527 unsigned bufferspace
, count
, is_short
;
529 /* make sure there's a packet in the FIFO.
530 * UDCCS_{BO,IO}_RPC are all the same bit value.
531 * UDCCS_{BO,IO}_RNE are all the same bit value.
533 udccs
= *ep
->reg_udccs
;
534 if (unlikely ((udccs
& UDCCS_BO_RPC
) == 0))
536 buf
= req
->req
.buf
+ req
->req
.actual
;
538 bufferspace
= req
->req
.length
- req
->req
.actual
;
540 /* read all bytes from this packet */
541 if (likely (udccs
& UDCCS_BO_RNE
)) {
542 count
= 1 + (0x0ff & *ep
->reg_ubcr
);
543 req
->req
.actual
+= min (count
, bufferspace
);
546 is_short
= (count
< ep
->ep
.maxpacket
);
547 DBG(DBG_VERY_NOISY
, "read %s %02x, %d bytes%s req %p %d/%d\n",
548 ep
->ep
.name
, udccs
, count
,
549 is_short
? "/S" : "",
550 req
, req
->req
.actual
, req
->req
.length
);
551 while (likely (count
-- != 0)) {
552 u8 byte
= (u8
) *ep
->reg_uddr
;
554 if (unlikely (bufferspace
== 0)) {
555 /* this happens when the driver's buffer
556 * is smaller than what the host sent.
557 * discard the extra data.
559 if (req
->req
.status
!= -EOVERFLOW
)
560 DMSG("%s overflow %d\n",
562 req
->req
.status
= -EOVERFLOW
;
568 *ep
->reg_udccs
= UDCCS_BO_RPC
;
569 /* RPC/RSP/RNE could now reflect the other packet buffer */
571 /* iso is one request per packet */
572 if (ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
) {
573 if (udccs
& UDCCS_IO_ROF
)
574 req
->req
.status
= -EHOSTUNREACH
;
575 /* more like "is_done" */
580 if (is_short
|| req
->req
.actual
== req
->req
.length
) {
582 if (list_empty(&ep
->queue
))
583 pio_irq_disable (ep
->bEndpointAddress
);
587 /* finished that packet. the next one may be waiting... */
593 * special ep0 version of the above. no UBCR0 or double buffering; status
594 * handshaking is magic. most device protocols don't need control-OUT.
595 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
596 * protocols do use them.
599 read_ep0_fifo (struct pxa2xx_ep
*ep
, struct pxa2xx_request
*req
)
602 unsigned bufferspace
;
604 buf
= req
->req
.buf
+ req
->req
.actual
;
605 bufferspace
= req
->req
.length
- req
->req
.actual
;
607 while (UDCCS0
& UDCCS0_RNE
) {
610 if (unlikely (bufferspace
== 0)) {
611 /* this happens when the driver's buffer
612 * is smaller than what the host sent.
613 * discard the extra data.
615 if (req
->req
.status
!= -EOVERFLOW
)
616 DMSG("%s overflow\n", ep
->ep
.name
);
617 req
->req
.status
= -EOVERFLOW
;
625 UDCCS0
= UDCCS0_OPR
| UDCCS0_IPR
;
628 if (req
->req
.actual
>= req
->req
.length
)
631 /* finished that packet. the next one may be waiting... */
635 /*-------------------------------------------------------------------------*/
638 pxa2xx_ep_queue(struct usb_ep
*_ep
, struct usb_request
*_req
, gfp_t gfp_flags
)
640 struct pxa2xx_request
*req
;
641 struct pxa2xx_ep
*ep
;
642 struct pxa2xx_udc
*dev
;
645 req
= container_of(_req
, struct pxa2xx_request
, req
);
646 if (unlikely (!_req
|| !_req
->complete
|| !_req
->buf
647 || !list_empty(&req
->queue
))) {
648 DMSG("%s, bad params\n", __FUNCTION__
);
652 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
653 if (unlikely (!_ep
|| (!ep
->desc
&& ep
->ep
.name
!= ep0name
))) {
654 DMSG("%s, bad ep\n", __FUNCTION__
);
659 if (unlikely (!dev
->driver
660 || dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)) {
661 DMSG("%s, bogus device state\n", __FUNCTION__
);
665 /* iso is always one packet per request, that's the only way
666 * we can report per-packet status. that also helps with dma.
668 if (unlikely (ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
669 && req
->req
.length
> le16_to_cpu
670 (ep
->desc
->wMaxPacketSize
)))
673 DBG(DBG_NOISY
, "%s queue req %p, len %d buf %p\n",
674 _ep
->name
, _req
, _req
->length
, _req
->buf
);
676 local_irq_save(flags
);
678 _req
->status
= -EINPROGRESS
;
681 /* kickstart this i/o queue? */
682 if (list_empty(&ep
->queue
) && !ep
->stopped
) {
683 if (ep
->desc
== NULL
/* ep0 */) {
684 unsigned length
= _req
->length
;
686 switch (dev
->ep0state
) {
687 case EP0_IN_DATA_PHASE
:
688 dev
->stats
.write
.ops
++;
689 if (write_ep0_fifo(ep
, req
))
693 case EP0_OUT_DATA_PHASE
:
694 dev
->stats
.read
.ops
++;
696 if (dev
->req_config
) {
697 DBG(DBG_VERBOSE
, "ep0 config ack%s\n",
698 dev
->has_cfr
? "" : " raced");
700 UDCCFR
= UDCCFR_AREN
|UDCCFR_ACM
703 dev
->ep0state
= EP0_END_XFER
;
704 local_irq_restore (flags
);
707 if (dev
->req_pending
)
708 ep0start(dev
, UDCCS0_IPR
, "OUT");
709 if (length
== 0 || ((UDCCS0
& UDCCS0_RNE
) != 0
710 && read_ep0_fifo(ep
, req
))) {
718 DMSG("ep0 i/o, odd state %d\n", dev
->ep0state
);
719 local_irq_restore (flags
);
722 /* can the FIFO can satisfy the request immediately? */
723 } else if ((ep
->bEndpointAddress
& USB_DIR_IN
) != 0) {
724 if ((*ep
->reg_udccs
& UDCCS_BI_TFS
) != 0
725 && write_fifo(ep
, req
))
727 } else if ((*ep
->reg_udccs
& UDCCS_BO_RFS
) != 0
728 && read_fifo(ep
, req
)) {
732 if (likely (req
&& ep
->desc
))
733 pio_irq_enable(ep
->bEndpointAddress
);
736 /* pio or dma irq handler advances the queue. */
737 if (likely(req
!= NULL
))
738 list_add_tail(&req
->queue
, &ep
->queue
);
739 local_irq_restore(flags
);
746 * nuke - dequeue ALL requests
748 static void nuke(struct pxa2xx_ep
*ep
, int status
)
750 struct pxa2xx_request
*req
;
752 /* called with irqs blocked */
753 while (!list_empty(&ep
->queue
)) {
754 req
= list_entry(ep
->queue
.next
,
755 struct pxa2xx_request
,
757 done(ep
, req
, status
);
760 pio_irq_disable (ep
->bEndpointAddress
);
764 /* dequeue JUST ONE request */
765 static int pxa2xx_ep_dequeue(struct usb_ep
*_ep
, struct usb_request
*_req
)
767 struct pxa2xx_ep
*ep
;
768 struct pxa2xx_request
*req
;
771 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
772 if (!_ep
|| ep
->ep
.name
== ep0name
)
775 local_irq_save(flags
);
777 /* make sure it's actually queued on this endpoint */
778 list_for_each_entry (req
, &ep
->queue
, queue
) {
779 if (&req
->req
== _req
)
782 if (&req
->req
!= _req
) {
783 local_irq_restore(flags
);
787 done(ep
, req
, -ECONNRESET
);
789 local_irq_restore(flags
);
793 /*-------------------------------------------------------------------------*/
795 static int pxa2xx_ep_set_halt(struct usb_ep
*_ep
, int value
)
797 struct pxa2xx_ep
*ep
;
800 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
802 || (!ep
->desc
&& ep
->ep
.name
!= ep0name
))
803 || ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
) {
804 DMSG("%s, bad ep\n", __FUNCTION__
);
808 /* this path (reset toggle+halt) is needed to implement
809 * SET_INTERFACE on normal hardware. but it can't be
810 * done from software on the PXA UDC, and the hardware
811 * forgets to do it as part of SET_INTERFACE automagic.
813 DMSG("only host can clear %s halt\n", _ep
->name
);
817 local_irq_save(flags
);
819 if ((ep
->bEndpointAddress
& USB_DIR_IN
) != 0
820 && ((*ep
->reg_udccs
& UDCCS_BI_TFS
) == 0
821 || !list_empty(&ep
->queue
))) {
822 local_irq_restore(flags
);
826 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
827 *ep
->reg_udccs
= UDCCS_BI_FST
|UDCCS_BI_FTF
;
829 /* ep0 needs special care */
831 start_watchdog(ep
->dev
);
832 ep
->dev
->req_pending
= 0;
833 ep
->dev
->ep0state
= EP0_STALL
;
835 /* and bulk/intr endpoints like dropping stalls too */
838 for (i
= 0; i
< 1000; i
+= 20) {
839 if (*ep
->reg_udccs
& UDCCS_BI_SST
)
844 local_irq_restore(flags
);
846 DBG(DBG_VERBOSE
, "%s halt\n", _ep
->name
);
850 static int pxa2xx_ep_fifo_status(struct usb_ep
*_ep
)
852 struct pxa2xx_ep
*ep
;
854 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
856 DMSG("%s, bad ep\n", __FUNCTION__
);
859 /* pxa can't report unclaimed bytes from IN fifos */
860 if ((ep
->bEndpointAddress
& USB_DIR_IN
) != 0)
862 if (ep
->dev
->gadget
.speed
== USB_SPEED_UNKNOWN
863 || (*ep
->reg_udccs
& UDCCS_BO_RFS
) == 0)
866 return (*ep
->reg_ubcr
& 0xfff) + 1;
869 static void pxa2xx_ep_fifo_flush(struct usb_ep
*_ep
)
871 struct pxa2xx_ep
*ep
;
873 ep
= container_of(_ep
, struct pxa2xx_ep
, ep
);
874 if (!_ep
|| ep
->ep
.name
== ep0name
|| !list_empty(&ep
->queue
)) {
875 DMSG("%s, bad ep\n", __FUNCTION__
);
879 /* toggle and halt bits stay unchanged */
881 /* for OUT, just read and discard the FIFO contents. */
882 if ((ep
->bEndpointAddress
& USB_DIR_IN
) == 0) {
883 while (((*ep
->reg_udccs
) & UDCCS_BO_RNE
) != 0)
884 (void) *ep
->reg_uddr
;
888 /* most IN status is the same, but ISO can't stall */
889 *ep
->reg_udccs
= UDCCS_BI_TPC
|UDCCS_BI_FTF
|UDCCS_BI_TUR
890 | (ep
->bmAttributes
== USB_ENDPOINT_XFER_ISOC
)
895 static struct usb_ep_ops pxa2xx_ep_ops
= {
896 .enable
= pxa2xx_ep_enable
,
897 .disable
= pxa2xx_ep_disable
,
899 .alloc_request
= pxa2xx_ep_alloc_request
,
900 .free_request
= pxa2xx_ep_free_request
,
902 .queue
= pxa2xx_ep_queue
,
903 .dequeue
= pxa2xx_ep_dequeue
,
905 .set_halt
= pxa2xx_ep_set_halt
,
906 .fifo_status
= pxa2xx_ep_fifo_status
,
907 .fifo_flush
= pxa2xx_ep_fifo_flush
,
911 /* ---------------------------------------------------------------------------
912 * device-scoped parts of the api to the usb controller hardware
913 * ---------------------------------------------------------------------------
916 static int pxa2xx_udc_get_frame(struct usb_gadget
*_gadget
)
918 return ((UFNRH
& 0x07) << 8) | (UFNRL
& 0xff);
921 static int pxa2xx_udc_wakeup(struct usb_gadget
*_gadget
)
923 /* host may not have enabled remote wakeup */
924 if ((UDCCS0
& UDCCS0_DRWF
) == 0)
925 return -EHOSTUNREACH
;
926 udc_set_mask_UDCCR(UDCCR_RSM
);
930 static void stop_activity(struct pxa2xx_udc
*, struct usb_gadget_driver
*);
931 static void udc_enable (struct pxa2xx_udc
*);
932 static void udc_disable(struct pxa2xx_udc
*);
934 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
937 static int pullup(struct pxa2xx_udc
*udc
, int is_active
)
939 is_active
= is_active
&& udc
->vbus
&& udc
->pullup
;
940 DMSG("%s\n", is_active
? "active" : "inactive");
944 if (udc
->gadget
.speed
!= USB_SPEED_UNKNOWN
) {
945 DMSG("disconnect %s\n", udc
->driver
946 ? udc
->driver
->driver
.name
948 stop_activity(udc
, udc
->driver
);
955 /* VBUS reporting logically comes from a transceiver */
956 static int pxa2xx_udc_vbus_session(struct usb_gadget
*_gadget
, int is_active
)
958 struct pxa2xx_udc
*udc
;
960 udc
= container_of(_gadget
, struct pxa2xx_udc
, gadget
);
961 udc
->vbus
= is_active
= (is_active
!= 0);
962 DMSG("vbus %s\n", is_active
? "supplied" : "inactive");
963 pullup(udc
, is_active
);
967 /* drivers may have software control over D+ pullup */
968 static int pxa2xx_udc_pullup(struct usb_gadget
*_gadget
, int is_active
)
970 struct pxa2xx_udc
*udc
;
972 udc
= container_of(_gadget
, struct pxa2xx_udc
, gadget
);
974 /* not all boards support pullup control */
975 if (!udc
->mach
->gpio_pullup
&& !udc
->mach
->udc_command
)
978 is_active
= (is_active
!= 0);
979 udc
->pullup
= is_active
;
980 pullup(udc
, is_active
);
984 static const struct usb_gadget_ops pxa2xx_udc_ops
= {
985 .get_frame
= pxa2xx_udc_get_frame
,
986 .wakeup
= pxa2xx_udc_wakeup
,
987 .vbus_session
= pxa2xx_udc_vbus_session
,
988 .pullup
= pxa2xx_udc_pullup
,
990 // .vbus_draw ... boards may consume current from VBUS, up to
991 // 100-500mA based on config. the 500uA suspend ceiling means
992 // that exclusively vbus-powered PXA designs violate USB specs.
995 /*-------------------------------------------------------------------------*/
997 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1000 udc_seq_show(struct seq_file
*m
, void *d
)
1002 struct pxa2xx_udc
*dev
= m
->private;
1003 unsigned long flags
;
1007 local_irq_save(flags
);
1009 /* basic device status */
1010 seq_printf(m
, DRIVER_DESC
"\n"
1011 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1012 driver_name
, DRIVER_VERSION SIZE_STR
"(pio)",
1013 dev
->driver
? dev
->driver
->driver
.name
: "(none)",
1014 is_vbus_present() ? "full speed" : "disconnected");
1016 /* registers for device and ep0 */
1018 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1019 UICR1
, UICR0
, USIR1
, USIR0
, UFNRH
, UFNRL
);
1023 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp
,
1024 (tmp
& UDCCR_REM
) ? " rem" : "",
1025 (tmp
& UDCCR_RSTIR
) ? " rstir" : "",
1026 (tmp
& UDCCR_SRM
) ? " srm" : "",
1027 (tmp
& UDCCR_SUSIR
) ? " susir" : "",
1028 (tmp
& UDCCR_RESIR
) ? " resir" : "",
1029 (tmp
& UDCCR_RSM
) ? " rsm" : "",
1030 (tmp
& UDCCR_UDA
) ? " uda" : "",
1031 (tmp
& UDCCR_UDE
) ? " ude" : "");
1035 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp
,
1036 (tmp
& UDCCS0_SA
) ? " sa" : "",
1037 (tmp
& UDCCS0_RNE
) ? " rne" : "",
1038 (tmp
& UDCCS0_FST
) ? " fst" : "",
1039 (tmp
& UDCCS0_SST
) ? " sst" : "",
1040 (tmp
& UDCCS0_DRWF
) ? " dwrf" : "",
1041 (tmp
& UDCCS0_FTF
) ? " ftf" : "",
1042 (tmp
& UDCCS0_IPR
) ? " ipr" : "",
1043 (tmp
& UDCCS0_OPR
) ? " opr" : "");
1048 "udccfr %02X =%s%s\n", tmp
,
1049 (tmp
& UDCCFR_AREN
) ? " aren" : "",
1050 (tmp
& UDCCFR_ACM
) ? " acm" : "");
1053 if (!is_vbus_present() || !dev
->driver
)
1056 seq_printf(m
, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1057 dev
->stats
.write
.bytes
, dev
->stats
.write
.ops
,
1058 dev
->stats
.read
.bytes
, dev
->stats
.read
.ops
,
1061 /* dump endpoint queues */
1062 for (i
= 0; i
< PXA_UDC_NUM_ENDPOINTS
; i
++) {
1063 struct pxa2xx_ep
*ep
= &dev
->ep
[i
];
1064 struct pxa2xx_request
*req
;
1067 const struct usb_endpoint_descriptor
*desc
;
1072 tmp
= *dev
->ep
[i
].reg_udccs
;
1074 "%s max %d %s udccs %02x irqs %lu\n",
1075 ep
->ep
.name
, le16_to_cpu(desc
->wMaxPacketSize
),
1076 "pio", tmp
, ep
->pio_irqs
);
1077 /* TODO translate all five groups of udccs bits! */
1079 } else /* ep0 should only have one transfer queued */
1080 seq_printf(m
, "ep0 max 16 pio irqs %lu\n",
1083 if (list_empty(&ep
->queue
)) {
1084 seq_printf(m
, "\t(nothing queued)\n");
1087 list_for_each_entry(req
, &ep
->queue
, queue
) {
1089 "\treq %p len %d/%d buf %p\n",
1090 &req
->req
, req
->req
.actual
,
1091 req
->req
.length
, req
->req
.buf
);
1096 local_irq_restore(flags
);
1101 udc_debugfs_open(struct inode
*inode
, struct file
*file
)
1103 return single_open(file
, udc_seq_show
, inode
->i_private
);
1106 static const struct file_operations debug_fops
= {
1107 .open
= udc_debugfs_open
,
1109 .llseek
= seq_lseek
,
1110 .release
= single_release
,
1111 .owner
= THIS_MODULE
,
1114 #define create_debug_files(dev) \
1116 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1117 S_IRUGO, NULL, dev, &debug_fops); \
1119 #define remove_debug_files(dev) \
1121 if (dev->debugfs_udc) \
1122 debugfs_remove(dev->debugfs_udc); \
1125 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1127 #define create_debug_files(dev) do {} while (0)
1128 #define remove_debug_files(dev) do {} while (0)
1130 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1132 /*-------------------------------------------------------------------------*/
1135 * udc_disable - disable USB device controller
1137 static void udc_disable(struct pxa2xx_udc
*dev
)
1139 /* block all irqs */
1140 udc_set_mask_UDCCR(UDCCR_SRM
|UDCCR_REM
);
1141 UICR0
= UICR1
= 0xff;
1144 /* if hardware supports it, disconnect from usb */
1147 udc_clear_mask_UDCCR(UDCCR_UDE
);
1149 #ifdef CONFIG_ARCH_PXA
1150 /* Disable clock for USB device */
1151 clk_disable(dev
->clk
);
1155 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1160 * udc_reinit - initialize software state
1162 static void udc_reinit(struct pxa2xx_udc
*dev
)
1166 /* device/ep0 records init */
1167 INIT_LIST_HEAD (&dev
->gadget
.ep_list
);
1168 INIT_LIST_HEAD (&dev
->gadget
.ep0
->ep_list
);
1169 dev
->ep0state
= EP0_IDLE
;
1171 /* basic endpoint records init */
1172 for (i
= 0; i
< PXA_UDC_NUM_ENDPOINTS
; i
++) {
1173 struct pxa2xx_ep
*ep
= &dev
->ep
[i
];
1176 list_add_tail (&ep
->ep
.ep_list
, &dev
->gadget
.ep_list
);
1180 INIT_LIST_HEAD (&ep
->queue
);
1184 /* the rest was statically initialized, and is read-only */
1187 /* until it's enabled, this UDC should be completely invisible
1190 static void udc_enable (struct pxa2xx_udc
*dev
)
1192 udc_clear_mask_UDCCR(UDCCR_UDE
);
1194 #ifdef CONFIG_ARCH_PXA
1195 /* Enable clock for USB device */
1196 clk_enable(dev
->clk
);
1199 /* try to clear these bits before we enable the udc */
1200 udc_ack_int_UDCCR(UDCCR_SUSIR
|/*UDCCR_RSTIR|*/UDCCR_RESIR
);
1203 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1204 dev
->stats
.irqs
= 0;
1207 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1209 * - if RESET is already in progress, ack interrupt
1210 * - unmask reset interrupt
1212 udc_set_mask_UDCCR(UDCCR_UDE
);
1213 if (!(UDCCR
& UDCCR_UDA
))
1214 udc_ack_int_UDCCR(UDCCR_RSTIR
);
1216 if (dev
->has_cfr
/* UDC_RES2 is defined */) {
1217 /* pxa255 (a0+) can avoid a set_config race that could
1218 * prevent gadget drivers from configuring correctly
1220 UDCCFR
= UDCCFR_ACM
| UDCCFR_MB1
;
1222 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1223 * which could result in missing packets and interrupts.
1224 * supposedly one bit per endpoint, controlling whether it
1225 * double buffers or not; ACM/AREN bits fit into the holes.
1226 * zero bits (like USIR0_IRx) disable double buffering.
1232 /* enable suspend/resume and reset irqs */
1233 udc_clear_mask_UDCCR(UDCCR_SRM
| UDCCR_REM
);
1235 /* enable ep0 irqs */
1236 UICR0
&= ~UICR0_IM0
;
1238 /* if hardware supports it, pullup D+ and wait for reset */
1243 /* when a driver is successfully registered, it will receive
1244 * control requests including set_configuration(), which enables
1245 * non-control requests. then usb traffic follows until a
1246 * disconnect is reported. then a host may connect again, or
1247 * the driver might get unbound.
1249 int usb_gadget_register_driver(struct usb_gadget_driver
*driver
)
1251 struct pxa2xx_udc
*dev
= the_controller
;
1255 || driver
->speed
< USB_SPEED_FULL
1257 || !driver
->disconnect
1265 /* first hook up the driver ... */
1266 dev
->driver
= driver
;
1267 dev
->gadget
.dev
.driver
= &driver
->driver
;
1270 retval
= device_add (&dev
->gadget
.dev
);
1274 dev
->gadget
.dev
.driver
= NULL
;
1277 retval
= driver
->bind(&dev
->gadget
);
1279 DMSG("bind to driver %s --> error %d\n",
1280 driver
->driver
.name
, retval
);
1281 device_del (&dev
->gadget
.dev
);
1285 /* ... then enable host detection and ep0; and we're ready
1286 * for set_configuration as well as eventual disconnect.
1288 DMSG("registered gadget driver '%s'\n", driver
->driver
.name
);
1293 EXPORT_SYMBOL(usb_gadget_register_driver
);
1296 stop_activity(struct pxa2xx_udc
*dev
, struct usb_gadget_driver
*driver
)
1300 /* don't disconnect drivers more than once */
1301 if (dev
->gadget
.speed
== USB_SPEED_UNKNOWN
)
1303 dev
->gadget
.speed
= USB_SPEED_UNKNOWN
;
1305 /* prevent new request submissions, kill any outstanding requests */
1306 for (i
= 0; i
< PXA_UDC_NUM_ENDPOINTS
; i
++) {
1307 struct pxa2xx_ep
*ep
= &dev
->ep
[i
];
1310 nuke(ep
, -ESHUTDOWN
);
1312 del_timer_sync(&dev
->timer
);
1314 /* report disconnect; the driver is already quiesced */
1316 driver
->disconnect(&dev
->gadget
);
1318 /* re-init driver-visible data structures */
1322 int usb_gadget_unregister_driver(struct usb_gadget_driver
*driver
)
1324 struct pxa2xx_udc
*dev
= the_controller
;
1328 if (!driver
|| driver
!= dev
->driver
|| !driver
->unbind
)
1331 local_irq_disable();
1333 stop_activity(dev
, driver
);
1336 driver
->unbind(&dev
->gadget
);
1337 dev
->gadget
.dev
.driver
= NULL
;
1340 device_del (&dev
->gadget
.dev
);
1342 DMSG("unregistered gadget driver '%s'\n", driver
->driver
.name
);
1346 EXPORT_SYMBOL(usb_gadget_unregister_driver
);
1349 /*-------------------------------------------------------------------------*/
1351 #ifdef CONFIG_ARCH_LUBBOCK
1353 /* Lubbock has separate connect and disconnect irqs. More typical designs
1354 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1358 lubbock_vbus_irq(int irq
, void *_dev
)
1360 struct pxa2xx_udc
*dev
= _dev
;
1365 case LUBBOCK_USB_IRQ
:
1367 disable_irq(LUBBOCK_USB_IRQ
);
1368 enable_irq(LUBBOCK_USB_DISC_IRQ
);
1370 case LUBBOCK_USB_DISC_IRQ
:
1372 disable_irq(LUBBOCK_USB_DISC_IRQ
);
1373 enable_irq(LUBBOCK_USB_IRQ
);
1379 pxa2xx_udc_vbus_session(&dev
->gadget
, vbus
);
1385 static irqreturn_t
udc_vbus_irq(int irq
, void *_dev
)
1387 struct pxa2xx_udc
*dev
= _dev
;
1388 int vbus
= gpio_get_value(dev
->mach
->gpio_vbus
);
1390 if (dev
->mach
->gpio_vbus_inverted
)
1393 pxa2xx_udc_vbus_session(&dev
->gadget
, vbus
);
1398 /*-------------------------------------------------------------------------*/
1400 static inline void clear_ep_state (struct pxa2xx_udc
*dev
)
1404 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1405 * fifos, and pending transactions mustn't be continued in any case.
1407 for (i
= 1; i
< PXA_UDC_NUM_ENDPOINTS
; i
++)
1408 nuke(&dev
->ep
[i
], -ECONNABORTED
);
1411 static void udc_watchdog(unsigned long _dev
)
1413 struct pxa2xx_udc
*dev
= (void *)_dev
;
1415 local_irq_disable();
1416 if (dev
->ep0state
== EP0_STALL
1417 && (UDCCS0
& UDCCS0_FST
) == 0
1418 && (UDCCS0
& UDCCS0_SST
) == 0) {
1419 UDCCS0
= UDCCS0_FST
|UDCCS0_FTF
;
1420 DBG(DBG_VERBOSE
, "ep0 re-stall\n");
1421 start_watchdog(dev
);
1426 static void handle_ep0 (struct pxa2xx_udc
*dev
)
1428 u32 udccs0
= UDCCS0
;
1429 struct pxa2xx_ep
*ep
= &dev
->ep
[0];
1430 struct pxa2xx_request
*req
;
1432 struct usb_ctrlrequest r
;
1437 if (list_empty(&ep
->queue
))
1440 req
= list_entry(ep
->queue
.next
, struct pxa2xx_request
, queue
);
1442 /* clear stall status */
1443 if (udccs0
& UDCCS0_SST
) {
1445 UDCCS0
= UDCCS0_SST
;
1446 del_timer(&dev
->timer
);
1450 /* previous request unfinished? non-error iff back-to-back ... */
1451 if ((udccs0
& UDCCS0_SA
) != 0 && dev
->ep0state
!= EP0_IDLE
) {
1453 del_timer(&dev
->timer
);
1457 switch (dev
->ep0state
) {
1459 /* late-breaking status? */
1462 /* start control request? */
1463 if (likely((udccs0
& (UDCCS0_OPR
|UDCCS0_SA
|UDCCS0_RNE
))
1464 == (UDCCS0_OPR
|UDCCS0_SA
|UDCCS0_RNE
))) {
1469 /* read SETUP packet */
1470 for (i
= 0; i
< 8; i
++) {
1471 if (unlikely(!(UDCCS0
& UDCCS0_RNE
))) {
1473 DMSG("SETUP %d!\n", i
);
1476 u
.raw
[i
] = (u8
) UDDR0
;
1478 if (unlikely((UDCCS0
& UDCCS0_RNE
) != 0))
1482 DBG(DBG_VERBOSE
, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1483 u
.r
.bRequestType
, u
.r
.bRequest
,
1484 le16_to_cpu(u
.r
.wValue
),
1485 le16_to_cpu(u
.r
.wIndex
),
1486 le16_to_cpu(u
.r
.wLength
));
1488 /* cope with automagic for some standard requests. */
1489 dev
->req_std
= (u
.r
.bRequestType
& USB_TYPE_MASK
)
1490 == USB_TYPE_STANDARD
;
1491 dev
->req_config
= 0;
1492 dev
->req_pending
= 1;
1493 switch (u
.r
.bRequest
) {
1494 /* hardware restricts gadget drivers here! */
1495 case USB_REQ_SET_CONFIGURATION
:
1496 if (u
.r
.bRequestType
== USB_RECIP_DEVICE
) {
1497 /* reflect hardware's automagic
1498 * up to the gadget driver.
1501 dev
->req_config
= 1;
1502 clear_ep_state(dev
);
1503 /* if !has_cfr, there's no synch
1504 * else use AREN (later) not SA|OPR
1505 * USIR0_IR0 acts edge sensitive
1509 /* ... and here, even more ... */
1510 case USB_REQ_SET_INTERFACE
:
1511 if (u
.r
.bRequestType
== USB_RECIP_INTERFACE
) {
1512 /* udc hardware is broken by design:
1513 * - altsetting may only be zero;
1514 * - hw resets all interfaces' eps;
1515 * - ep reset doesn't include halt(?).
1517 DMSG("broken set_interface (%d/%d)\n",
1518 le16_to_cpu(u
.r
.wIndex
),
1519 le16_to_cpu(u
.r
.wValue
));
1523 /* hardware was supposed to hide this */
1524 case USB_REQ_SET_ADDRESS
:
1525 if (u
.r
.bRequestType
== USB_RECIP_DEVICE
) {
1526 ep0start(dev
, 0, "address");
1532 if (u
.r
.bRequestType
& USB_DIR_IN
)
1533 dev
->ep0state
= EP0_IN_DATA_PHASE
;
1535 dev
->ep0state
= EP0_OUT_DATA_PHASE
;
1537 i
= dev
->driver
->setup(&dev
->gadget
, &u
.r
);
1539 /* hardware automagic preventing STALL... */
1540 if (dev
->req_config
) {
1541 /* hardware sometimes neglects to tell
1542 * tell us about config change events,
1543 * so later ones may fail...
1545 WARN("config change %02x fail %d?\n",
1548 /* TODO experiment: if has_cfr,
1549 * hardware didn't ACK; maybe we
1550 * could actually STALL!
1553 DBG(DBG_VERBOSE
, "protocol STALL, "
1554 "%02x err %d\n", UDCCS0
, i
);
1556 /* the watchdog timer helps deal with cases
1557 * where udc seems to clear FST wrongly, and
1558 * then NAKs instead of STALLing.
1560 ep0start(dev
, UDCCS0_FST
|UDCCS0_FTF
, "stall");
1561 start_watchdog(dev
);
1562 dev
->ep0state
= EP0_STALL
;
1564 /* deferred i/o == no response yet */
1565 } else if (dev
->req_pending
) {
1566 if (likely(dev
->ep0state
== EP0_IN_DATA_PHASE
1567 || dev
->req_std
|| u
.r
.wLength
))
1568 ep0start(dev
, 0, "defer");
1570 ep0start(dev
, UDCCS0_IPR
, "defer/IPR");
1573 /* expect at least one data or status stage irq */
1576 } else if (likely((udccs0
& (UDCCS0_OPR
|UDCCS0_SA
))
1577 == (UDCCS0_OPR
|UDCCS0_SA
))) {
1580 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1581 * still observed on a pxa255 a0.
1583 DBG(DBG_VERBOSE
, "e131\n");
1586 /* read SETUP data, but don't trust it too much */
1587 for (i
= 0; i
< 8; i
++)
1588 u
.raw
[i
] = (u8
) UDDR0
;
1589 if ((u
.r
.bRequestType
& USB_RECIP_MASK
)
1592 if (u
.word
[0] == 0 && u
.word
[1] == 0)
1596 /* some random early IRQ:
1599 * - OPR got set, without SA (likely status stage)
1601 UDCCS0
= udccs0
& (UDCCS0_SA
|UDCCS0_OPR
);
1604 case EP0_IN_DATA_PHASE
: /* GET_DESCRIPTOR etc */
1605 if (udccs0
& UDCCS0_OPR
) {
1606 UDCCS0
= UDCCS0_OPR
|UDCCS0_FTF
;
1607 DBG(DBG_VERBOSE
, "ep0in premature status\n");
1611 } else /* irq was IPR clearing */ {
1613 /* this IN packet might finish the request */
1614 (void) write_ep0_fifo(ep
, req
);
1615 } /* else IN token before response was written */
1618 case EP0_OUT_DATA_PHASE
: /* SET_DESCRIPTOR etc */
1619 if (udccs0
& UDCCS0_OPR
) {
1621 /* this OUT packet might finish the request */
1622 if (read_ep0_fifo(ep
, req
))
1624 /* else more OUT packets expected */
1625 } /* else OUT token before read was issued */
1626 } else /* irq was IPR clearing */ {
1627 DBG(DBG_VERBOSE
, "ep0out premature status\n");
1636 /* ack control-IN status (maybe in-zlp was skipped)
1637 * also appears after some config change events.
1639 if (udccs0
& UDCCS0_OPR
)
1640 UDCCS0
= UDCCS0_OPR
;
1644 UDCCS0
= UDCCS0_FST
;
1650 static void handle_ep(struct pxa2xx_ep
*ep
)
1652 struct pxa2xx_request
*req
;
1653 int is_in
= ep
->bEndpointAddress
& USB_DIR_IN
;
1659 if (likely (!list_empty(&ep
->queue
)))
1660 req
= list_entry(ep
->queue
.next
,
1661 struct pxa2xx_request
, queue
);
1665 // TODO check FST handling
1667 udccs
= *ep
->reg_udccs
;
1668 if (unlikely(is_in
)) { /* irq from TPC, SST, or (ISO) TUR */
1670 if (likely(ep
->bmAttributes
== USB_ENDPOINT_XFER_BULK
))
1671 tmp
|= UDCCS_BI_SST
;
1674 *ep
->reg_udccs
= tmp
;
1675 if (req
&& likely ((udccs
& UDCCS_BI_TFS
) != 0))
1676 completed
= write_fifo(ep
, req
);
1678 } else { /* irq from RPC (or for ISO, ROF) */
1679 if (likely(ep
->bmAttributes
== USB_ENDPOINT_XFER_BULK
))
1680 tmp
= UDCCS_BO_SST
| UDCCS_BO_DME
;
1682 tmp
= UDCCS_IO_ROF
| UDCCS_IO_DME
;
1685 *ep
->reg_udccs
= tmp
;
1687 /* fifos can hold packets, ready for reading... */
1689 completed
= read_fifo(ep
, req
);
1691 pio_irq_disable (ep
->bEndpointAddress
);
1694 } while (completed
);
1698 * pxa2xx_udc_irq - interrupt handler
1700 * avoid delays in ep0 processing. the control handshaking isn't always
1701 * under software control (pxa250c0 and the pxa255 are better), and delays
1702 * could cause usb protocol errors.
1705 pxa2xx_udc_irq(int irq
, void *_dev
)
1707 struct pxa2xx_udc
*dev
= _dev
;
1716 /* SUSpend Interrupt Request */
1717 if (unlikely(udccr
& UDCCR_SUSIR
)) {
1718 udc_ack_int_UDCCR(UDCCR_SUSIR
);
1720 DBG(DBG_VERBOSE
, "USB suspend%s\n", is_vbus_present()
1721 ? "" : "+disconnect");
1723 if (!is_vbus_present())
1724 stop_activity(dev
, dev
->driver
);
1725 else if (dev
->gadget
.speed
!= USB_SPEED_UNKNOWN
1727 && dev
->driver
->suspend
)
1728 dev
->driver
->suspend(&dev
->gadget
);
1732 /* RESume Interrupt Request */
1733 if (unlikely(udccr
& UDCCR_RESIR
)) {
1734 udc_ack_int_UDCCR(UDCCR_RESIR
);
1736 DBG(DBG_VERBOSE
, "USB resume\n");
1738 if (dev
->gadget
.speed
!= USB_SPEED_UNKNOWN
1740 && dev
->driver
->resume
1741 && is_vbus_present())
1742 dev
->driver
->resume(&dev
->gadget
);
1745 /* ReSeT Interrupt Request - USB reset */
1746 if (unlikely(udccr
& UDCCR_RSTIR
)) {
1747 udc_ack_int_UDCCR(UDCCR_RSTIR
);
1750 if ((UDCCR
& UDCCR_UDA
) == 0) {
1751 DBG(DBG_VERBOSE
, "USB reset start\n");
1753 /* reset driver and endpoints,
1754 * in case that's not yet done
1756 stop_activity (dev
, dev
->driver
);
1759 DBG(DBG_VERBOSE
, "USB reset end\n");
1760 dev
->gadget
.speed
= USB_SPEED_FULL
;
1761 memset(&dev
->stats
, 0, sizeof dev
->stats
);
1762 /* driver and endpoints are still reset */
1766 u32 usir0
= USIR0
& ~UICR0
;
1767 u32 usir1
= USIR1
& ~UICR1
;
1770 if (unlikely (!usir0
&& !usir1
))
1773 DBG(DBG_VERY_NOISY
, "irq %02x.%02x\n", usir1
, usir0
);
1775 /* control traffic */
1776 if (usir0
& USIR0_IR0
) {
1777 dev
->ep
[0].pio_irqs
++;
1782 /* endpoint data transfers */
1783 for (i
= 0; i
< 8; i
++) {
1786 if (i
&& (usir0
& tmp
)) {
1787 handle_ep(&dev
->ep
[i
]);
1792 handle_ep(&dev
->ep
[i
+8]);
1799 /* we could also ask for 1 msec SOF (SIR) interrupts */
1805 /*-------------------------------------------------------------------------*/
1807 static void nop_release (struct device
*dev
)
1809 DMSG("%s %s\n", __FUNCTION__
, dev
->bus_id
);
1812 /* this uses load-time allocation and initialization (instead of
1813 * doing it at run-time) to save code, eliminate fault paths, and
1814 * be more obviously correct.
1816 static struct pxa2xx_udc memory
= {
1818 .ops
= &pxa2xx_udc_ops
,
1819 .ep0
= &memory
.ep
[0].ep
,
1820 .name
= driver_name
,
1823 .release
= nop_release
,
1827 /* control endpoint */
1831 .ops
= &pxa2xx_ep_ops
,
1832 .maxpacket
= EP0_FIFO_SIZE
,
1835 .reg_udccs
= &UDCCS0
,
1839 /* first group of endpoints */
1842 .name
= "ep1in-bulk",
1843 .ops
= &pxa2xx_ep_ops
,
1844 .maxpacket
= BULK_FIFO_SIZE
,
1847 .fifo_size
= BULK_FIFO_SIZE
,
1848 .bEndpointAddress
= USB_DIR_IN
| 1,
1849 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1850 .reg_udccs
= &UDCCS1
,
1855 .name
= "ep2out-bulk",
1856 .ops
= &pxa2xx_ep_ops
,
1857 .maxpacket
= BULK_FIFO_SIZE
,
1860 .fifo_size
= BULK_FIFO_SIZE
,
1861 .bEndpointAddress
= 2,
1862 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1863 .reg_udccs
= &UDCCS2
,
1867 #ifndef CONFIG_USB_PXA2XX_SMALL
1870 .name
= "ep3in-iso",
1871 .ops
= &pxa2xx_ep_ops
,
1872 .maxpacket
= ISO_FIFO_SIZE
,
1875 .fifo_size
= ISO_FIFO_SIZE
,
1876 .bEndpointAddress
= USB_DIR_IN
| 3,
1877 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1878 .reg_udccs
= &UDCCS3
,
1883 .name
= "ep4out-iso",
1884 .ops
= &pxa2xx_ep_ops
,
1885 .maxpacket
= ISO_FIFO_SIZE
,
1888 .fifo_size
= ISO_FIFO_SIZE
,
1889 .bEndpointAddress
= 4,
1890 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1891 .reg_udccs
= &UDCCS4
,
1897 .name
= "ep5in-int",
1898 .ops
= &pxa2xx_ep_ops
,
1899 .maxpacket
= INT_FIFO_SIZE
,
1902 .fifo_size
= INT_FIFO_SIZE
,
1903 .bEndpointAddress
= USB_DIR_IN
| 5,
1904 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
1905 .reg_udccs
= &UDCCS5
,
1909 /* second group of endpoints */
1912 .name
= "ep6in-bulk",
1913 .ops
= &pxa2xx_ep_ops
,
1914 .maxpacket
= BULK_FIFO_SIZE
,
1917 .fifo_size
= BULK_FIFO_SIZE
,
1918 .bEndpointAddress
= USB_DIR_IN
| 6,
1919 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1920 .reg_udccs
= &UDCCS6
,
1925 .name
= "ep7out-bulk",
1926 .ops
= &pxa2xx_ep_ops
,
1927 .maxpacket
= BULK_FIFO_SIZE
,
1930 .fifo_size
= BULK_FIFO_SIZE
,
1931 .bEndpointAddress
= 7,
1932 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1933 .reg_udccs
= &UDCCS7
,
1939 .name
= "ep8in-iso",
1940 .ops
= &pxa2xx_ep_ops
,
1941 .maxpacket
= ISO_FIFO_SIZE
,
1944 .fifo_size
= ISO_FIFO_SIZE
,
1945 .bEndpointAddress
= USB_DIR_IN
| 8,
1946 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1947 .reg_udccs
= &UDCCS8
,
1952 .name
= "ep9out-iso",
1953 .ops
= &pxa2xx_ep_ops
,
1954 .maxpacket
= ISO_FIFO_SIZE
,
1957 .fifo_size
= ISO_FIFO_SIZE
,
1958 .bEndpointAddress
= 9,
1959 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
1960 .reg_udccs
= &UDCCS9
,
1966 .name
= "ep10in-int",
1967 .ops
= &pxa2xx_ep_ops
,
1968 .maxpacket
= INT_FIFO_SIZE
,
1971 .fifo_size
= INT_FIFO_SIZE
,
1972 .bEndpointAddress
= USB_DIR_IN
| 10,
1973 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
1974 .reg_udccs
= &UDCCS10
,
1975 .reg_uddr
= &UDDR10
,
1978 /* third group of endpoints */
1981 .name
= "ep11in-bulk",
1982 .ops
= &pxa2xx_ep_ops
,
1983 .maxpacket
= BULK_FIFO_SIZE
,
1986 .fifo_size
= BULK_FIFO_SIZE
,
1987 .bEndpointAddress
= USB_DIR_IN
| 11,
1988 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
1989 .reg_udccs
= &UDCCS11
,
1990 .reg_uddr
= &UDDR11
,
1994 .name
= "ep12out-bulk",
1995 .ops
= &pxa2xx_ep_ops
,
1996 .maxpacket
= BULK_FIFO_SIZE
,
1999 .fifo_size
= BULK_FIFO_SIZE
,
2000 .bEndpointAddress
= 12,
2001 .bmAttributes
= USB_ENDPOINT_XFER_BULK
,
2002 .reg_udccs
= &UDCCS12
,
2003 .reg_ubcr
= &UBCR12
,
2004 .reg_uddr
= &UDDR12
,
2008 .name
= "ep13in-iso",
2009 .ops
= &pxa2xx_ep_ops
,
2010 .maxpacket
= ISO_FIFO_SIZE
,
2013 .fifo_size
= ISO_FIFO_SIZE
,
2014 .bEndpointAddress
= USB_DIR_IN
| 13,
2015 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
2016 .reg_udccs
= &UDCCS13
,
2017 .reg_uddr
= &UDDR13
,
2021 .name
= "ep14out-iso",
2022 .ops
= &pxa2xx_ep_ops
,
2023 .maxpacket
= ISO_FIFO_SIZE
,
2026 .fifo_size
= ISO_FIFO_SIZE
,
2027 .bEndpointAddress
= 14,
2028 .bmAttributes
= USB_ENDPOINT_XFER_ISOC
,
2029 .reg_udccs
= &UDCCS14
,
2030 .reg_ubcr
= &UBCR14
,
2031 .reg_uddr
= &UDDR14
,
2035 .name
= "ep15in-int",
2036 .ops
= &pxa2xx_ep_ops
,
2037 .maxpacket
= INT_FIFO_SIZE
,
2040 .fifo_size
= INT_FIFO_SIZE
,
2041 .bEndpointAddress
= USB_DIR_IN
| 15,
2042 .bmAttributes
= USB_ENDPOINT_XFER_INT
,
2043 .reg_udccs
= &UDCCS15
,
2044 .reg_uddr
= &UDDR15
,
2046 #endif /* !CONFIG_USB_PXA2XX_SMALL */
2049 #define CP15R0_VENDOR_MASK 0xffffe000
2051 #if defined(CONFIG_ARCH_PXA)
2052 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2054 #elif defined(CONFIG_ARCH_IXP4XX)
2055 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2059 #define CP15R0_PROD_MASK 0x000003f0
2060 #define PXA25x 0x00000100 /* and PXA26x */
2061 #define PXA210 0x00000120
2063 #define CP15R0_REV_MASK 0x0000000f
2065 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2067 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2068 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2069 #define PXA250_B2 0x00000104
2070 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2071 #define PXA250_B0 0x00000102
2072 #define PXA250_A1 0x00000101
2073 #define PXA250_A0 0x00000100
2075 #define PXA210_C0 0x00000125
2076 #define PXA210_B2 0x00000124
2077 #define PXA210_B1 0x00000123
2078 #define PXA210_B0 0x00000122
2079 #define IXP425_A0 0x000001c1
2080 #define IXP425_B0 0x000001f1
2081 #define IXP465_AD 0x00000200
2084 * probe - binds to the platform device
2086 static int __init
pxa2xx_udc_probe(struct platform_device
*pdev
)
2088 struct pxa2xx_udc
*dev
= &memory
;
2089 int retval
, vbus_irq
, irq
;
2092 /* insist on Intel/ARM/XScale */
2093 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev
));
2094 if ((chiprev
& CP15R0_VENDOR_MASK
) != CP15R0_XSCALE_VALUE
) {
2095 pr_err("%s: not XScale!\n", driver_name
);
2099 /* trigger chiprev-specific logic */
2100 switch (chiprev
& CP15R0_PRODREV_MASK
) {
2101 #if defined(CONFIG_ARCH_PXA)
2107 /* A0/A1 "not released"; ep 13, 15 unusable */
2109 case PXA250_B2
: case PXA210_B2
:
2110 case PXA250_B1
: case PXA210_B1
:
2111 case PXA250_B0
: case PXA210_B0
:
2112 /* OUT-DMA is broken ... */
2114 case PXA250_C0
: case PXA210_C0
:
2116 #elif defined(CONFIG_ARCH_IXP4XX)
2124 pr_err("%s: unrecognized processor: %08x\n",
2125 driver_name
, chiprev
);
2126 /* iop3xx, ixp4xx, ... */
2130 irq
= platform_get_irq(pdev
, 0);
2134 #ifdef CONFIG_ARCH_PXA
2135 dev
->clk
= clk_get(&pdev
->dev
, "UDCCLK");
2136 if (IS_ERR(dev
->clk
)) {
2137 retval
= PTR_ERR(dev
->clk
);
2142 pr_debug("%s: IRQ %d%s%s\n", driver_name
, irq
,
2143 dev
->has_cfr
? "" : " (!cfr)",
2147 /* other non-static parts of init */
2148 dev
->dev
= &pdev
->dev
;
2149 dev
->mach
= pdev
->dev
.platform_data
;
2151 if (dev
->mach
->gpio_vbus
) {
2152 if ((retval
= gpio_request(dev
->mach
->gpio_vbus
,
2153 "pxa2xx_udc GPIO VBUS"))) {
2155 "can't get vbus gpio %d, err: %d\n",
2156 dev
->mach
->gpio_vbus
, retval
);
2159 gpio_direction_input(dev
->mach
->gpio_vbus
);
2160 vbus_irq
= gpio_to_irq(dev
->mach
->gpio_vbus
);
2164 if (dev
->mach
->gpio_pullup
) {
2165 if ((retval
= gpio_request(dev
->mach
->gpio_pullup
,
2166 "pca2xx_udc GPIO PULLUP"))) {
2168 "can't get pullup gpio %d, err: %d\n",
2169 dev
->mach
->gpio_pullup
, retval
);
2170 goto err_gpio_pullup
;
2172 gpio_direction_output(dev
->mach
->gpio_pullup
, 0);
2175 init_timer(&dev
->timer
);
2176 dev
->timer
.function
= udc_watchdog
;
2177 dev
->timer
.data
= (unsigned long) dev
;
2179 device_initialize(&dev
->gadget
.dev
);
2180 dev
->gadget
.dev
.parent
= &pdev
->dev
;
2181 dev
->gadget
.dev
.dma_mask
= pdev
->dev
.dma_mask
;
2183 the_controller
= dev
;
2184 platform_set_drvdata(pdev
, dev
);
2189 dev
->vbus
= is_vbus_present();
2191 /* irq setup after old hardware state is cleaned up */
2192 retval
= request_irq(irq
, pxa2xx_udc_irq
,
2193 IRQF_DISABLED
, driver_name
, dev
);
2195 pr_err("%s: can't get irq %d, err %d\n",
2196 driver_name
, irq
, retval
);
2201 #ifdef CONFIG_ARCH_LUBBOCK
2202 if (machine_is_lubbock()) {
2203 retval
= request_irq(LUBBOCK_USB_DISC_IRQ
,
2205 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
,
2208 pr_err("%s: can't get irq %i, err %d\n",
2209 driver_name
, LUBBOCK_USB_DISC_IRQ
, retval
);
2213 retval
= request_irq(LUBBOCK_USB_IRQ
,
2215 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
,
2218 pr_err("%s: can't get irq %i, err %d\n",
2219 driver_name
, LUBBOCK_USB_IRQ
, retval
);
2220 free_irq(LUBBOCK_USB_DISC_IRQ
, dev
);
2226 retval
= request_irq(vbus_irq
, udc_vbus_irq
,
2227 IRQF_DISABLED
| IRQF_SAMPLE_RANDOM
|
2228 IRQF_TRIGGER_RISING
| IRQF_TRIGGER_FALLING
,
2231 pr_err("%s: can't get irq %i, err %d\n",
2232 driver_name
, vbus_irq
, retval
);
2236 create_debug_files(dev
);
2241 #ifdef CONFIG_ARCH_LUBBOCK
2242 free_irq(LUBBOCK_USB_DISC_IRQ
, dev
);
2247 if (dev
->mach
->gpio_pullup
)
2248 gpio_free(dev
->mach
->gpio_pullup
);
2250 if (dev
->mach
->gpio_vbus
)
2251 gpio_free(dev
->mach
->gpio_vbus
);
2253 #ifdef CONFIG_ARCH_PXA
2260 static void pxa2xx_udc_shutdown(struct platform_device
*_dev
)
2265 static int __exit
pxa2xx_udc_remove(struct platform_device
*pdev
)
2267 struct pxa2xx_udc
*dev
= platform_get_drvdata(pdev
);
2273 remove_debug_files(dev
);
2276 free_irq(platform_get_irq(pdev
, 0), dev
);
2279 #ifdef CONFIG_ARCH_LUBBOCK
2280 if (machine_is_lubbock()) {
2281 free_irq(LUBBOCK_USB_DISC_IRQ
, dev
);
2282 free_irq(LUBBOCK_USB_IRQ
, dev
);
2285 if (dev
->mach
->gpio_vbus
) {
2286 free_irq(gpio_to_irq(dev
->mach
->gpio_vbus
), dev
);
2287 gpio_free(dev
->mach
->gpio_vbus
);
2289 if (dev
->mach
->gpio_pullup
)
2290 gpio_free(dev
->mach
->gpio_pullup
);
2292 #ifdef CONFIG_ARCH_PXA
2296 platform_set_drvdata(pdev
, NULL
);
2297 the_controller
= NULL
;
2301 /*-------------------------------------------------------------------------*/
2305 /* USB suspend (controlled by the host) and system suspend (controlled
2306 * by the PXA) don't necessarily work well together. If USB is active,
2307 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2308 * mode, or any deeper PM saving state.
2310 * For now, we punt and forcibly disconnect from the USB host when PXA
2311 * enters any suspend state. While we're disconnected, we always disable
2312 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2313 * Boards without software pullup control shouldn't use those states.
2314 * VBUS IRQs should probably be ignored so that the PXA device just acts
2315 * "dead" to USB hosts until system resume.
2317 static int pxa2xx_udc_suspend(struct platform_device
*dev
, pm_message_t state
)
2319 struct pxa2xx_udc
*udc
= platform_get_drvdata(dev
);
2321 if (!udc
->mach
->gpio_pullup
&& !udc
->mach
->udc_command
)
2322 WARN("USB host won't detect disconnect!\n");
2328 static int pxa2xx_udc_resume(struct platform_device
*dev
)
2330 struct pxa2xx_udc
*udc
= platform_get_drvdata(dev
);
2338 #define pxa2xx_udc_suspend NULL
2339 #define pxa2xx_udc_resume NULL
2342 /*-------------------------------------------------------------------------*/
2344 static struct platform_driver udc_driver
= {
2345 .shutdown
= pxa2xx_udc_shutdown
,
2346 .remove
= __exit_p(pxa2xx_udc_remove
),
2347 .suspend
= pxa2xx_udc_suspend
,
2348 .resume
= pxa2xx_udc_resume
,
2350 .owner
= THIS_MODULE
,
2351 .name
= "pxa2xx-udc",
2355 static int __init
udc_init(void)
2357 pr_info("%s: version %s\n", driver_name
, DRIVER_VERSION
);
2358 return platform_driver_probe(&udc_driver
, pxa2xx_udc_probe
);
2360 module_init(udc_init
);
2362 static void __exit
udc_exit(void)
2364 platform_driver_unregister(&udc_driver
);
2366 module_exit(udc_exit
);
2368 MODULE_DESCRIPTION(DRIVER_DESC
);
2369 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2370 MODULE_LICENSE("GPL");