drivers/serial/sh-sci.c

   1 /*
   2  * drivers/serial/sh-sci.c
   3  *
   4  * SuperH on-chip serial module support.  (SCI with no FIFO / with FIFO)
   5  *
   6  *  Copyright (C) 2002 - 2006  Paul Mundt
   7  *  Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
   8  *
   9  * based off of the old drivers/char/sh-sci.c by:
  10  *
  11  *   Copyright (C) 1999, 2000  Niibe Yutaka
  12  *   Copyright (C) 2000  Sugioka Toshinobu
  13  *   Modified to support multiple serial ports. Stuart Menefy (May 2000).
  14  *   Modified to support SecureEdge. David McCullough (2002)
  15  *   Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
  16  *   Removed SH7300 support (Jul 2007).
  17  *
  18  * This file is subject to the terms and conditions of the GNU General Public
  19  * License.  See the file "COPYING" in the main directory of this archive
  20  * for more details.
  21  */
  22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  23 #define SUPPORT_SYSRQ
  24 #endif
  25
  26 #undef DEBUG
  27
  28 #include <linux/module.h>
  29 #include <linux/errno.h>
  30 #include <linux/timer.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/tty.h>
  33 #include <linux/tty_flip.h>
  34 #include <linux/serial.h>
  35 #include <linux/major.h>
  36 #include <linux/string.h>
  37 #include <linux/sysrq.h>
  38 #include <linux/ioport.h>
  39 #include <linux/mm.h>
  40 #include <linux/init.h>
  41 #include <linux/delay.h>
  42 #include <linux/console.h>
  43 #include <linux/platform_device.h>
  44 #include <linux/serial_sci.h>
  45 #include <linux/notifier.h>
  46 #include <linux/cpufreq.h>
  47 #include <linux/clk.h>
  48 #include <linux/ctype.h>
  49
  50 #ifdef CONFIG_SUPERH
  51 #include <asm/clock.h>
  52 #include <asm/sh_bios.h>
  53 #include <asm/kgdb.h>
  54 #endif
  55
  56 #include "sh-sci.h"
  57
  58 struct sci_port {
  59         struct uart_port        port;
  60
  61         /* Port type */
  62         unsigned int            type;
  63
  64         /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
  65         unsigned int            irqs[SCIx_NR_IRQS];
  66
  67         /* Port pin configuration */
  68         void                    (*init_pins)(struct uart_port *port,
  69                                              unsigned int cflag);
  70
  71         /* Port enable callback */
  72         void                    (*enable)(struct uart_port *port);
  73
  74         /* Port disable callback */
  75         void                    (*disable)(struct uart_port *port);
  76
  77         /* Break timer */
  78         struct timer_list       break_timer;
  79         int                     break_flag;
  80
  81 #ifdef CONFIG_SUPERH
  82         /* Port clock */
  83         struct clk              *clk;
  84 #endif
  85 };
  86
  87 #ifdef CONFIG_SH_KGDB
  88 static struct sci_port *kgdb_sci_port;
  89 #endif
  90
  91 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
  92 static struct sci_port *serial_console_port;
  93 #endif
  94
  95 /* Function prototypes */
  96 static void sci_stop_tx(struct uart_port *port);
  97
  98 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
  99
 100 static struct sci_port sci_ports[SCI_NPORTS];
 101 static struct uart_driver sci_uart_driver;
 102
 103 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
 104     defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
 105 static inline void handle_error(struct uart_port *port)
 106 {
 107         /* Clear error flags */
 108         sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
 109 }
 110
 111 static int get_char(struct uart_port *port)
 112 {
 113         unsigned long flags;
 114         unsigned short status;
 115         int c;
 116
 117         spin_lock_irqsave(&port->lock, flags);
 118         do {
 119                 status = sci_in(port, SCxSR);
 120                 if (status & SCxSR_ERRORS(port)) {
 121                         handle_error(port);
 122                         continue;
 123                 }
 124         } while (!(status & SCxSR_RDxF(port)));
 125         c = sci_in(port, SCxRDR);
 126         sci_in(port, SCxSR);            /* Dummy read */
 127         sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
 128         spin_unlock_irqrestore(&port->lock, flags);
 129
 130         return c;
 131 }
 132 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
 133
 134 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
 135 static void put_char(struct uart_port *port, char c)
 136 {
 137         unsigned long flags;
 138         unsigned short status;
 139
 140         spin_lock_irqsave(&port->lock, flags);
 141
 142         do {
 143                 status = sci_in(port, SCxSR);
 144         } while (!(status & SCxSR_TDxE(port)));
 145
 146         sci_out(port, SCxTDR, c);
 147         sci_in(port, SCxSR);            /* Dummy read */
 148         sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
 149
 150         spin_unlock_irqrestore(&port->lock, flags);
 151 }
 152 #endif
 153
 154 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
 155 static void put_string(struct sci_port *sci_port, const char *buffer, int count)
 156 {
 157         struct uart_port *port = &sci_port->port;
 158         const unsigned char *p = buffer;
 159         int i;
 160
 161 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
 162         int checksum;
 163         int usegdb=0;
 164
 165 #ifdef CONFIG_SH_STANDARD_BIOS
 166         /* This call only does a trap the first time it is
 167          * called, and so is safe to do here unconditionally
 168          */
 169         usegdb |= sh_bios_in_gdb_mode();
 170 #endif
 171 #ifdef CONFIG_SH_KGDB
 172         usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
 173 #endif
 174
 175         if (usegdb) {
 176             /*  $<packet info>#<checksum>. */
 177             do {
 178                 unsigned char c;
 179                 put_char(port, '$');
 180                 put_char(port, 'O'); /* 'O'utput to console */
 181                 checksum = 'O';
 182
 183                 for (i=0; i<count; i++) { /* Don't use run length encoding */
 184                         int h, l;
 185
 186                         c = *p++;
 187                         h = hex_asc_hi(c);
 188                         l = hex_asc_lo(c);
 189                         put_char(port, h);
 190                         put_char(port, l);
 191                         checksum += h + l;
 192                 }
 193                 put_char(port, '#');
 194                 put_char(port, hex_asc_hi(checksum));
 195                 put_char(port, hex_asc_lo(checksum));
 196             } while  (get_char(port) != '+');
 197         } else
 198 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
 199         for (i=0; i<count; i++) {
 200                 if (*p == 10)
 201                         put_char(port, '\r');
 202                 put_char(port, *p++);
 203         }
 204 }
 205 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
 206
 207 #ifdef CONFIG_SH_KGDB
 208 static int kgdb_sci_getchar(void)
 209 {
 210         int c;
 211
 212         /* Keep trying to read a character, this could be neater */
 213         while ((c = get_char(&kgdb_sci_port->port)) < 0)
 214                 cpu_relax();
 215
 216         return c;
 217 }
 218
 219 static inline void kgdb_sci_putchar(int c)
 220 {
 221         put_char(&kgdb_sci_port->port, c);
 222 }
 223 #endif /* CONFIG_SH_KGDB */
 224
 225 #if defined(__H8300S__)
 226 enum { sci_disable, sci_enable };
 227
 228 static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
 229 {
 230         volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
 231         int ch = (port->mapbase  - SMR0) >> 3;
 232         unsigned char mask = 1 << (ch+1);
 233
 234         if (ctrl == sci_disable) {
 235                 *mstpcrl |= mask;
 236         } else {
 237                 *mstpcrl &= ~mask;
 238         }
 239 }
 240
 241 static inline void h8300_sci_enable(struct uart_port *port)
 242 {
 243         h8300_sci_config(port, sci_enable);
 244 }
 245
 246 static inline void h8300_sci_disable(struct uart_port *port)
 247 {
 248         h8300_sci_config(port, sci_disable);
 249 }
 250 #endif
 251
 252 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
 253     defined(__H8300H__) || defined(__H8300S__)
 254 static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
 255 {
 256         int ch = (port->mapbase - SMR0) >> 3;
 257
 258         /* set DDR regs */
 259         H8300_GPIO_DDR(h8300_sci_pins[ch].port,
 260                        h8300_sci_pins[ch].rx,
 261                        H8300_GPIO_INPUT);
 262         H8300_GPIO_DDR(h8300_sci_pins[ch].port,
 263                        h8300_sci_pins[ch].tx,
 264                        H8300_GPIO_OUTPUT);
 265
 266         /* tx mark output*/
 267         H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
 268 }
 269 #else
 270 #define sci_init_pins_sci NULL
 271 #endif
 272
 273 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
 274 static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
 275 {
 276         unsigned int fcr_val = 0;
 277
 278         if (cflag & CRTSCTS)
 279                 fcr_val |= SCFCR_MCE;
 280
 281         sci_out(port, SCFCR, fcr_val);
 282 }
 283 #else
 284 #define sci_init_pins_irda NULL
 285 #endif
 286
 287 #ifdef SCI_ONLY
 288 #define sci_init_pins_scif NULL
 289 #endif
 290
 291 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
 292 #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
 293 static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
 294 {
 295         unsigned int fcr_val = 0;
 296
 297         set_sh771x_scif_pfc(port);
 298         if (cflag & CRTSCTS) {
 299                 fcr_val |= SCFCR_MCE;
 300         }
 301         sci_out(port, SCFCR, fcr_val);
 302 }
 303 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
 304 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 305 {
 306         unsigned int fcr_val = 0;
 307         unsigned short data;
 308
 309         if (cflag & CRTSCTS) {
 310                 /* enable RTS/CTS */
 311                 if (port->mapbase == 0xa4430000) { /* SCIF0 */
 312                         /* Clear PTCR bit 9-2; enable all scif pins but sck */
 313                         data = ctrl_inw(PORT_PTCR);
 314                         ctrl_outw((data & 0xfc03), PORT_PTCR);
 315                 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
 316                         /* Clear PVCR bit 9-2 */
 317                         data = ctrl_inw(PORT_PVCR);
 318                         ctrl_outw((data & 0xfc03), PORT_PVCR);
 319                 }
 320                 fcr_val |= SCFCR_MCE;
 321         } else {
 322                 if (port->mapbase == 0xa4430000) { /* SCIF0 */
 323                         /* Clear PTCR bit 5-2; enable only tx and rx  */
 324                         data = ctrl_inw(PORT_PTCR);
 325                         ctrl_outw((data & 0xffc3), PORT_PTCR);
 326                 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
 327                         /* Clear PVCR bit 5-2 */
 328                         data = ctrl_inw(PORT_PVCR);
 329                         ctrl_outw((data & 0xffc3), PORT_PVCR);
 330                 }
 331         }
 332         sci_out(port, SCFCR, fcr_val);
 333 }
 334 #elif defined(CONFIG_CPU_SH3)
 335 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
 336 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 337 {
 338         unsigned int fcr_val = 0;
 339         unsigned short data;
 340
 341         /* We need to set SCPCR to enable RTS/CTS */
 342         data = ctrl_inw(SCPCR);
 343         /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
 344         ctrl_outw(data & 0x0fcf, SCPCR);
 345
 346         if (cflag & CRTSCTS)
 347                 fcr_val |= SCFCR_MCE;
 348         else {
 349                 /* We need to set SCPCR to enable RTS/CTS */
 350                 data = ctrl_inw(SCPCR);
 351                 /* Clear out SCP7MD1,0, SCP4MD1,0,
 352                    Set SCP6MD1,0 = {01} (output)  */
 353                 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
 354
 355                 data = ctrl_inb(SCPDR);
 356                 /* Set /RTS2 (bit6) = 0 */
 357                 ctrl_outb(data & 0xbf, SCPDR);
 358         }
 359
 360         sci_out(port, SCFCR, fcr_val);
 361 }
 362 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
 363 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 364 {
 365         unsigned int fcr_val = 0;
 366         unsigned short data;
 367
 368         if (port->mapbase == 0xffe00000) {
 369                 data = ctrl_inw(PSCR);
 370                 data &= ~0x03cf;
 371                 if (cflag & CRTSCTS)
 372                         fcr_val |= SCFCR_MCE;
 373                 else
 374                         data |= 0x0340;
 375
 376                 ctrl_outw(data, PSCR);
 377         }
 378         /* SCIF1 and SCIF2 should be setup by board code */
 379
 380         sci_out(port, SCFCR, fcr_val);
 381 }
 382 #elif defined(CONFIG_CPU_SUBTYPE_SH7723)
 383 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 384 {
 385         /* Nothing to do here.. */
 386         sci_out(port, SCFCR, 0);
 387 }
 388 #else
 389 /* For SH7750 */
 390 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 391 {
 392         unsigned int fcr_val = 0;
 393
 394         if (cflag & CRTSCTS) {
 395                 fcr_val |= SCFCR_MCE;
 396         } else {
 397 #if defined(CONFIG_CPU_SUBTYPE_SH7343) || defined(CONFIG_CPU_SUBTYPE_SH7366)
 398                 /* Nothing */
 399 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
 400       defined(CONFIG_CPU_SUBTYPE_SH7780) || \
 401       defined(CONFIG_CPU_SUBTYPE_SH7785) || \
 402       defined(CONFIG_CPU_SUBTYPE_SHX3)
 403                 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
 404 #else
 405                 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
 406 #endif
 407         }
 408         sci_out(port, SCFCR, fcr_val);
 409 }
 410 #endif
 411
 412 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
 413     defined(CONFIG_CPU_SUBTYPE_SH7763) || \
 414     defined(CONFIG_CPU_SUBTYPE_SH7780) || \
 415     defined(CONFIG_CPU_SUBTYPE_SH7785)
 416 static inline int scif_txroom(struct uart_port *port)
 417 {
 418         return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff);
 419 }
 420
 421 static inline int scif_rxroom(struct uart_port *port)
 422 {
 423         return sci_in(port, SCRFDR) & 0xff;
 424 }
 425 #else
 426 static inline int scif_txroom(struct uart_port *port)
 427 {
 428         return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
 429 }
 430
 431 static inline int scif_rxroom(struct uart_port *port)
 432 {
 433         return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
 434 }
 435 #endif
 436 #endif /* SCIF_ONLY || SCI_AND_SCIF */
 437
 438 static inline int sci_txroom(struct uart_port *port)
 439 {
 440         return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
 441 }
 442
 443 static inline int sci_rxroom(struct uart_port *port)
 444 {
 445         return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
 446 }
 447
 448 /* ********************************************************************** *
 449  *                   the interrupt related routines                       *
 450  * ********************************************************************** */
 451
 452 static void sci_transmit_chars(struct uart_port *port)
 453 {
 454         struct circ_buf *xmit = &port->info->xmit;
 455         unsigned int stopped = uart_tx_stopped(port);
 456         unsigned short status;
 457         unsigned short ctrl;
 458         int count;
 459
 460         status = sci_in(port, SCxSR);
 461         if (!(status & SCxSR_TDxE(port))) {
 462                 ctrl = sci_in(port, SCSCR);
 463                 if (uart_circ_empty(xmit)) {
 464                         ctrl &= ~SCI_CTRL_FLAGS_TIE;
 465                 } else {
 466                         ctrl |= SCI_CTRL_FLAGS_TIE;
 467                 }
 468                 sci_out(port, SCSCR, ctrl);
 469                 return;
 470         }
 471
 472 #ifndef SCI_ONLY
 473         if (port->type == PORT_SCIF)
 474                 count = scif_txroom(port);
 475         else
 476 #endif
 477                 count = sci_txroom(port);
 478
 479         do {
 480                 unsigned char c;
 481
 482                 if (port->x_char) {
 483                         c = port->x_char;
 484                         port->x_char = 0;
 485                 } else if (!uart_circ_empty(xmit) && !stopped) {
 486                         c = xmit->buf[xmit->tail];
 487                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 488                 } else {
 489                         break;
 490                 }
 491
 492                 sci_out(port, SCxTDR, c);
 493
 494                 port->icount.tx++;
 495         } while (--count > 0);
 496
 497         sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
 498
 499         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 500                 uart_write_wakeup(port);
 501         if (uart_circ_empty(xmit)) {
 502                 sci_stop_tx(port);
 503         } else {
 504                 ctrl = sci_in(port, SCSCR);
 505
 506 #if !defined(SCI_ONLY)
 507                 if (port->type == PORT_SCIF) {
 508                         sci_in(port, SCxSR); /* Dummy read */
 509                         sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
 510                 }
 511 #endif
 512
 513                 ctrl |= SCI_CTRL_FLAGS_TIE;
 514                 sci_out(port, SCSCR, ctrl);
 515         }
 516 }
 517
 518 /* On SH3, SCIF may read end-of-break as a space->mark char */
 519 #define STEPFN(c)  ({int __c=(c); (((__c-1)|(__c)) == -1); })
 520
 521 static inline void sci_receive_chars(struct uart_port *port)
 522 {
 523         struct sci_port *sci_port = (struct sci_port *)port;
 524         struct tty_struct *tty = port->info->tty;
 525         int i, count, copied = 0;
 526         unsigned short status;
 527         unsigned char flag;
 528
 529         status = sci_in(port, SCxSR);
 530         if (!(status & SCxSR_RDxF(port)))
 531                 return;
 532
 533         while (1) {
 534 #if !defined(SCI_ONLY)
 535                 if (port->type == PORT_SCIF)
 536                         count = scif_rxroom(port);
 537                 else
 538 #endif
 539                         count = sci_rxroom(port);
 540
 541                 /* Don't copy more bytes than there is room for in the buffer */
 542                 count = tty_buffer_request_room(tty, count);
 543
 544                 /* If for any reason we can't copy more data, we're done! */
 545                 if (count == 0)
 546                         break;
 547
 548                 if (port->type == PORT_SCI) {
 549                         char c = sci_in(port, SCxRDR);
 550                         if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
 551                                 count = 0;
 552                         else {
 553                                 tty_insert_flip_char(tty, c, TTY_NORMAL);
 554                         }
 555                 } else {
 556                         for (i=0; i<count; i++) {
 557                                 char c = sci_in(port, SCxRDR);
 558                                 status = sci_in(port, SCxSR);
 559 #if defined(CONFIG_CPU_SH3)
 560                                 /* Skip "chars" during break */
 561                                 if (sci_port->break_flag) {
 562                                         if ((c == 0) &&
 563                                             (status & SCxSR_FER(port))) {
 564                                                 count--; i--;
 565                                                 continue;
 566                                         }
 567
 568                                         /* Nonzero => end-of-break */
 569                                         pr_debug("scif: debounce<%02x>\n", c);
 570                                         sci_port->break_flag = 0;
 571
 572                                         if (STEPFN(c)) {
 573                                                 count--; i--;
 574                                                 continue;
 575                                         }
 576                                 }
 577 #endif /* CONFIG_CPU_SH3 */
 578                                 if (uart_handle_sysrq_char(port, c)) {
 579                                         count--; i--;
 580                                         continue;
 581                                 }
 582
 583                                 /* Store data and status */
 584                                 if (status&SCxSR_FER(port)) {
 585                                         flag = TTY_FRAME;
 586                                         pr_debug("sci: frame error\n");
 587                                 } else if (status&SCxSR_PER(port)) {
 588                                         flag = TTY_PARITY;
 589                                         pr_debug("sci: parity error\n");
 590                                 } else
 591                                         flag = TTY_NORMAL;
 592                                 tty_insert_flip_char(tty, c, flag);
 593                         }
 594                 }
 595
 596                 sci_in(port, SCxSR); /* dummy read */
 597                 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
 598
 599                 copied += count;
 600                 port->icount.rx += count;
 601         }
 602
 603         if (copied) {
 604                 /* Tell the rest of the system the news. New characters! */
 605                 tty_flip_buffer_push(tty);
 606         } else {
 607                 sci_in(port, SCxSR); /* dummy read */
 608                 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
 609         }
 610 }
 611
 612 #define SCI_BREAK_JIFFIES (HZ/20)
 613 /* The sci generates interrupts during the break,
 614  * 1 per millisecond or so during the break period, for 9600 baud.
 615  * So dont bother disabling interrupts.
 616  * But dont want more than 1 break event.
 617  * Use a kernel timer to periodically poll the rx line until
 618  * the break is finished.
 619  */
 620 static void sci_schedule_break_timer(struct sci_port *port)
 621 {
 622         port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
 623         add_timer(&port->break_timer);
 624 }
 625 /* Ensure that two consecutive samples find the break over. */
 626 static void sci_break_timer(unsigned long data)
 627 {
 628         struct sci_port *port = (struct sci_port *)data;
 629
 630         if (sci_rxd_in(&port->port) == 0) {
 631                 port->break_flag = 1;
 632                 sci_schedule_break_timer(port);
 633         } else if (port->break_flag == 1) {
 634                 /* break is over. */
 635                 port->break_flag = 2;
 636                 sci_schedule_break_timer(port);
 637         } else
 638                 port->break_flag = 0;
 639 }
 640
 641 static inline int sci_handle_errors(struct uart_port *port)
 642 {
 643         int copied = 0;
 644         unsigned short status = sci_in(port, SCxSR);
 645         struct tty_struct *tty = port->info->tty;
 646
 647         if (status & SCxSR_ORER(port)) {
 648                 /* overrun error */
 649                 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
 650                         copied++;
 651                 pr_debug("sci: overrun error\n");
 652         }
 653
 654         if (status & SCxSR_FER(port)) {
 655                 if (sci_rxd_in(port) == 0) {
 656                         /* Notify of BREAK */
 657                         struct sci_port *sci_port = (struct sci_port *)port;
 658
 659                         if (!sci_port->break_flag) {
 660                                 sci_port->break_flag = 1;
 661                                 sci_schedule_break_timer(sci_port);
 662
 663                                 /* Do sysrq handling. */
 664                                 if (uart_handle_break(port))
 665                                         return 0;
 666                                 pr_debug("sci: BREAK detected\n");
 667                                 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
 668                                         copied++;
 669                        }
 670                 } else {
 671                         /* frame error */
 672                         if (tty_insert_flip_char(tty, 0, TTY_FRAME))
 673                                 copied++;
 674                         pr_debug("sci: frame error\n");
 675                 }
 676         }
 677
 678         if (status & SCxSR_PER(port)) {
 679                 /* parity error */
 680                 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
 681                         copied++;
 682                 pr_debug("sci: parity error\n");
 683         }
 684
 685         if (copied)
 686                 tty_flip_buffer_push(tty);
 687
 688         return copied;
 689 }
 690
 691 static inline int sci_handle_breaks(struct uart_port *port)
 692 {
 693         int copied = 0;
 694         unsigned short status = sci_in(port, SCxSR);
 695         struct tty_struct *tty = port->info->tty;
 696         struct sci_port *s = &sci_ports[port->line];
 697
 698         if (uart_handle_break(port))
 699                 return 0;
 700
 701         if (!s->break_flag && status & SCxSR_BRK(port)) {
 702 #if defined(CONFIG_CPU_SH3)
 703                 /* Debounce break */
 704                 s->break_flag = 1;
 705 #endif
 706                 /* Notify of BREAK */
 707                 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
 708                         copied++;
 709                 pr_debug("sci: BREAK detected\n");
 710         }
 711
 712 #if defined(SCIF_ORER)
 713         /* XXX: Handle SCIF overrun error */
 714         if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
 715                 sci_out(port, SCLSR, 0);
 716                 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
 717                         copied++;
 718                         pr_debug("sci: overrun error\n");
 719                 }
 720         }
 721 #endif
 722
 723         if (copied)
 724                 tty_flip_buffer_push(tty);
 725
 726         return copied;
 727 }
 728
 729 static irqreturn_t sci_rx_interrupt(int irq, void *port)
 730 {
 731         /* I think sci_receive_chars has to be called irrespective
 732          * of whether the I_IXOFF is set, otherwise, how is the interrupt
 733          * to be disabled?
 734          */
 735         sci_receive_chars(port);
 736
 737         return IRQ_HANDLED;
 738 }
 739
 740 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
 741 {
 742         struct uart_port *port = ptr;
 743
 744         spin_lock_irq(&port->lock);
 745         sci_transmit_chars(port);
 746         spin_unlock_irq(&port->lock);
 747
 748         return IRQ_HANDLED;
 749 }
 750
 751 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
 752 {
 753         struct uart_port *port = ptr;
 754
 755         /* Handle errors */
 756         if (port->type == PORT_SCI) {
 757                 if (sci_handle_errors(port)) {
 758                         /* discard character in rx buffer */
 759                         sci_in(port, SCxSR);
 760                         sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
 761                 }
 762         } else {
 763 #if defined(SCIF_ORER)
 764                 if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
 765                         struct tty_struct *tty = port->info->tty;
 766
 767                         sci_out(port, SCLSR, 0);
 768                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 769                         tty_flip_buffer_push(tty);
 770                         pr_debug("scif: overrun error\n");
 771                 }
 772 #endif
 773                 sci_rx_interrupt(irq, ptr);
 774         }
 775
 776         sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
 777
 778         /* Kick the transmission */
 779         sci_tx_interrupt(irq, ptr);
 780
 781         return IRQ_HANDLED;
 782 }
 783
 784 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
 785 {
 786         struct uart_port *port = ptr;
 787
 788         /* Handle BREAKs */
 789         sci_handle_breaks(port);
 790         sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
 791
 792         return IRQ_HANDLED;
 793 }
 794
 795 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
 796 {
 797         unsigned short ssr_status, scr_status;
 798         struct uart_port *port = ptr;
 799
 800         ssr_status = sci_in(port,SCxSR);
 801         scr_status = sci_in(port,SCSCR);
 802
 803         /* Tx Interrupt */
 804         if ((ssr_status & 0x0020) && (scr_status & 0x0080))
 805                 sci_tx_interrupt(irq, ptr);
 806         /* Rx Interrupt */
 807         if ((ssr_status & 0x0002) && (scr_status & 0x0040))
 808                 sci_rx_interrupt(irq, ptr);
 809         /* Error Interrupt */
 810         if ((ssr_status & 0x0080) && (scr_status & 0x0400))
 811                 sci_er_interrupt(irq, ptr);
 812         /* Break Interrupt */
 813         if ((ssr_status & 0x0010) && (scr_status & 0x0200))
 814                 sci_br_interrupt(irq, ptr);
 815
 816         return IRQ_HANDLED;
 817 }
 818
 819 #ifdef CONFIG_CPU_FREQ
 820 /*
 821  * Here we define a transistion notifier so that we can update all of our
 822  * ports' baud rate when the peripheral clock changes.
 823  */
 824 static int sci_notifier(struct notifier_block *self,
 825                         unsigned long phase, void *p)
 826 {
 827         struct cpufreq_freqs *freqs = p;
 828         int i;
 829
 830         if ((phase == CPUFREQ_POSTCHANGE) ||
 831             (phase == CPUFREQ_RESUMECHANGE)){
 832                 for (i = 0; i < SCI_NPORTS; i++) {
 833                         struct uart_port *port = &sci_ports[i].port;
 834                         struct clk *clk;
 835
 836                         /*
 837                          * Update the uartclk per-port if frequency has
 838                          * changed, since it will no longer necessarily be
 839                          * consistent with the old frequency.
 840                          *
 841                          * Really we want to be able to do something like
 842                          * uart_change_speed() or something along those lines
 843                          * here to implicitly reset the per-port baud rate..
 844                          *
 845                          * Clean this up later..
 846                          */
 847                         clk = clk_get(NULL, "module_clk");
 848                         port->uartclk = clk_get_rate(clk) * 16;
 849                         clk_put(clk);
 850                 }
 851
 852                 printk(KERN_INFO "%s: got a postchange notification "
 853                        "for cpu %d (old %d, new %d)\n",
 854                        __func__, freqs->cpu, freqs->old, freqs->new);
 855         }
 856
 857         return NOTIFY_OK;
 858 }
 859
 860 static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
 861 #endif /* CONFIG_CPU_FREQ */
 862
 863 static int sci_request_irq(struct sci_port *port)
 864 {
 865         int i;
 866         irqreturn_t (*handlers[4])(int irq, void *ptr) = {
 867                 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
 868                 sci_br_interrupt,
 869         };
 870         const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
 871                                "SCI Transmit Data Empty", "SCI Break" };
 872
 873         if (port->irqs[0] == port->irqs[1]) {
 874                 if (!port->irqs[0]) {
 875                         printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
 876                         return -ENODEV;
 877                 }
 878
 879                 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
 880                                 IRQF_DISABLED, "sci", port)) {
 881                         printk(KERN_ERR "sci: Cannot allocate irq.\n");
 882                         return -ENODEV;
 883                 }
 884         } else {
 885                 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
 886                         if (!port->irqs[i])
 887                                 continue;
 888                         if (request_irq(port->irqs[i], handlers[i],
 889                                         IRQF_DISABLED, desc[i], port)) {
 890                                 printk(KERN_ERR "sci: Cannot allocate irq.\n");
 891                                 return -ENODEV;
 892                         }
 893                 }
 894         }
 895
 896         return 0;
 897 }
 898
 899 static void sci_free_irq(struct sci_port *port)
 900 {
 901         int i;
 902
 903         if (port->irqs[0] == port->irqs[1]) {
 904                 if (!port->irqs[0])
 905                         printk("sci: sci_free_irq error\n");
 906                 else
 907                         free_irq(port->irqs[0], port);
 908         } else {
 909                 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
 910                         if (!port->irqs[i])
 911                                 continue;
 912
 913                         free_irq(port->irqs[i], port);
 914                 }
 915         }
 916 }
 917
 918 static unsigned int sci_tx_empty(struct uart_port *port)
 919 {
 920         /* Can't detect */
 921         return TIOCSER_TEMT;
 922 }
 923
 924 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
 925 {
 926         /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
 927         /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
 928         /* If you have signals for DTR and DCD, please implement here. */
 929 }
 930
 931 static unsigned int sci_get_mctrl(struct uart_port *port)
 932 {
 933         /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
 934            and CTS/RTS */
 935
 936         return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
 937 }
 938
 939 static void sci_start_tx(struct uart_port *port)
 940 {
 941         unsigned short ctrl;
 942
 943         /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
 944         ctrl = sci_in(port, SCSCR);
 945         ctrl |= SCI_CTRL_FLAGS_TIE;
 946         sci_out(port, SCSCR, ctrl);
 947 }
 948
 949 static void sci_stop_tx(struct uart_port *port)
 950 {
 951         unsigned short ctrl;
 952
 953         /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
 954         ctrl = sci_in(port, SCSCR);
 955         ctrl &= ~SCI_CTRL_FLAGS_TIE;
 956         sci_out(port, SCSCR, ctrl);
 957 }
 958
 959 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
 960 {
 961         unsigned short ctrl;
 962
 963         /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
 964         ctrl = sci_in(port, SCSCR);
 965         ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
 966         sci_out(port, SCSCR, ctrl);
 967 }
 968
 969 static void sci_stop_rx(struct uart_port *port)
 970 {
 971         unsigned short ctrl;
 972
 973         /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
 974         ctrl = sci_in(port, SCSCR);
 975         ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
 976         sci_out(port, SCSCR, ctrl);
 977 }
 978
 979 static void sci_enable_ms(struct uart_port *port)
 980 {
 981         /* Nothing here yet .. */
 982 }
 983
 984 static void sci_break_ctl(struct uart_port *port, int break_state)
 985 {
 986         /* Nothing here yet .. */
 987 }
 988
 989 static int sci_startup(struct uart_port *port)
 990 {
 991         struct sci_port *s = &sci_ports[port->line];
 992
 993         if (s->enable)
 994                 s->enable(port);
 995
 996 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
 997         s->clk = clk_get(NULL, "module_clk");
 998 #endif
 999
1000         sci_request_irq(s);
1001         sci_start_tx(port);
1002         sci_start_rx(port, 1);
1003
1004         return 0;
1005 }
1006
1007 static void sci_shutdown(struct uart_port *port)
1008 {
1009         struct sci_port *s = &sci_ports[port->line];
1010
1011         sci_stop_rx(port);
1012         sci_stop_tx(port);
1013         sci_free_irq(s);
1014
1015         if (s->disable)
1016                 s->disable(port);
1017
1018 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1019         clk_put(s->clk);
1020         s->clk = NULL;
1021 #endif
1022 }
1023
1024 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1025                             struct ktermios *old)
1026 {
1027         struct sci_port *s = &sci_ports[port->line];
1028         unsigned int status, baud, smr_val;
1029         int t;
1030
1031         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1032
1033         switch (baud) {
1034                 case 0:
1035                         t = -1;
1036                         break;
1037                 default:
1038                 {
1039 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1040                         t = SCBRR_VALUE(baud, clk_get_rate(s->clk));
1041 #else
1042                         t = SCBRR_VALUE(baud);
1043 #endif
1044                         break;
1045                 }
1046         }
1047
1048         do {
1049                 status = sci_in(port, SCxSR);
1050         } while (!(status & SCxSR_TEND(port)));
1051
1052         sci_out(port, SCSCR, 0x00);     /* TE=0, RE=0, CKE1=0 */
1053
1054 #if !defined(SCI_ONLY)
1055         if (port->type == PORT_SCIF)
1056                 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1057 #endif
1058
1059         smr_val = sci_in(port, SCSMR) & 3;
1060         if ((termios->c_cflag & CSIZE) == CS7)
1061                 smr_val |= 0x40;
1062         if (termios->c_cflag & PARENB)
1063                 smr_val |= 0x20;
1064         if (termios->c_cflag & PARODD)
1065                 smr_val |= 0x30;
1066         if (termios->c_cflag & CSTOPB)
1067                 smr_val |= 0x08;
1068
1069         uart_update_timeout(port, termios->c_cflag, baud);
1070
1071         sci_out(port, SCSMR, smr_val);
1072
1073         if (t > 0) {
1074                 if(t >= 256) {
1075                         sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1076                         t >>= 2;
1077                 } else {
1078                         sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1079                 }
1080                 sci_out(port, SCBRR, t);
1081                 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1082         }
1083
1084         if (likely(s->init_pins))
1085                 s->init_pins(port, termios->c_cflag);
1086
1087         sci_out(port, SCSCR, SCSCR_INIT(port));
1088
1089         if ((termios->c_cflag & CREAD) != 0)
1090               sci_start_rx(port,0);
1091 }
1092
1093 static const char *sci_type(struct uart_port *port)
1094 {
1095         switch (port->type) {
1096                 case PORT_SCI:  return "sci";
1097                 case PORT_SCIF: return "scif";
1098                 case PORT_IRDA: return "irda";
1099         }
1100
1101         return 0;
1102 }
1103
1104 static void sci_release_port(struct uart_port *port)
1105 {
1106         /* Nothing here yet .. */
1107 }
1108
1109 static int sci_request_port(struct uart_port *port)
1110 {
1111         /* Nothing here yet .. */
1112         return 0;
1113 }
1114
1115 static void sci_config_port(struct uart_port *port, int flags)
1116 {
1117         struct sci_port *s = &sci_ports[port->line];
1118
1119         port->type = s->type;
1120
1121         switch (port->type) {
1122         case PORT_SCI:
1123                 s->init_pins = sci_init_pins_sci;
1124                 break;
1125         case PORT_SCIF:
1126                 s->init_pins = sci_init_pins_scif;
1127                 break;
1128         case PORT_IRDA:
1129                 s->init_pins = sci_init_pins_irda;
1130                 break;
1131         }
1132
1133 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1134         if (port->mapbase == 0)
1135                 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1136
1137         port->membase = (void __iomem *)port->mapbase;
1138 #endif
1139 }
1140
1141 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1142 {
1143         struct sci_port *s = &sci_ports[port->line];
1144
1145         if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
1146                 return -EINVAL;
1147         if (ser->baud_base < 2400)
1148                 /* No paper tape reader for Mitch.. */
1149                 return -EINVAL;
1150
1151         return 0;
1152 }
1153
1154 static struct uart_ops sci_uart_ops = {
1155         .tx_empty       = sci_tx_empty,
1156         .set_mctrl      = sci_set_mctrl,
1157         .get_mctrl      = sci_get_mctrl,
1158         .start_tx       = sci_start_tx,
1159         .stop_tx        = sci_stop_tx,
1160         .stop_rx        = sci_stop_rx,
1161         .enable_ms      = sci_enable_ms,
1162         .break_ctl      = sci_break_ctl,
1163         .startup        = sci_startup,
1164         .shutdown       = sci_shutdown,
1165         .set_termios    = sci_set_termios,
1166         .type           = sci_type,
1167         .release_port   = sci_release_port,
1168         .request_port   = sci_request_port,
1169         .config_port    = sci_config_port,
1170         .verify_port    = sci_verify_port,
1171 };
1172
1173 static void __init sci_init_ports(void)
1174 {
1175         static int first = 1;
1176         int i;
1177
1178         if (!first)
1179                 return;
1180
1181         first = 0;
1182
1183         for (i = 0; i < SCI_NPORTS; i++) {
1184                 sci_ports[i].port.ops           = &sci_uart_ops;
1185                 sci_ports[i].port.iotype        = UPIO_MEM;
1186                 sci_ports[i].port.line          = i;
1187                 sci_ports[i].port.fifosize      = 1;
1188
1189 #if defined(__H8300H__) || defined(__H8300S__)
1190 #ifdef __H8300S__
1191                 sci_ports[i].enable     = h8300_sci_enable;
1192                 sci_ports[i].disable    = h8300_sci_disable;
1193 #endif
1194                 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1195 #elif defined(CONFIG_SUPERH64)
1196                 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1197 #else
1198                 /*
1199                  * XXX: We should use a proper SCI/SCIF clock
1200                  */
1201                 {
1202                         struct clk *clk = clk_get(NULL, "module_clk");
1203                         sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1204                         clk_put(clk);
1205                 }
1206 #endif
1207
1208                 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1209                 sci_ports[i].break_timer.function = sci_break_timer;
1210
1211                 init_timer(&sci_ports[i].break_timer);
1212         }
1213 }
1214
1215 int __init early_sci_setup(struct uart_port *port)
1216 {
1217         if (unlikely(port->line > SCI_NPORTS))
1218                 return -ENODEV;
1219
1220         sci_init_ports();
1221
1222         sci_ports[port->line].port.membase      = port->membase;
1223         sci_ports[port->line].port.mapbase      = port->mapbase;
1224         sci_ports[port->line].port.type         = port->type;
1225
1226         return 0;
1227 }
1228
1229 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1230 /*
1231  *      Print a string to the serial port trying not to disturb
1232  *      any possible real use of the port...
1233  */
1234 static void serial_console_write(struct console *co, const char *s,
1235                                  unsigned count)
1236 {
1237         put_string(serial_console_port, s, count);
1238 }
1239
1240 static int __init serial_console_setup(struct console *co, char *options)
1241 {
1242         struct uart_port *port;
1243         int baud = 115200;
1244         int bits = 8;
1245         int parity = 'n';
1246         int flow = 'n';
1247         int ret;
1248
1249         /*
1250          * Check whether an invalid uart number has been specified, and
1251          * if so, search for the first available port that does have
1252          * console support.
1253          */
1254         if (co->index >= SCI_NPORTS)
1255                 co->index = 0;
1256
1257         serial_console_port = &sci_ports[co->index];
1258         port = &serial_console_port->port;
1259
1260         /*
1261          * Also need to check port->type, we don't actually have any
1262          * UPIO_PORT ports, but uart_report_port() handily misreports
1263          * it anyways if we don't have a port available by the time this is
1264          * called.
1265          */
1266         if (!port->type)
1267                 return -ENODEV;
1268         if (!port->membase || !port->mapbase)
1269                 return -ENODEV;
1270
1271         port->type = serial_console_port->type;
1272
1273 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1274         if (!serial_console_port->clk)
1275                 serial_console_port->clk = clk_get(NULL, "module_clk");
1276 #endif
1277
1278         if (port->flags & UPF_IOREMAP)
1279                 sci_config_port(port, 0);
1280
1281         if (serial_console_port->enable)
1282                 serial_console_port->enable(port);
1283
1284         if (options)
1285                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1286
1287         ret = uart_set_options(port, co, baud, parity, bits, flow);
1288 #if defined(__H8300H__) || defined(__H8300S__)
1289         /* disable rx interrupt */
1290         if (ret == 0)
1291                 sci_stop_rx(port);
1292 #endif
1293         return ret;
1294 }
1295
1296 static struct console serial_console = {
1297         .name           = "ttySC",
1298         .device         = uart_console_device,
1299         .write          = serial_console_write,
1300         .setup          = serial_console_setup,
1301         .flags          = CON_PRINTBUFFER,
1302         .index          = -1,
1303         .data           = &sci_uart_driver,
1304 };
1305
1306 static int __init sci_console_init(void)
1307 {
1308         sci_init_ports();
1309         register_console(&serial_console);
1310         return 0;
1311 }
1312 console_initcall(sci_console_init);
1313 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1314
1315 #ifdef CONFIG_SH_KGDB_CONSOLE
1316 /*
1317  * FIXME: Most of this can go away.. at the moment, we rely on
1318  * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1319  * most of that can easily be done here instead.
1320  *
1321  * For the time being, just accept the values that were parsed earlier..
1322  */
1323 static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
1324                                             int *parity, int *bits)
1325 {
1326         *baud = kgdb_baud;
1327         *parity = tolower(kgdb_parity);
1328         *bits = kgdb_bits - '0';
1329 }
1330
1331 /*
1332  * The naming here is somewhat misleading, since kgdb_console_setup() takes
1333  * care of the early-on initialization for kgdb, regardless of whether we
1334  * actually use kgdb as a console or not.
1335  *
1336  * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1337  */
1338 int __init kgdb_console_setup(struct console *co, char *options)
1339 {
1340         struct uart_port *port = &sci_ports[kgdb_portnum].port;
1341         int baud = 38400;
1342         int bits = 8;
1343         int parity = 'n';
1344         int flow = 'n';
1345
1346         if (co->index != kgdb_portnum)
1347                 co->index = kgdb_portnum;
1348
1349         kgdb_sci_port = &sci_ports[co->index];
1350         port = &kgdb_sci_port->port;
1351
1352         /*
1353          * Also need to check port->type, we don't actually have any
1354          * UPIO_PORT ports, but uart_report_port() handily misreports
1355          * it anyways if we don't have a port available by the time this is
1356          * called.
1357          */
1358         if (!port->type)
1359                 return -ENODEV;
1360         if (!port->membase || !port->mapbase)
1361                 return -ENODEV;
1362
1363         if (options)
1364                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1365         else
1366                 kgdb_console_get_options(port, &baud, &parity, &bits);
1367
1368         kgdb_getchar = kgdb_sci_getchar;
1369         kgdb_putchar = kgdb_sci_putchar;
1370
1371         return uart_set_options(port, co, baud, parity, bits, flow);
1372 }
1373
1374 static struct console kgdb_console = {
1375         .name           = "ttySC",
1376         .device         = uart_console_device,
1377         .write          = kgdb_console_write,
1378         .setup          = kgdb_console_setup,
1379         .flags          = CON_PRINTBUFFER,
1380         .index          = -1,
1381         .data           = &sci_uart_driver,
1382 };
1383
1384 /* Register the KGDB console so we get messages (d'oh!) */
1385 static int __init kgdb_console_init(void)
1386 {
1387         sci_init_ports();
1388         register_console(&kgdb_console);
1389         return 0;
1390 }
1391 console_initcall(kgdb_console_init);
1392 #endif /* CONFIG_SH_KGDB_CONSOLE */
1393
1394 #if defined(CONFIG_SH_KGDB_CONSOLE)
1395 #define SCI_CONSOLE     &kgdb_console
1396 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1397 #define SCI_CONSOLE     &serial_console
1398 #else
1399 #define SCI_CONSOLE     0
1400 #endif
1401
1402 static char banner[] __initdata =
1403         KERN_INFO "SuperH SCI(F) driver initialized\n";
1404
1405 static struct uart_driver sci_uart_driver = {
1406         .owner          = THIS_MODULE,
1407         .driver_name    = "sci",
1408         .dev_name       = "ttySC",
1409         .major          = SCI_MAJOR,
1410         .minor          = SCI_MINOR_START,
1411         .nr             = SCI_NPORTS,
1412         .cons           = SCI_CONSOLE,
1413 };
1414
1415 /*
1416  * Register a set of serial devices attached to a platform device.  The
1417  * list is terminated with a zero flags entry, which means we expect
1418  * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1419  * remapping (such as sh64) should also set UPF_IOREMAP.
1420  */
1421 static int __devinit sci_probe(struct platform_device *dev)
1422 {
1423         struct plat_sci_port *p = dev->dev.platform_data;
1424         int i;
1425
1426         for (i = 0; p && p->flags != 0; p++, i++) {
1427                 struct sci_port *sciport = &sci_ports[i];
1428
1429                 /* Sanity check */
1430                 if (unlikely(i == SCI_NPORTS)) {
1431                         dev_notice(&dev->dev, "Attempting to register port "
1432                                    "%d when only %d are available.\n",
1433                                    i+1, SCI_NPORTS);
1434                         dev_notice(&dev->dev, "Consider bumping "
1435                                    "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1436                         break;
1437                 }
1438
1439                 sciport->port.mapbase   = p->mapbase;
1440
1441                 /*
1442                  * For the simple (and majority of) cases where we don't need
1443                  * to do any remapping, just cast the cookie directly.
1444                  */
1445                 if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
1446                         p->membase = (void __iomem *)p->mapbase;
1447
1448                 sciport->port.membase   = p->membase;
1449
1450                 sciport->port.irq       = p->irqs[SCIx_TXI_IRQ];
1451                 sciport->port.flags     = p->flags;
1452                 sciport->port.dev       = &dev->dev;
1453
1454                 sciport->type           = sciport->port.type = p->type;
1455
1456                 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1457
1458                 uart_add_one_port(&sci_uart_driver, &sciport->port);
1459         }
1460
1461 #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1462         kgdb_sci_port   = &sci_ports[kgdb_portnum];
1463         kgdb_getchar    = kgdb_sci_getchar;
1464         kgdb_putchar    = kgdb_sci_putchar;
1465 #endif
1466
1467 #ifdef CONFIG_CPU_FREQ
1468         cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1469         dev_info(&dev->dev, "CPU frequency notifier registered\n");
1470 #endif
1471
1472 #ifdef CONFIG_SH_STANDARD_BIOS
1473         sh_bios_gdb_detach();
1474 #endif
1475
1476         return 0;
1477 }
1478
1479 static int __devexit sci_remove(struct platform_device *dev)
1480 {
1481         int i;
1482
1483         for (i = 0; i < SCI_NPORTS; i++)
1484                 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1485
1486         return 0;
1487 }
1488
1489 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1490 {
1491         int i;
1492
1493         for (i = 0; i < SCI_NPORTS; i++) {
1494                 struct sci_port *p = &sci_ports[i];
1495
1496                 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1497                         uart_suspend_port(&sci_uart_driver, &p->port);
1498         }
1499
1500         return 0;
1501 }
1502
1503 static int sci_resume(struct platform_device *dev)
1504 {
1505         int i;
1506
1507         for (i = 0; i < SCI_NPORTS; i++) {
1508                 struct sci_port *p = &sci_ports[i];
1509
1510                 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1511                         uart_resume_port(&sci_uart_driver, &p->port);
1512         }
1513
1514         return 0;
1515 }
1516
1517 static struct platform_driver sci_driver = {
1518         .probe          = sci_probe,
1519         .remove         = __devexit_p(sci_remove),
1520         .suspend        = sci_suspend,
1521         .resume         = sci_resume,
1522         .driver         = {
1523                 .name   = "sh-sci",
1524                 .owner  = THIS_MODULE,
1525         },
1526 };
1527
1528 static int __init sci_init(void)
1529 {
1530         int ret;
1531
1532         printk(banner);
1533
1534         sci_init_ports();
1535
1536         ret = uart_register_driver(&sci_uart_driver);
1537         if (likely(ret == 0)) {
1538                 ret = platform_driver_register(&sci_driver);
1539                 if (unlikely(ret))
1540                         uart_unregister_driver(&sci_uart_driver);
1541         }
1542
1543         return ret;
1544 }
1545
1546 static void __exit sci_exit(void)
1547 {
1548         platform_driver_unregister(&sci_driver);
1549         uart_unregister_driver(&sci_uart_driver);
1550 }
1551
1552 module_init(sci_init);
1553 module_exit(sci_exit);
1554
1555 MODULE_LICENSE("GPL");
1556 MODULE_ALIAS("platform:sh-sci");