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smsc911x: leave RX_STOP interrupt permanently enabled
[linux-2.6/mini2440.git] / drivers / net / smsc911x.c
blobaaf0b4314ce24c5dfc1b4c566cca2f97830c51c9
1 /***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
23 *
24 * Supported devices:
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
27 * LAN9210, LAN9211
28 * LAN9220, LAN9221
29 *
30 */
31
32 #include <linux/crc32.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
35 #include <linux/etherdevice.h>
36 #include <linux/ethtool.h>
37 #include <linux/init.h>
38 #include <linux/ioport.h>
39 #include <linux/kernel.h>
40 #include <linux/module.h>
41 #include <linux/netdevice.h>
42 #include <linux/platform_device.h>
43 #include <linux/sched.h>
44 #include <linux/slab.h>
45 #include <linux/timer.h>
46 #include <linux/version.h>
47 #include <linux/bug.h>
48 #include <linux/bitops.h>
49 #include <linux/irq.h>
50 #include <linux/io.h>
51 #include <linux/phy.h>
52 #include <linux/smsc911x.h>
53 #include "smsc911x.h"
54
55 #define SMSC_CHIPNAME "smsc911x"
56 #define SMSC_MDIONAME "smsc911x-mdio"
57 #define SMSC_DRV_VERSION "2008-10-21"
58
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(SMSC_DRV_VERSION);
61
62 #if USE_DEBUG > 0
63 static int debug = 16;
64 #else
65 static int debug = 3;
66 #endif
67
68 module_param(debug, int, 0);
69 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
70
71 struct smsc911x_data {
72 void __iomem *ioaddr;
73
74 unsigned int idrev;
75
76 /* used to decide which workarounds apply */
77 unsigned int generation;
78
79 /* device configuration (copied from platform_data during probe) */
80 struct smsc911x_platform_config config;
81
82 /* This needs to be acquired before calling any of below:
83 * smsc911x_mac_read(), smsc911x_mac_write()
84 */
85 spinlock_t mac_lock;
86
87 /* spinlock to ensure 16-bit accesses are serialised.
88 * unused with a 32-bit bus */
89 spinlock_t dev_lock;
90
91 struct phy_device *phy_dev;
92 struct mii_bus *mii_bus;
93 int phy_irq[PHY_MAX_ADDR];
94 unsigned int using_extphy;
95 int last_duplex;
96 int last_carrier;
97
98 u32 msg_enable;
99 unsigned int gpio_setting;
100 unsigned int gpio_orig_setting;
101 struct net_device *dev;
102 struct napi_struct napi;
103
104 unsigned int software_irq_signal;
105
106 #ifdef USE_PHY_WORK_AROUND
107 #define MIN_PACKET_SIZE (64)
108 char loopback_tx_pkt[MIN_PACKET_SIZE];
109 char loopback_rx_pkt[MIN_PACKET_SIZE];
110 unsigned int resetcount;
111 #endif
112
113 /* Members for Multicast filter workaround */
114 unsigned int multicast_update_pending;
115 unsigned int set_bits_mask;
116 unsigned int clear_bits_mask;
117 unsigned int hashhi;
118 unsigned int hashlo;
119 };
120
121 /* The 16-bit access functions are significantly slower, due to the locking
122 * necessary. If your bus hardware can be configured to do this for you
123 * (in response to a single 32-bit operation from software), you should use
124 * the 32-bit access functions instead. */
125
126 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
127 {
128 if (pdata->config.flags & SMSC911X_USE_32BIT)
129 return readl(pdata->ioaddr + reg);
130
131 if (pdata->config.flags & SMSC911X_USE_16BIT) {
132 u32 data;
133 unsigned long flags;
134
135 /* these two 16-bit reads must be performed consecutively, so
136 * must not be interrupted by our own ISR (which would start
137 * another read operation) */
138 spin_lock_irqsave(&pdata->dev_lock, flags);
139 data = ((readw(pdata->ioaddr + reg) & 0xFFFF) |
140 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
141 spin_unlock_irqrestore(&pdata->dev_lock, flags);
142
143 return data;
144 }
145
146 BUG();
147 return 0;
148 }
149
150 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
151 u32 val)
152 {
153 if (pdata->config.flags & SMSC911X_USE_32BIT) {
154 writel(val, pdata->ioaddr + reg);
155 return;
156 }
157
158 if (pdata->config.flags & SMSC911X_USE_16BIT) {
159 unsigned long flags;
160
161 /* these two 16-bit writes must be performed consecutively, so
162 * must not be interrupted by our own ISR (which would start
163 * another read operation) */
164 spin_lock_irqsave(&pdata->dev_lock, flags);
165 writew(val & 0xFFFF, pdata->ioaddr + reg);
166 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
167 spin_unlock_irqrestore(&pdata->dev_lock, flags);
168 return;
169 }
170
171 BUG();
172 }
173
174 /* Writes a packet to the TX_DATA_FIFO */
175 static inline void
176 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
177 unsigned int wordcount)
178 {
179 if (pdata->config.flags & SMSC911X_USE_32BIT) {
180 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
181 return;
182 }
183
184 if (pdata->config.flags & SMSC911X_USE_16BIT) {
185 while (wordcount--)
186 smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
187 return;
188 }
189
190 BUG();
191 }
192
193 /* Reads a packet out of the RX_DATA_FIFO */
194 static inline void
195 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
196 unsigned int wordcount)
197 {
198 if (pdata->config.flags & SMSC911X_USE_32BIT) {
199 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
200 return;
201 }
202
203 if (pdata->config.flags & SMSC911X_USE_16BIT) {
204 while (wordcount--)
205 *buf++ = smsc911x_reg_read(pdata, RX_DATA_FIFO);
206 return;
207 }
208
209 BUG();
210 }
211
212 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
213 * and smsc911x_mac_write, so assumes mac_lock is held */
214 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
215 {
216 int i;
217 u32 val;
218
219 SMSC_ASSERT_MAC_LOCK(pdata);
220
221 for (i = 0; i < 40; i++) {
222 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
223 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
224 return 0;
225 }
226 SMSC_WARNING(HW, "Timed out waiting for MAC not BUSY. "
227 "MAC_CSR_CMD: 0x%08X", val);
228 return -EIO;
229 }
230
231 /* Fetches a MAC register value. Assumes mac_lock is acquired */
232 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
233 {
234 unsigned int temp;
235
236 SMSC_ASSERT_MAC_LOCK(pdata);
237
238 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
239 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
240 SMSC_WARNING(HW, "MAC busy at entry");
241 return 0xFFFFFFFF;
242 }
243
244 /* Send the MAC cmd */
245 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
246 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
247
248 /* Workaround for hardware read-after-write restriction */
249 temp = smsc911x_reg_read(pdata, BYTE_TEST);
250
251 /* Wait for the read to complete */
252 if (likely(smsc911x_mac_complete(pdata) == 0))
253 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
254
255 SMSC_WARNING(HW, "MAC busy after read");
256 return 0xFFFFFFFF;
257 }
258
259 /* Set a mac register, mac_lock must be acquired before calling */
260 static void smsc911x_mac_write(struct smsc911x_data *pdata,
261 unsigned int offset, u32 val)
262 {
263 unsigned int temp;
264
265 SMSC_ASSERT_MAC_LOCK(pdata);
266
267 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
268 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
269 SMSC_WARNING(HW,
270 "smsc911x_mac_write failed, MAC busy at entry");
271 return;
272 }
273
274 /* Send data to write */
275 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
276
277 /* Write the actual data */
278 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
279 MAC_CSR_CMD_CSR_BUSY_));
280
281 /* Workaround for hardware read-after-write restriction */
282 temp = smsc911x_reg_read(pdata, BYTE_TEST);
283
284 /* Wait for the write to complete */
285 if (likely(smsc911x_mac_complete(pdata) == 0))
286 return;
287
288 SMSC_WARNING(HW,
289 "smsc911x_mac_write failed, MAC busy after write");
290 }
291
292 /* Get a phy register */
293 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
294 {
295 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
296 unsigned long flags;
297 unsigned int addr;
298 int i, reg;
299
300 spin_lock_irqsave(&pdata->mac_lock, flags);
301
302 /* Confirm MII not busy */
303 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
304 SMSC_WARNING(HW,
305 "MII is busy in smsc911x_mii_read???");
306 reg = -EIO;
307 goto out;
308 }
309
310 /* Set the address, index & direction (read from PHY) */
311 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
312 smsc911x_mac_write(pdata, MII_ACC, addr);
313
314 /* Wait for read to complete w/ timeout */
315 for (i = 0; i < 100; i++)
316 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
317 reg = smsc911x_mac_read(pdata, MII_DATA);
318 goto out;
319 }
320
321 SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
322 reg = -EIO;
323
324 out:
325 spin_unlock_irqrestore(&pdata->mac_lock, flags);
326 return reg;
327 }
328
329 /* Set a phy register */
330 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
331 u16 val)
332 {
333 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
334 unsigned long flags;
335 unsigned int addr;
336 int i, reg;
337
338 spin_lock_irqsave(&pdata->mac_lock, flags);
339
340 /* Confirm MII not busy */
341 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
342 SMSC_WARNING(HW,
343 "MII is busy in smsc911x_mii_write???");
344 reg = -EIO;
345 goto out;
346 }
347
348 /* Put the data to write in the MAC */
349 smsc911x_mac_write(pdata, MII_DATA, val);
350
351 /* Set the address, index & direction (write to PHY) */
352 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
353 MII_ACC_MII_WRITE_;
354 smsc911x_mac_write(pdata, MII_ACC, addr);
355
356 /* Wait for write to complete w/ timeout */
357 for (i = 0; i < 100; i++)
358 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
359 reg = 0;
360 goto out;
361 }
362
363 SMSC_WARNING(HW, "Timed out waiting for MII write to finish");
364 reg = -EIO;
365
366 out:
367 spin_unlock_irqrestore(&pdata->mac_lock, flags);
368 return reg;
369 }
370
371 /* Autodetects and initialises external phy for SMSC9115 and SMSC9117 flavors.
372 * If something goes wrong, returns -ENODEV to revert back to internal phy.
373 * Performed at initialisation only, so interrupts are enabled */
374 static int smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
375 {
376 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
377
378 /* External phy is requested, supported, and detected */
379 if (hwcfg & HW_CFG_EXT_PHY_DET_) {
380
381 /* Switch to external phy. Assuming tx and rx are stopped
382 * because smsc911x_phy_initialise is called before
383 * smsc911x_rx_initialise and tx_initialise. */
384
385 /* Disable phy clocks to the MAC */
386 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
387 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
388 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
389 udelay(10); /* Enough time for clocks to stop */
390
391 /* Switch to external phy */
392 hwcfg |= HW_CFG_EXT_PHY_EN_;
393 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
394
395 /* Enable phy clocks to the MAC */
396 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
397 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
398 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
399 udelay(10); /* Enough time for clocks to restart */
400
401 hwcfg |= HW_CFG_SMI_SEL_;
402 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
403
404 SMSC_TRACE(HW, "Successfully switched to external PHY");
405 pdata->using_extphy = 1;
406 } else {
407 SMSC_WARNING(HW, "No external PHY detected, "
408 "Using internal PHY instead.");
409 /* Use internal phy */
410 return -ENODEV;
411 }
412 return 0;
413 }
414
415 /* Fetches a tx status out of the status fifo */
416 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
417 {
418 unsigned int result =
419 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
420
421 if (result != 0)
422 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
423
424 return result;
425 }
426
427 /* Fetches the next rx status */
428 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
429 {
430 unsigned int result =
431 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
432
433 if (result != 0)
434 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
435
436 return result;
437 }
438
439 #ifdef USE_PHY_WORK_AROUND
440 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
441 {
442 unsigned int tries;
443 u32 wrsz;
444 u32 rdsz;
445 ulong bufp;
446
447 for (tries = 0; tries < 10; tries++) {
448 unsigned int txcmd_a;
449 unsigned int txcmd_b;
450 unsigned int status;
451 unsigned int pktlength;
452 unsigned int i;
453
454 /* Zero-out rx packet memory */
455 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
456
457 /* Write tx packet to 118 */
458 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
459 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
460 txcmd_a |= MIN_PACKET_SIZE;
461
462 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
463
464 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
465 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
466
467 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
468 wrsz = MIN_PACKET_SIZE + 3;
469 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
470 wrsz >>= 2;
471
472 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
473
474 /* Wait till transmit is done */
475 i = 60;
476 do {
477 udelay(5);
478 status = smsc911x_tx_get_txstatus(pdata);
479 } while ((i--) && (!status));
480
481 if (!status) {
482 SMSC_WARNING(HW, "Failed to transmit "
483 "during loopback test");
484 continue;
485 }
486 if (status & TX_STS_ES_) {
487 SMSC_WARNING(HW, "Transmit encountered "
488 "errors during loopback test");
489 continue;
490 }
491
492 /* Wait till receive is done */
493 i = 60;
494 do {
495 udelay(5);
496 status = smsc911x_rx_get_rxstatus(pdata);
497 } while ((i--) && (!status));
498
499 if (!status) {
500 SMSC_WARNING(HW,
501 "Failed to receive during loopback test");
502 continue;
503 }
504 if (status & RX_STS_ES_) {
505 SMSC_WARNING(HW, "Receive encountered "
506 "errors during loopback test");
507 continue;
508 }
509
510 pktlength = ((status & 0x3FFF0000UL) >> 16);
511 bufp = (ulong)pdata->loopback_rx_pkt;
512 rdsz = pktlength + 3;
513 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
514 rdsz >>= 2;
515
516 smsc911x_rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
517
518 if (pktlength != (MIN_PACKET_SIZE + 4)) {
519 SMSC_WARNING(HW, "Unexpected packet size "
520 "during loop back test, size=%d, will retry",
521 pktlength);
522 } else {
523 unsigned int j;
524 int mismatch = 0;
525 for (j = 0; j < MIN_PACKET_SIZE; j++) {
526 if (pdata->loopback_tx_pkt[j]
527 != pdata->loopback_rx_pkt[j]) {
528 mismatch = 1;
529 break;
530 }
531 }
532 if (!mismatch) {
533 SMSC_TRACE(HW, "Successfully verified "
534 "loopback packet");
535 return 0;
536 } else {
537 SMSC_WARNING(HW, "Data mismatch "
538 "during loop back test, will retry");
539 }
540 }
541 }
542
543 return -EIO;
544 }
545
546 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
547 {
548 struct phy_device *phy_dev = pdata->phy_dev;
549 unsigned int temp;
550 unsigned int i = 100000;
551
552 BUG_ON(!phy_dev);
553 BUG_ON(!phy_dev->bus);
554
555 SMSC_TRACE(HW, "Performing PHY BCR Reset");
556 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
557 do {
558 msleep(1);
559 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
560 MII_BMCR);
561 } while ((i--) && (temp & BMCR_RESET));
562
563 if (temp & BMCR_RESET) {
564 SMSC_WARNING(HW, "PHY reset failed to complete.");
565 return -EIO;
566 }
567 /* Extra delay required because the phy may not be completed with
568 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
569 * enough delay but using 1ms here to be safe */
570 msleep(1);
571
572 return 0;
573 }
574
575 static int smsc911x_phy_loopbacktest(struct net_device *dev)
576 {
577 struct smsc911x_data *pdata = netdev_priv(dev);
578 struct phy_device *phy_dev = pdata->phy_dev;
579 int result = -EIO;
580 unsigned int i, val;
581 unsigned long flags;
582
583 /* Initialise tx packet using broadcast destination address */
584 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
585
586 /* Use incrementing source address */
587 for (i = 6; i < 12; i++)
588 pdata->loopback_tx_pkt[i] = (char)i;
589
590 /* Set length type field */
591 pdata->loopback_tx_pkt[12] = 0x00;
592 pdata->loopback_tx_pkt[13] = 0x00;
593
594 for (i = 14; i < MIN_PACKET_SIZE; i++)
595 pdata->loopback_tx_pkt[i] = (char)i;
596
597 val = smsc911x_reg_read(pdata, HW_CFG);
598 val &= HW_CFG_TX_FIF_SZ_;
599 val |= HW_CFG_SF_;
600 smsc911x_reg_write(pdata, HW_CFG, val);
601
602 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
603 smsc911x_reg_write(pdata, RX_CFG,
604 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
605
606 for (i = 0; i < 10; i++) {
607 /* Set PHY to 10/FD, no ANEG, and loopback mode */
608 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
609 BMCR_LOOPBACK | BMCR_FULLDPLX);
610
611 /* Enable MAC tx/rx, FD */
612 spin_lock_irqsave(&pdata->mac_lock, flags);
613 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
614 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
615 spin_unlock_irqrestore(&pdata->mac_lock, flags);
616
617 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
618 result = 0;
619 break;
620 }
621 pdata->resetcount++;
622
623 /* Disable MAC rx */
624 spin_lock_irqsave(&pdata->mac_lock, flags);
625 smsc911x_mac_write(pdata, MAC_CR, 0);
626 spin_unlock_irqrestore(&pdata->mac_lock, flags);
627
628 smsc911x_phy_reset(pdata);
629 }
630
631 /* Disable MAC */
632 spin_lock_irqsave(&pdata->mac_lock, flags);
633 smsc911x_mac_write(pdata, MAC_CR, 0);
634 spin_unlock_irqrestore(&pdata->mac_lock, flags);
635
636 /* Cancel PHY loopback mode */
637 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
638
639 smsc911x_reg_write(pdata, TX_CFG, 0);
640 smsc911x_reg_write(pdata, RX_CFG, 0);
641
642 return result;
643 }
644 #endif /* USE_PHY_WORK_AROUND */
645
646 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
647 {
648 struct phy_device *phy_dev = pdata->phy_dev;
649 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
650 u32 flow;
651 unsigned long flags;
652
653 if (phy_dev->duplex == DUPLEX_FULL) {
654 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
655 u16 rmtadv = phy_read(phy_dev, MII_LPA);
656 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
657
658 if (cap & FLOW_CTRL_RX)
659 flow = 0xFFFF0002;
660 else
661 flow = 0;
662
663 if (cap & FLOW_CTRL_TX)
664 afc |= 0xF;
665 else
666 afc &= ~0xF;
667
668 SMSC_TRACE(HW, "rx pause %s, tx pause %s",
669 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
670 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
671 } else {
672 SMSC_TRACE(HW, "half duplex");
673 flow = 0;
674 afc |= 0xF;
675 }
676
677 spin_lock_irqsave(&pdata->mac_lock, flags);
678 smsc911x_mac_write(pdata, FLOW, flow);
679 spin_unlock_irqrestore(&pdata->mac_lock, flags);
680
681 smsc911x_reg_write(pdata, AFC_CFG, afc);
682 }
683
684 /* Update link mode if anything has changed. Called periodically when the
685 * PHY is in polling mode, even if nothing has changed. */
686 static void smsc911x_phy_adjust_link(struct net_device *dev)
687 {
688 struct smsc911x_data *pdata = netdev_priv(dev);
689 struct phy_device *phy_dev = pdata->phy_dev;
690 unsigned long flags;
691 int carrier;
692
693 if (phy_dev->duplex != pdata->last_duplex) {
694 unsigned int mac_cr;
695 SMSC_TRACE(HW, "duplex state has changed");
696
697 spin_lock_irqsave(&pdata->mac_lock, flags);
698 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
699 if (phy_dev->duplex) {
700 SMSC_TRACE(HW,
701 "configuring for full duplex mode");
702 mac_cr |= MAC_CR_FDPX_;
703 } else {
704 SMSC_TRACE(HW,
705 "configuring for half duplex mode");
706 mac_cr &= ~MAC_CR_FDPX_;
707 }
708 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
709 spin_unlock_irqrestore(&pdata->mac_lock, flags);
710
711 smsc911x_phy_update_flowcontrol(pdata);
712 pdata->last_duplex = phy_dev->duplex;
713 }
714
715 carrier = netif_carrier_ok(dev);
716 if (carrier != pdata->last_carrier) {
717 SMSC_TRACE(HW, "carrier state has changed");
718 if (carrier) {
719 SMSC_TRACE(HW, "configuring for carrier OK");
720 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
721 (!pdata->using_extphy)) {
722 /* Restore orginal GPIO configuration */
723 pdata->gpio_setting = pdata->gpio_orig_setting;
724 smsc911x_reg_write(pdata, GPIO_CFG,
725 pdata->gpio_setting);
726 }
727 } else {
728 SMSC_TRACE(HW, "configuring for no carrier");
729 /* Check global setting that LED1
730 * usage is 10/100 indicator */
731 pdata->gpio_setting = smsc911x_reg_read(pdata,
732 GPIO_CFG);
733 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_)
734 && (!pdata->using_extphy)) {
735 /* Force 10/100 LED off, after saving
736 * orginal GPIO configuration */
737 pdata->gpio_orig_setting = pdata->gpio_setting;
738
739 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
740 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
741 | GPIO_CFG_GPIODIR0_
742 | GPIO_CFG_GPIOD0_);
743 smsc911x_reg_write(pdata, GPIO_CFG,
744 pdata->gpio_setting);
745 }
746 }
747 pdata->last_carrier = carrier;
748 }
749 }
750
751 static int smsc911x_mii_probe(struct net_device *dev)
752 {
753 struct smsc911x_data *pdata = netdev_priv(dev);
754 struct phy_device *phydev = NULL;
755 int phy_addr;
756
757 /* find the first phy */
758 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
759 if (pdata->mii_bus->phy_map[phy_addr]) {
760 phydev = pdata->mii_bus->phy_map[phy_addr];
761 SMSC_TRACE(PROBE, "PHY %d: addr %d, phy_id 0x%08X",
762 phy_addr, phydev->addr, phydev->phy_id);
763 break;
764 }
765 }
766
767 if (!phydev) {
768 pr_err("%s: no PHY found\n", dev->name);
769 return -ENODEV;
770 }
771
772 phydev = phy_connect(dev, dev_name(&phydev->dev),
773 &smsc911x_phy_adjust_link, 0, pdata->config.phy_interface);
774
775 if (IS_ERR(phydev)) {
776 pr_err("%s: Could not attach to PHY\n", dev->name);
777 return PTR_ERR(phydev);
778 }
779
780 pr_info("%s: attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
781 dev->name, phydev->drv->name,
782 dev_name(&phydev->dev), phydev->irq);
783
784 /* mask with MAC supported features */
785 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
786 SUPPORTED_Asym_Pause);
787 phydev->advertising = phydev->supported;
788
789 pdata->phy_dev = phydev;
790 pdata->last_duplex = -1;
791 pdata->last_carrier = -1;
792
793 #ifdef USE_PHY_WORK_AROUND
794 if (smsc911x_phy_loopbacktest(dev) < 0) {
795 SMSC_WARNING(HW, "Failed Loop Back Test");
796 return -ENODEV;
797 }
798 SMSC_TRACE(HW, "Passed Loop Back Test");
799 #endif /* USE_PHY_WORK_AROUND */
800
801 SMSC_TRACE(HW, "phy initialised succesfully");
802 return 0;
803 }
804
805 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
806 struct net_device *dev)
807 {
808 struct smsc911x_data *pdata = netdev_priv(dev);
809 int err = -ENXIO, i;
810
811 pdata->mii_bus = mdiobus_alloc();
812 if (!pdata->mii_bus) {
813 err = -ENOMEM;
814 goto err_out_1;
815 }
816
817 pdata->mii_bus->name = SMSC_MDIONAME;
818 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
819 pdata->mii_bus->priv = pdata;
820 pdata->mii_bus->read = smsc911x_mii_read;
821 pdata->mii_bus->write = smsc911x_mii_write;
822 pdata->mii_bus->irq = pdata->phy_irq;
823 for (i = 0; i < PHY_MAX_ADDR; ++i)
824 pdata->mii_bus->irq[i] = PHY_POLL;
825
826 pdata->mii_bus->parent = &pdev->dev;
827
828 pdata->using_extphy = 0;
829
830 switch (pdata->idrev & 0xFFFF0000) {
831 case 0x01170000:
832 case 0x01150000:
833 case 0x117A0000:
834 case 0x115A0000:
835 /* External PHY supported, try to autodetect */
836 if (smsc911x_phy_initialise_external(pdata) < 0) {
837 SMSC_TRACE(HW, "No external PHY detected, "
838 "using internal PHY");
839 }
840 break;
841 default:
842 SMSC_TRACE(HW, "External PHY is not supported, "
843 "using internal PHY");
844 break;
845 }
846
847 if (!pdata->using_extphy) {
848 /* Mask all PHYs except ID 1 (internal) */
849 pdata->mii_bus->phy_mask = ~(1 << 1);
850 }
851
852 if (mdiobus_register(pdata->mii_bus)) {
853 SMSC_WARNING(PROBE, "Error registering mii bus");
854 goto err_out_free_bus_2;
855 }
856
857 if (smsc911x_mii_probe(dev) < 0) {
858 SMSC_WARNING(PROBE, "Error registering mii bus");
859 goto err_out_unregister_bus_3;
860 }
861
862 return 0;
863
864 err_out_unregister_bus_3:
865 mdiobus_unregister(pdata->mii_bus);
866 err_out_free_bus_2:
867 mdiobus_free(pdata->mii_bus);
868 err_out_1:
869 return err;
870 }
871
872 /* Gets the number of tx statuses in the fifo */
873 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
874 {
875 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
876 & TX_FIFO_INF_TSUSED_) >> 16;
877 }
878
879 /* Reads tx statuses and increments counters where necessary */
880 static void smsc911x_tx_update_txcounters(struct net_device *dev)
881 {
882 struct smsc911x_data *pdata = netdev_priv(dev);
883 unsigned int tx_stat;
884
885 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
886 if (unlikely(tx_stat & 0x80000000)) {
887 /* In this driver the packet tag is used as the packet
888 * length. Since a packet length can never reach the
889 * size of 0x8000, this bit is reserved. It is worth
890 * noting that the "reserved bit" in the warning above
891 * does not reference a hardware defined reserved bit
892 * but rather a driver defined one.
893 */
894 SMSC_WARNING(HW,
895 "Packet tag reserved bit is high");
896 } else {
897 if (unlikely(tx_stat & 0x00008000)) {
898 dev->stats.tx_errors++;
899 } else {
900 dev->stats.tx_packets++;
901 dev->stats.tx_bytes += (tx_stat >> 16);
902 }
903 if (unlikely(tx_stat & 0x00000100)) {
904 dev->stats.collisions += 16;
905 dev->stats.tx_aborted_errors += 1;
906 } else {
907 dev->stats.collisions +=
908 ((tx_stat >> 3) & 0xF);
909 }
910 if (unlikely(tx_stat & 0x00000800))
911 dev->stats.tx_carrier_errors += 1;
912 if (unlikely(tx_stat & 0x00000200)) {
913 dev->stats.collisions++;
914 dev->stats.tx_aborted_errors++;
915 }
916 }
917 }
918 }
919
920 /* Increments the Rx error counters */
921 static void
922 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
923 {
924 int crc_err = 0;
925
926 if (unlikely(rxstat & 0x00008000)) {
927 dev->stats.rx_errors++;
928 if (unlikely(rxstat & 0x00000002)) {
929 dev->stats.rx_crc_errors++;
930 crc_err = 1;
931 }
932 }
933 if (likely(!crc_err)) {
934 if (unlikely((rxstat & 0x00001020) == 0x00001020)) {
935 /* Frame type indicates length,
936 * and length error is set */
937 dev->stats.rx_length_errors++;
938 }
939 if (rxstat & RX_STS_MCAST_)
940 dev->stats.multicast++;
941 }
942 }
943
944 /* Quickly dumps bad packets */
945 static void
946 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
947 {
948 unsigned int pktwords = (pktbytes + NET_IP_ALIGN + 3) >> 2;
949
950 if (likely(pktwords >= 4)) {
951 unsigned int timeout = 500;
952 unsigned int val;
953 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
954 do {
955 udelay(1);
956 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
957 } while (timeout-- && (val & RX_DP_CTRL_RX_FFWD_));
958
959 if (unlikely(timeout == 0))
960 SMSC_WARNING(HW, "Timed out waiting for "
961 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
962 } else {
963 unsigned int temp;
964 while (pktwords--)
965 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
966 }
967 }
968
969 /* NAPI poll function */
970 static int smsc911x_poll(struct napi_struct *napi, int budget)
971 {
972 struct smsc911x_data *pdata =
973 container_of(napi, struct smsc911x_data, napi);
974 struct net_device *dev = pdata->dev;
975 int npackets = 0;
976
977 while (likely(netif_running(dev)) && (npackets < budget)) {
978 unsigned int pktlength;
979 unsigned int pktwords;
980 struct sk_buff *skb;
981 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
982
983 if (!rxstat) {
984 unsigned int temp;
985 /* We processed all packets available. Tell NAPI it can
986 * stop polling then re-enable rx interrupts */
987 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
988 napi_complete(napi);
989 temp = smsc911x_reg_read(pdata, INT_EN);
990 temp |= INT_EN_RSFL_EN_;
991 smsc911x_reg_write(pdata, INT_EN, temp);
992 break;
993 }
994
995 /* Count packet for NAPI scheduling, even if it has an error.
996 * Error packets still require cycles to discard */
997 npackets++;
998
999 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1000 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1001 smsc911x_rx_counterrors(dev, rxstat);
1002
1003 if (unlikely(rxstat & RX_STS_ES_)) {
1004 SMSC_WARNING(RX_ERR,
1005 "Discarding packet with error bit set");
1006 /* Packet has an error, discard it and continue with
1007 * the next */
1008 smsc911x_rx_fastforward(pdata, pktwords);
1009 dev->stats.rx_dropped++;
1010 continue;
1011 }
1012
1013 skb = netdev_alloc_skb(dev, pktlength + NET_IP_ALIGN);
1014 if (unlikely(!skb)) {
1015 SMSC_WARNING(RX_ERR,
1016 "Unable to allocate skb for rx packet");
1017 /* Drop the packet and stop this polling iteration */
1018 smsc911x_rx_fastforward(pdata, pktwords);
1019 dev->stats.rx_dropped++;
1020 break;
1021 }
1022
1023 skb->data = skb->head;
1024 skb_reset_tail_pointer(skb);
1025
1026 /* Align IP on 16B boundary */
1027 skb_reserve(skb, NET_IP_ALIGN);
1028 skb_put(skb, pktlength - 4);
1029 smsc911x_rx_readfifo(pdata, (unsigned int *)skb->head,
1030 pktwords);
1031 skb->protocol = eth_type_trans(skb, dev);
1032 skb->ip_summed = CHECKSUM_NONE;
1033 netif_receive_skb(skb);
1034
1035 /* Update counters */
1036 dev->stats.rx_packets++;
1037 dev->stats.rx_bytes += (pktlength - 4);
1038 dev->last_rx = jiffies;
1039 }
1040
1041 /* Return total received packets */
1042 return npackets;
1043 }
1044
1045 /* Returns hash bit number for given MAC address
1046 * Example:
1047 * 01 00 5E 00 00 01 -> returns bit number 31 */
1048 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1049 {
1050 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1051 }
1052
1053 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1054 {
1055 /* Performs the multicast & mac_cr update. This is called when
1056 * safe on the current hardware, and with the mac_lock held */
1057 unsigned int mac_cr;
1058
1059 SMSC_ASSERT_MAC_LOCK(pdata);
1060
1061 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1062 mac_cr |= pdata->set_bits_mask;
1063 mac_cr &= ~(pdata->clear_bits_mask);
1064 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1065 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1066 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1067 SMSC_TRACE(HW, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1068 mac_cr, pdata->hashhi, pdata->hashlo);
1069 }
1070
1071 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1072 {
1073 unsigned int mac_cr;
1074
1075 /* This function is only called for older LAN911x devices
1076 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1077 * be modified during Rx - newer devices immediately update the
1078 * registers.
1079 *
1080 * This is called from interrupt context */
1081
1082 spin_lock(&pdata->mac_lock);
1083
1084 /* Check Rx has stopped */
1085 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1086 SMSC_WARNING(DRV, "Rx not stopped");
1087
1088 /* Perform the update - safe to do now Rx has stopped */
1089 smsc911x_rx_multicast_update(pdata);
1090
1091 /* Re-enable Rx */
1092 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1093 mac_cr |= MAC_CR_RXEN_;
1094 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1095
1096 pdata->multicast_update_pending = 0;
1097
1098 spin_unlock(&pdata->mac_lock);
1099 }
1100
1101 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1102 {
1103 unsigned int timeout;
1104 unsigned int temp;
1105
1106 /* Reset the LAN911x */
1107 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1108 timeout = 10;
1109 do {
1110 udelay(10);
1111 temp = smsc911x_reg_read(pdata, HW_CFG);
1112 } while ((--timeout) && (temp & HW_CFG_SRST_));
1113
1114 if (unlikely(temp & HW_CFG_SRST_)) {
1115 SMSC_WARNING(DRV, "Failed to complete reset");
1116 return -EIO;
1117 }
1118 return 0;
1119 }
1120
1121 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1122 static void
1123 smsc911x_set_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1124 {
1125 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1126 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1127 (dev_addr[1] << 8) | dev_addr[0];
1128
1129 SMSC_ASSERT_MAC_LOCK(pdata);
1130
1131 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1132 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1133 }
1134
1135 static int smsc911x_open(struct net_device *dev)
1136 {
1137 struct smsc911x_data *pdata = netdev_priv(dev);
1138 unsigned int timeout;
1139 unsigned int temp;
1140 unsigned int intcfg;
1141
1142 /* if the phy is not yet registered, retry later*/
1143 if (!pdata->phy_dev) {
1144 SMSC_WARNING(HW, "phy_dev is NULL");
1145 return -EAGAIN;
1146 }
1147
1148 if (!is_valid_ether_addr(dev->dev_addr)) {
1149 SMSC_WARNING(HW, "dev_addr is not a valid MAC address");
1150 return -EADDRNOTAVAIL;
1151 }
1152
1153 /* Reset the LAN911x */
1154 if (smsc911x_soft_reset(pdata)) {
1155 SMSC_WARNING(HW, "soft reset failed");
1156 return -EIO;
1157 }
1158
1159 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1160 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1161
1162 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1163 timeout = 50;
1164 while ((timeout--) &&
1165 (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_)) {
1166 udelay(10);
1167 }
1168
1169 if (unlikely(timeout == 0))
1170 SMSC_WARNING(IFUP,
1171 "Timed out waiting for EEPROM busy bit to clear");
1172
1173 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1174
1175 /* The soft reset above cleared the device's MAC address,
1176 * restore it from local copy (set in probe) */
1177 spin_lock_irq(&pdata->mac_lock);
1178 smsc911x_set_mac_address(pdata, dev->dev_addr);
1179 spin_unlock_irq(&pdata->mac_lock);
1180
1181 /* Initialise irqs, but leave all sources disabled */
1182 smsc911x_reg_write(pdata, INT_EN, 0);
1183 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1184
1185 /* Set interrupt deassertion to 100uS */
1186 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1187
1188 if (pdata->config.irq_polarity) {
1189 SMSC_TRACE(IFUP, "irq polarity: active high");
1190 intcfg |= INT_CFG_IRQ_POL_;
1191 } else {
1192 SMSC_TRACE(IFUP, "irq polarity: active low");
1193 }
1194
1195 if (pdata->config.irq_type) {
1196 SMSC_TRACE(IFUP, "irq type: push-pull");
1197 intcfg |= INT_CFG_IRQ_TYPE_;
1198 } else {
1199 SMSC_TRACE(IFUP, "irq type: open drain");
1200 }
1201
1202 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1203
1204 SMSC_TRACE(IFUP, "Testing irq handler using IRQ %d", dev->irq);
1205 pdata->software_irq_signal = 0;
1206 smp_wmb();
1207
1208 temp = smsc911x_reg_read(pdata, INT_EN);
1209 temp |= INT_EN_SW_INT_EN_;
1210 smsc911x_reg_write(pdata, INT_EN, temp);
1211
1212 timeout = 1000;
1213 while (timeout--) {
1214 if (pdata->software_irq_signal)
1215 break;
1216 msleep(1);
1217 }
1218
1219 if (!pdata->software_irq_signal) {
1220 dev_warn(&dev->dev, "ISR failed signaling test (IRQ %d)\n",
1221 dev->irq);
1222 return -ENODEV;
1223 }
1224 SMSC_TRACE(IFUP, "IRQ handler passed test using IRQ %d", dev->irq);
1225
1226 dev_info(&dev->dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1227 (unsigned long)pdata->ioaddr, dev->irq);
1228
1229 /* Bring the PHY up */
1230 phy_start(pdata->phy_dev);
1231
1232 temp = smsc911x_reg_read(pdata, HW_CFG);
1233 /* Preserve TX FIFO size and external PHY configuration */
1234 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1235 temp |= HW_CFG_SF_;
1236 smsc911x_reg_write(pdata, HW_CFG, temp);
1237
1238 temp = smsc911x_reg_read(pdata, FIFO_INT);
1239 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1240 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1241 smsc911x_reg_write(pdata, FIFO_INT, temp);
1242
1243 /* set RX Data offset to 2 bytes for alignment */
1244 smsc911x_reg_write(pdata, RX_CFG, (2 << 8));
1245
1246 /* enable NAPI polling before enabling RX interrupts */
1247 napi_enable(&pdata->napi);
1248
1249 temp = smsc911x_reg_read(pdata, INT_EN);
1250 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1251 smsc911x_reg_write(pdata, INT_EN, temp);
1252
1253 spin_lock_irq(&pdata->mac_lock);
1254 temp = smsc911x_mac_read(pdata, MAC_CR);
1255 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1256 smsc911x_mac_write(pdata, MAC_CR, temp);
1257 spin_unlock_irq(&pdata->mac_lock);
1258
1259 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1260
1261 netif_start_queue(dev);
1262 return 0;
1263 }
1264
1265 /* Entry point for stopping the interface */
1266 static int smsc911x_stop(struct net_device *dev)
1267 {
1268 struct smsc911x_data *pdata = netdev_priv(dev);
1269 unsigned int temp;
1270
1271 /* Disable all device interrupts */
1272 temp = smsc911x_reg_read(pdata, INT_CFG);
1273 temp &= ~INT_CFG_IRQ_EN_;
1274 smsc911x_reg_write(pdata, INT_CFG, temp);
1275
1276 /* Stop Tx and Rx polling */
1277 netif_stop_queue(dev);
1278 napi_disable(&pdata->napi);
1279
1280 /* At this point all Rx and Tx activity is stopped */
1281 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1282 smsc911x_tx_update_txcounters(dev);
1283
1284 /* Bring the PHY down */
1285 if (pdata->phy_dev)
1286 phy_stop(pdata->phy_dev);
1287
1288 SMSC_TRACE(IFDOWN, "Interface stopped");
1289 return 0;
1290 }
1291
1292 /* Entry point for transmitting a packet */
1293 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1294 {
1295 struct smsc911x_data *pdata = netdev_priv(dev);
1296 unsigned int freespace;
1297 unsigned int tx_cmd_a;
1298 unsigned int tx_cmd_b;
1299 unsigned int temp;
1300 u32 wrsz;
1301 ulong bufp;
1302
1303 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1304
1305 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1306 SMSC_WARNING(TX_ERR,
1307 "Tx data fifo low, space available: %d", freespace);
1308
1309 /* Word alignment adjustment */
1310 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1311 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1312 tx_cmd_a |= (unsigned int)skb->len;
1313
1314 tx_cmd_b = ((unsigned int)skb->len) << 16;
1315 tx_cmd_b |= (unsigned int)skb->len;
1316
1317 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1318 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1319
1320 bufp = (ulong)skb->data & (~0x3);
1321 wrsz = (u32)skb->len + 3;
1322 wrsz += (u32)((ulong)skb->data & 0x3);
1323 wrsz >>= 2;
1324
1325 smsc911x_tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1326 freespace -= (skb->len + 32);
1327 dev_kfree_skb(skb);
1328 dev->trans_start = jiffies;
1329
1330 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1331 smsc911x_tx_update_txcounters(dev);
1332
1333 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1334 netif_stop_queue(dev);
1335 temp = smsc911x_reg_read(pdata, FIFO_INT);
1336 temp &= 0x00FFFFFF;
1337 temp |= 0x32000000;
1338 smsc911x_reg_write(pdata, FIFO_INT, temp);
1339 }
1340
1341 return NETDEV_TX_OK;
1342 }
1343
1344 /* Entry point for getting status counters */
1345 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1346 {
1347 struct smsc911x_data *pdata = netdev_priv(dev);
1348 smsc911x_tx_update_txcounters(dev);
1349 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1350 return &dev->stats;
1351 }
1352
1353 /* Entry point for setting addressing modes */
1354 static void smsc911x_set_multicast_list(struct net_device *dev)
1355 {
1356 struct smsc911x_data *pdata = netdev_priv(dev);
1357 unsigned long flags;
1358
1359 if (dev->flags & IFF_PROMISC) {
1360 /* Enabling promiscuous mode */
1361 pdata->set_bits_mask = MAC_CR_PRMS_;
1362 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1363 pdata->hashhi = 0;
1364 pdata->hashlo = 0;
1365 } else if (dev->flags & IFF_ALLMULTI) {
1366 /* Enabling all multicast mode */
1367 pdata->set_bits_mask = MAC_CR_MCPAS_;
1368 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1369 pdata->hashhi = 0;
1370 pdata->hashlo = 0;
1371 } else if (dev->mc_count > 0) {
1372 /* Enabling specific multicast addresses */
1373 unsigned int hash_high = 0;
1374 unsigned int hash_low = 0;
1375 unsigned int count = 0;
1376 struct dev_mc_list *mc_list = dev->mc_list;
1377
1378 pdata->set_bits_mask = MAC_CR_HPFILT_;
1379 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1380
1381 while (mc_list) {
1382 count++;
1383 if ((mc_list->dmi_addrlen) == ETH_ALEN) {
1384 unsigned int bitnum =
1385 smsc911x_hash(mc_list->dmi_addr);
1386 unsigned int mask = 0x01 << (bitnum & 0x1F);
1387 if (bitnum & 0x20)
1388 hash_high |= mask;
1389 else
1390 hash_low |= mask;
1391 } else {
1392 SMSC_WARNING(DRV, "dmi_addrlen != 6");
1393 }
1394 mc_list = mc_list->next;
1395 }
1396 if (count != (unsigned int)dev->mc_count)
1397 SMSC_WARNING(DRV, "mc_count != dev->mc_count");
1398
1399 pdata->hashhi = hash_high;
1400 pdata->hashlo = hash_low;
1401 } else {
1402 /* Enabling local MAC address only */
1403 pdata->set_bits_mask = 0;
1404 pdata->clear_bits_mask =
1405 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1406 pdata->hashhi = 0;
1407 pdata->hashlo = 0;
1408 }
1409
1410 spin_lock_irqsave(&pdata->mac_lock, flags);
1411
1412 if (pdata->generation <= 1) {
1413 /* Older hardware revision - cannot change these flags while
1414 * receiving data */
1415 if (!pdata->multicast_update_pending) {
1416 unsigned int temp;
1417 SMSC_TRACE(HW, "scheduling mcast update");
1418 pdata->multicast_update_pending = 1;
1419
1420 /* Request the hardware to stop, then perform the
1421 * update when we get an RX_STOP interrupt */
1422 temp = smsc911x_mac_read(pdata, MAC_CR);
1423 temp &= ~(MAC_CR_RXEN_);
1424 smsc911x_mac_write(pdata, MAC_CR, temp);
1425 } else {
1426 /* There is another update pending, this should now
1427 * use the newer values */
1428 }
1429 } else {
1430 /* Newer hardware revision - can write immediately */
1431 smsc911x_rx_multicast_update(pdata);
1432 }
1433
1434 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1435 }
1436
1437 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1438 {
1439 struct net_device *dev = dev_id;
1440 struct smsc911x_data *pdata = netdev_priv(dev);
1441 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1442 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1443 int serviced = IRQ_NONE;
1444 u32 temp;
1445
1446 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1447 temp = smsc911x_reg_read(pdata, INT_EN);
1448 temp &= (~INT_EN_SW_INT_EN_);
1449 smsc911x_reg_write(pdata, INT_EN, temp);
1450 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1451 pdata->software_irq_signal = 1;
1452 smp_wmb();
1453 serviced = IRQ_HANDLED;
1454 }
1455
1456 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1457 /* Called when there is a multicast update scheduled and
1458 * it is now safe to complete the update */
1459 SMSC_TRACE(INTR, "RX Stop interrupt");
1460 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1461 if (pdata->multicast_update_pending)
1462 smsc911x_rx_multicast_update_workaround(pdata);
1463 serviced = IRQ_HANDLED;
1464 }
1465
1466 if (intsts & inten & INT_STS_TDFA_) {
1467 temp = smsc911x_reg_read(pdata, FIFO_INT);
1468 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1469 smsc911x_reg_write(pdata, FIFO_INT, temp);
1470 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1471 netif_wake_queue(dev);
1472 serviced = IRQ_HANDLED;
1473 }
1474
1475 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1476 SMSC_TRACE(INTR, "RX Error interrupt");
1477 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1478 serviced = IRQ_HANDLED;
1479 }
1480
1481 if (likely(intsts & inten & INT_STS_RSFL_)) {
1482 if (likely(napi_schedule_prep(&pdata->napi))) {
1483 /* Disable Rx interrupts */
1484 temp = smsc911x_reg_read(pdata, INT_EN);
1485 temp &= (~INT_EN_RSFL_EN_);
1486 smsc911x_reg_write(pdata, INT_EN, temp);
1487 /* Schedule a NAPI poll */
1488 __napi_schedule(&pdata->napi);
1489 } else {
1490 SMSC_WARNING(RX_ERR,
1491 "napi_schedule_prep failed");
1492 }
1493 serviced = IRQ_HANDLED;
1494 }
1495
1496 return serviced;
1497 }
1498
1499 #ifdef CONFIG_NET_POLL_CONTROLLER
1500 static void smsc911x_poll_controller(struct net_device *dev)
1501 {
1502 disable_irq(dev->irq);
1503 smsc911x_irqhandler(0, dev);
1504 enable_irq(dev->irq);
1505 }
1506 #endif /* CONFIG_NET_POLL_CONTROLLER */
1507
1508 /* Standard ioctls for mii-tool */
1509 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1510 {
1511 struct smsc911x_data *pdata = netdev_priv(dev);
1512
1513 if (!netif_running(dev) || !pdata->phy_dev)
1514 return -EINVAL;
1515
1516 return phy_mii_ioctl(pdata->phy_dev, if_mii(ifr), cmd);
1517 }
1518
1519 static int
1520 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1521 {
1522 struct smsc911x_data *pdata = netdev_priv(dev);
1523
1524 cmd->maxtxpkt = 1;
1525 cmd->maxrxpkt = 1;
1526 return phy_ethtool_gset(pdata->phy_dev, cmd);
1527 }
1528
1529 static int
1530 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1531 {
1532 struct smsc911x_data *pdata = netdev_priv(dev);
1533
1534 return phy_ethtool_sset(pdata->phy_dev, cmd);
1535 }
1536
1537 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1538 struct ethtool_drvinfo *info)
1539 {
1540 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1541 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1542 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1543 sizeof(info->bus_info));
1544 }
1545
1546 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1547 {
1548 struct smsc911x_data *pdata = netdev_priv(dev);
1549
1550 return phy_start_aneg(pdata->phy_dev);
1551 }
1552
1553 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1554 {
1555 struct smsc911x_data *pdata = netdev_priv(dev);
1556 return pdata->msg_enable;
1557 }
1558
1559 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1560 {
1561 struct smsc911x_data *pdata = netdev_priv(dev);
1562 pdata->msg_enable = level;
1563 }
1564
1565 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1566 {
1567 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1568 sizeof(u32);
1569 }
1570
1571 static void
1572 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1573 void *buf)
1574 {
1575 struct smsc911x_data *pdata = netdev_priv(dev);
1576 struct phy_device *phy_dev = pdata->phy_dev;
1577 unsigned long flags;
1578 unsigned int i;
1579 unsigned int j = 0;
1580 u32 *data = buf;
1581
1582 regs->version = pdata->idrev;
1583 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1584 data[j++] = smsc911x_reg_read(pdata, i);
1585
1586 for (i = MAC_CR; i <= WUCSR; i++) {
1587 spin_lock_irqsave(&pdata->mac_lock, flags);
1588 data[j++] = smsc911x_mac_read(pdata, i);
1589 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1590 }
1591
1592 for (i = 0; i <= 31; i++)
1593 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1594 }
1595
1596 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1597 {
1598 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1599 temp &= ~GPIO_CFG_EEPR_EN_;
1600 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1601 msleep(1);
1602 }
1603
1604 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1605 {
1606 int timeout = 100;
1607 u32 e2cmd;
1608
1609 SMSC_TRACE(DRV, "op 0x%08x", op);
1610 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1611 SMSC_WARNING(DRV, "Busy at start");
1612 return -EBUSY;
1613 }
1614
1615 e2cmd = op | E2P_CMD_EPC_BUSY_;
1616 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1617
1618 do {
1619 msleep(1);
1620 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1621 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (timeout--));
1622
1623 if (!timeout) {
1624 SMSC_TRACE(DRV, "TIMED OUT");
1625 return -EAGAIN;
1626 }
1627
1628 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1629 SMSC_TRACE(DRV, "Error occured during eeprom operation");
1630 return -EINVAL;
1631 }
1632
1633 return 0;
1634 }
1635
1636 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1637 u8 address, u8 *data)
1638 {
1639 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1640 int ret;
1641
1642 SMSC_TRACE(DRV, "address 0x%x", address);
1643 ret = smsc911x_eeprom_send_cmd(pdata, op);
1644
1645 if (!ret)
1646 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1647
1648 return ret;
1649 }
1650
1651 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1652 u8 address, u8 data)
1653 {
1654 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1655 int ret;
1656
1657 SMSC_TRACE(DRV, "address 0x%x, data 0x%x", address, data);
1658 ret = smsc911x_eeprom_send_cmd(pdata, op);
1659
1660 if (!ret) {
1661 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1662 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1663 ret = smsc911x_eeprom_send_cmd(pdata, op);
1664 }
1665
1666 return ret;
1667 }
1668
1669 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1670 {
1671 return SMSC911X_EEPROM_SIZE;
1672 }
1673
1674 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1675 struct ethtool_eeprom *eeprom, u8 *data)
1676 {
1677 struct smsc911x_data *pdata = netdev_priv(dev);
1678 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1679 int len;
1680 int i;
1681
1682 smsc911x_eeprom_enable_access(pdata);
1683
1684 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1685 for (i = 0; i < len; i++) {
1686 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1687 if (ret < 0) {
1688 eeprom->len = 0;
1689 return ret;
1690 }
1691 }
1692
1693 memcpy(data, &eeprom_data[eeprom->offset], len);
1694 eeprom->len = len;
1695 return 0;
1696 }
1697
1698 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1699 struct ethtool_eeprom *eeprom, u8 *data)
1700 {
1701 int ret;
1702 struct smsc911x_data *pdata = netdev_priv(dev);
1703
1704 smsc911x_eeprom_enable_access(pdata);
1705 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1706 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1707 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1708
1709 /* Single byte write, according to man page */
1710 eeprom->len = 1;
1711
1712 return ret;
1713 }
1714
1715 static const struct ethtool_ops smsc911x_ethtool_ops = {
1716 .get_settings = smsc911x_ethtool_getsettings,
1717 .set_settings = smsc911x_ethtool_setsettings,
1718 .get_link = ethtool_op_get_link,
1719 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1720 .nway_reset = smsc911x_ethtool_nwayreset,
1721 .get_msglevel = smsc911x_ethtool_getmsglevel,
1722 .set_msglevel = smsc911x_ethtool_setmsglevel,
1723 .get_regs_len = smsc911x_ethtool_getregslen,
1724 .get_regs = smsc911x_ethtool_getregs,
1725 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1726 .get_eeprom = smsc911x_ethtool_get_eeprom,
1727 .set_eeprom = smsc911x_ethtool_set_eeprom,
1728 };
1729
1730 static const struct net_device_ops smsc911x_netdev_ops = {
1731 .ndo_open = smsc911x_open,
1732 .ndo_stop = smsc911x_stop,
1733 .ndo_start_xmit = smsc911x_hard_start_xmit,
1734 .ndo_get_stats = smsc911x_get_stats,
1735 .ndo_set_multicast_list = smsc911x_set_multicast_list,
1736 .ndo_do_ioctl = smsc911x_do_ioctl,
1737 .ndo_validate_addr = eth_validate_addr,
1738 .ndo_set_mac_address = eth_mac_addr,
1739 #ifdef CONFIG_NET_POLL_CONTROLLER
1740 .ndo_poll_controller = smsc911x_poll_controller,
1741 #endif
1742 };
1743
1744 /* Initializing private device structures, only called from probe */
1745 static int __devinit smsc911x_init(struct net_device *dev)
1746 {
1747 struct smsc911x_data *pdata = netdev_priv(dev);
1748 unsigned int byte_test;
1749
1750 SMSC_TRACE(PROBE, "Driver Parameters:");
1751 SMSC_TRACE(PROBE, "LAN base: 0x%08lX",
1752 (unsigned long)pdata->ioaddr);
1753 SMSC_TRACE(PROBE, "IRQ: %d", dev->irq);
1754 SMSC_TRACE(PROBE, "PHY will be autodetected.");
1755
1756 spin_lock_init(&pdata->dev_lock);
1757
1758 if (pdata->ioaddr == 0) {
1759 SMSC_WARNING(PROBE, "pdata->ioaddr: 0x00000000");
1760 return -ENODEV;
1761 }
1762
1763 /* Check byte ordering */
1764 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1765 SMSC_TRACE(PROBE, "BYTE_TEST: 0x%08X", byte_test);
1766 if (byte_test == 0x43218765) {
1767 SMSC_TRACE(PROBE, "BYTE_TEST looks swapped, "
1768 "applying WORD_SWAP");
1769 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1770
1771 /* 1 dummy read of BYTE_TEST is needed after a write to
1772 * WORD_SWAP before its contents are valid */
1773 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1774
1775 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1776 }
1777
1778 if (byte_test != 0x87654321) {
1779 SMSC_WARNING(DRV, "BYTE_TEST: 0x%08X", byte_test);
1780 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1781 SMSC_WARNING(PROBE,
1782 "top 16 bits equal to bottom 16 bits");
1783 SMSC_TRACE(PROBE, "This may mean the chip is set "
1784 "for 32 bit while the bus is reading 16 bit");
1785 }
1786 return -ENODEV;
1787 }
1788
1789 /* Default generation to zero (all workarounds apply) */
1790 pdata->generation = 0;
1791
1792 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1793 switch (pdata->idrev & 0xFFFF0000) {
1794 case 0x01180000:
1795 case 0x01170000:
1796 case 0x01160000:
1797 case 0x01150000:
1798 /* LAN911[5678] family */
1799 pdata->generation = pdata->idrev & 0x0000FFFF;
1800 break;
1801
1802 case 0x118A0000:
1803 case 0x117A0000:
1804 case 0x116A0000:
1805 case 0x115A0000:
1806 /* LAN921[5678] family */
1807 pdata->generation = 3;
1808 break;
1809
1810 case 0x92100000:
1811 case 0x92110000:
1812 case 0x92200000:
1813 case 0x92210000:
1814 /* LAN9210/LAN9211/LAN9220/LAN9221 */
1815 pdata->generation = 4;
1816 break;
1817
1818 default:
1819 SMSC_WARNING(PROBE, "LAN911x not identified, idrev: 0x%08X",
1820 pdata->idrev);
1821 return -ENODEV;
1822 }
1823
1824 SMSC_TRACE(PROBE, "LAN911x identified, idrev: 0x%08X, generation: %d",
1825 pdata->idrev, pdata->generation);
1826
1827 if (pdata->generation == 0)
1828 SMSC_WARNING(PROBE,
1829 "This driver is not intended for this chip revision");
1830
1831 /* Reset the LAN911x */
1832 if (smsc911x_soft_reset(pdata))
1833 return -ENODEV;
1834
1835 /* Disable all interrupt sources until we bring the device up */
1836 smsc911x_reg_write(pdata, INT_EN, 0);
1837
1838 ether_setup(dev);
1839 dev->flags |= IFF_MULTICAST;
1840 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
1841 dev->netdev_ops = &smsc911x_netdev_ops;
1842 dev->ethtool_ops = &smsc911x_ethtool_ops;
1843
1844 return 0;
1845 }
1846
1847 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
1848 {
1849 struct net_device *dev;
1850 struct smsc911x_data *pdata;
1851 struct resource *res;
1852
1853 dev = platform_get_drvdata(pdev);
1854 BUG_ON(!dev);
1855 pdata = netdev_priv(dev);
1856 BUG_ON(!pdata);
1857 BUG_ON(!pdata->ioaddr);
1858 BUG_ON(!pdata->phy_dev);
1859
1860 SMSC_TRACE(IFDOWN, "Stopping driver.");
1861
1862 phy_disconnect(pdata->phy_dev);
1863 pdata->phy_dev = NULL;
1864 mdiobus_unregister(pdata->mii_bus);
1865 mdiobus_free(pdata->mii_bus);
1866
1867 platform_set_drvdata(pdev, NULL);
1868 unregister_netdev(dev);
1869 free_irq(dev->irq, dev);
1870 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1871 "smsc911x-memory");
1872 if (!res)
1873 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1874
1875 release_mem_region(res->start, res->end - res->start);
1876
1877 iounmap(pdata->ioaddr);
1878
1879 free_netdev(dev);
1880
1881 return 0;
1882 }
1883
1884 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
1885 {
1886 struct net_device *dev;
1887 struct smsc911x_data *pdata;
1888 struct smsc911x_platform_config *config = pdev->dev.platform_data;
1889 struct resource *res;
1890 unsigned int intcfg = 0;
1891 int res_size;
1892 int retval;
1893 DECLARE_MAC_BUF(mac);
1894
1895 pr_info("%s: Driver version %s.\n", SMSC_CHIPNAME, SMSC_DRV_VERSION);
1896
1897 /* platform data specifies irq & dynamic bus configuration */
1898 if (!pdev->dev.platform_data) {
1899 pr_warning("%s: platform_data not provided\n", SMSC_CHIPNAME);
1900 retval = -ENODEV;
1901 goto out_0;
1902 }
1903
1904 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1905 "smsc911x-memory");
1906 if (!res)
1907 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1908 if (!res) {
1909 pr_warning("%s: Could not allocate resource.\n",
1910 SMSC_CHIPNAME);
1911 retval = -ENODEV;
1912 goto out_0;
1913 }
1914 res_size = res->end - res->start;
1915
1916 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
1917 retval = -EBUSY;
1918 goto out_0;
1919 }
1920
1921 dev = alloc_etherdev(sizeof(struct smsc911x_data));
1922 if (!dev) {
1923 pr_warning("%s: Could not allocate device.\n", SMSC_CHIPNAME);
1924 retval = -ENOMEM;
1925 goto out_release_io_1;
1926 }
1927
1928 SET_NETDEV_DEV(dev, &pdev->dev);
1929
1930 pdata = netdev_priv(dev);
1931
1932 dev->irq = platform_get_irq(pdev, 0);
1933 pdata->ioaddr = ioremap_nocache(res->start, res_size);
1934
1935 /* copy config parameters across to pdata */
1936 memcpy(&pdata->config, config, sizeof(pdata->config));
1937
1938 pdata->dev = dev;
1939 pdata->msg_enable = ((1 << debug) - 1);
1940
1941 if (pdata->ioaddr == NULL) {
1942 SMSC_WARNING(PROBE,
1943 "Error smsc911x base address invalid");
1944 retval = -ENOMEM;
1945 goto out_free_netdev_2;
1946 }
1947
1948 retval = smsc911x_init(dev);
1949 if (retval < 0)
1950 goto out_unmap_io_3;
1951
1952 /* configure irq polarity and type before connecting isr */
1953 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
1954 intcfg |= INT_CFG_IRQ_POL_;
1955
1956 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
1957 intcfg |= INT_CFG_IRQ_TYPE_;
1958
1959 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1960
1961 /* Ensure interrupts are globally disabled before connecting ISR */
1962 smsc911x_reg_write(pdata, INT_EN, 0);
1963 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1964
1965 retval = request_irq(dev->irq, smsc911x_irqhandler, IRQF_DISABLED,
1966 dev->name, dev);
1967 if (retval) {
1968 SMSC_WARNING(PROBE,
1969 "Unable to claim requested irq: %d", dev->irq);
1970 goto out_unmap_io_3;
1971 }
1972
1973 platform_set_drvdata(pdev, dev);
1974
1975 retval = register_netdev(dev);
1976 if (retval) {
1977 SMSC_WARNING(PROBE,
1978 "Error %i registering device", retval);
1979 goto out_unset_drvdata_4;
1980 } else {
1981 SMSC_TRACE(PROBE, "Network interface: \"%s\"", dev->name);
1982 }
1983
1984 spin_lock_init(&pdata->mac_lock);
1985
1986 retval = smsc911x_mii_init(pdev, dev);
1987 if (retval) {
1988 SMSC_WARNING(PROBE,
1989 "Error %i initialising mii", retval);
1990 goto out_unregister_netdev_5;
1991 }
1992
1993 spin_lock_irq(&pdata->mac_lock);
1994
1995 /* Check if mac address has been specified when bringing interface up */
1996 if (is_valid_ether_addr(dev->dev_addr)) {
1997 smsc911x_set_mac_address(pdata, dev->dev_addr);
1998 SMSC_TRACE(PROBE, "MAC Address is specified by configuration");
1999 } else {
2000 /* Try reading mac address from device. if EEPROM is present
2001 * it will already have been set */
2002 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2003 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2004 dev->dev_addr[0] = (u8)(mac_low32);
2005 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2006 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2007 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2008 dev->dev_addr[4] = (u8)(mac_high16);
2009 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2010
2011 if (is_valid_ether_addr(dev->dev_addr)) {
2012 /* eeprom values are valid so use them */
2013 SMSC_TRACE(PROBE,
2014 "Mac Address is read from LAN911x EEPROM");
2015 } else {
2016 /* eeprom values are invalid, generate random MAC */
2017 random_ether_addr(dev->dev_addr);
2018 smsc911x_set_mac_address(pdata, dev->dev_addr);
2019 SMSC_TRACE(PROBE,
2020 "MAC Address is set to random_ether_addr");
2021 }
2022 }
2023
2024 spin_unlock_irq(&pdata->mac_lock);
2025
2026 dev_info(&dev->dev, "MAC Address: %s\n",
2027 print_mac(mac, dev->dev_addr));
2028
2029 return 0;
2030
2031 out_unregister_netdev_5:
2032 unregister_netdev(dev);
2033 out_unset_drvdata_4:
2034 platform_set_drvdata(pdev, NULL);
2035 free_irq(dev->irq, dev);
2036 out_unmap_io_3:
2037 iounmap(pdata->ioaddr);
2038 out_free_netdev_2:
2039 free_netdev(dev);
2040 out_release_io_1:
2041 release_mem_region(res->start, res->end - res->start);
2042 out_0:
2043 return retval;
2044 }
2045
2046 static struct platform_driver smsc911x_driver = {
2047 .probe = smsc911x_drv_probe,
2048 .remove = smsc911x_drv_remove,
2049 .driver = {
2050 .name = SMSC_CHIPNAME,
2051 },
2052 };
2053
2054 /* Entry point for loading the module */
2055 static int __init smsc911x_init_module(void)
2056 {
2057 return platform_driver_register(&smsc911x_driver);
2058 }
2059
2060 /* entry point for unloading the module */
2061 static void __exit smsc911x_cleanup_module(void)
2062 {
2063 platform_driver_unregister(&smsc911x_driver);
2064 }
2065
2066 module_init(smsc911x_init_module);
2067 module_exit(smsc911x_cleanup_module);
Support for the Chinese Samsung S3C2440 based development boards