6 * This file contains the definitions for the x86 IO instructions
7 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
8 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
9 * versions of the single-IO instructions (inb_p/inw_p/..).
11 * This file is not meant to be obfuscating: it's just complicated
12 * to (a) handle it all in a way that makes gcc able to optimize it
13 * as well as possible and (b) trying to avoid writing the same thing
14 * over and over again with slight variations and possibly making a
19 * Thanks to James van Artsdalen for a better timing-fix than
20 * the two short jumps: using outb's to a nonexistent port seems
21 * to guarantee better timings even on fast machines.
23 * On the other hand, I'd like to be sure of a non-existent port:
24 * I feel a bit unsafe about using 0x80 (should be safe, though)
30 * Bit simplified and optimized by Jan Hubicka
31 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
33 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
34 * isa_read[wl] and isa_write[wl] fixed
35 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
38 extern void native_io_delay(void);
40 extern int io_delay_type
;
41 extern void io_delay_init(void);
43 #if defined(CONFIG_PARAVIRT)
44 #include <asm/paravirt.h>
47 static inline void slow_down_io(void)
59 * Talk about misusing macros..
62 static inline void out##s(unsigned x value, unsigned short port) {
64 #define __OUT2(s,s1,s2) \
65 __asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
67 #ifndef REALLY_SLOW_IO
68 #define REALLY_SLOW_IO
69 #define UNSET_REALLY_SLOW_IO
72 #define __OUT(s,s1,x) \
73 __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \
74 __OUT1(s##_p, x) __OUT2(s, s1, "w") : : "a" (value), "Nd" (port)); \
78 static inline RETURN_TYPE in##s(unsigned short port) { RETURN_TYPE _v;
80 #define __IN2(s,s1,s2) \
81 __asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
83 #define __IN(s,s1,i...) \
84 __IN1(s) __IN2(s, s1, "w") : "=a" (_v) : "Nd" (port), ##i); return _v; } \
85 __IN1(s##_p) __IN2(s, s1, "w") : "=a" (_v) : "Nd" (port), ##i); \
86 slow_down_io(); return _v; }
88 #ifdef UNSET_REALLY_SLOW_IO
93 static inline void ins##s(unsigned short port, void * addr, unsigned long count) \
94 { __asm__ __volatile__ ("rep ; ins" #s \
95 : "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
98 static inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
99 { __asm__ __volatile__ ("rep ; outs" #s \
100 : "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
102 #define RETURN_TYPE unsigned char
105 #define RETURN_TYPE unsigned short
108 #define RETURN_TYPE unsigned int
124 #define IO_SPACE_LIMIT 0xffff
126 #if defined(__KERNEL__) && defined(__x86_64__)
128 #include <linux/vmalloc.h>
132 * Change virtual addresses to physical addresses and vv.
133 * These are pretty trivial
135 static inline unsigned long virt_to_phys(volatile void * address
)
137 return __pa(address
);
140 static inline void * phys_to_virt(unsigned long address
)
142 return __va(address
);
147 * Change "struct page" to physical address.
149 #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
151 #include <asm-generic/iomap.h>
153 extern void *early_ioremap(unsigned long addr
, unsigned long size
);
154 extern void early_iounmap(void *addr
, unsigned long size
);
157 * This one maps high address device memory and turns off caching for that area.
158 * it's useful if some control registers are in such an area and write combining
159 * or read caching is not desirable:
161 extern void __iomem
*ioremap_nocache(unsigned long offset
, unsigned long size
);
162 extern void __iomem
*ioremap_cache(unsigned long offset
, unsigned long size
);
165 * The default ioremap() behavior is non-cached:
167 static inline void __iomem
*ioremap(unsigned long offset
, unsigned long size
)
169 return ioremap_nocache(offset
, size
);
172 extern void iounmap(volatile void __iomem
*addr
);
174 extern void __iomem
*fix_ioremap(unsigned idx
, unsigned long phys
);
177 * ISA I/O bus memory addresses are 1:1 with the physical address.
179 #define isa_virt_to_bus virt_to_phys
180 #define isa_page_to_bus page_to_phys
181 #define isa_bus_to_virt phys_to_virt
184 * However PCI ones are not necessarily 1:1 and therefore these interfaces
185 * are forbidden in portable PCI drivers.
187 * Allow them on x86 for legacy drivers, though.
189 #define virt_to_bus virt_to_phys
190 #define bus_to_virt phys_to_virt
193 * readX/writeX() are used to access memory mapped devices. On some
194 * architectures the memory mapped IO stuff needs to be accessed
195 * differently. On the x86 architecture, we just read/write the
196 * memory location directly.
199 static inline __u8
__readb(const volatile void __iomem
*addr
)
201 return *(__force
volatile __u8
*)addr
;
203 static inline __u16
__readw(const volatile void __iomem
*addr
)
205 return *(__force
volatile __u16
*)addr
;
207 static __always_inline __u32
__readl(const volatile void __iomem
*addr
)
209 return *(__force
volatile __u32
*)addr
;
211 static inline __u64
__readq(const volatile void __iomem
*addr
)
213 return *(__force
volatile __u64
*)addr
;
215 #define readb(x) __readb(x)
216 #define readw(x) __readw(x)
217 #define readl(x) __readl(x)
218 #define readq(x) __readq(x)
219 #define readb_relaxed(a) readb(a)
220 #define readw_relaxed(a) readw(a)
221 #define readl_relaxed(a) readl(a)
222 #define readq_relaxed(a) readq(a)
223 #define __raw_readb readb
224 #define __raw_readw readw
225 #define __raw_readl readl
226 #define __raw_readq readq
230 static inline void __writel(__u32 b
, volatile void __iomem
*addr
)
232 *(__force
volatile __u32
*)addr
= b
;
234 static inline void __writeq(__u64 b
, volatile void __iomem
*addr
)
236 *(__force
volatile __u64
*)addr
= b
;
238 static inline void __writeb(__u8 b
, volatile void __iomem
*addr
)
240 *(__force
volatile __u8
*)addr
= b
;
242 static inline void __writew(__u16 b
, volatile void __iomem
*addr
)
244 *(__force
volatile __u16
*)addr
= b
;
246 #define writeq(val,addr) __writeq((val),(addr))
247 #define writel(val,addr) __writel((val),(addr))
248 #define writew(val,addr) __writew((val),(addr))
249 #define writeb(val,addr) __writeb((val),(addr))
250 #define __raw_writeb writeb
251 #define __raw_writew writew
252 #define __raw_writel writel
253 #define __raw_writeq writeq
255 void __memcpy_fromio(void*,unsigned long,unsigned);
256 void __memcpy_toio(unsigned long,const void*,unsigned);
258 static inline void memcpy_fromio(void *to
, const volatile void __iomem
*from
, unsigned len
)
260 __memcpy_fromio(to
,(unsigned long)from
,len
);
262 static inline void memcpy_toio(volatile void __iomem
*to
, const void *from
, unsigned len
)
264 __memcpy_toio((unsigned long)to
,from
,len
);
267 void memset_io(volatile void __iomem
*a
, int b
, size_t c
);
270 * ISA space is 'always mapped' on a typical x86 system, no need to
271 * explicitly ioremap() it. The fact that the ISA IO space is mapped
272 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
273 * are physical addresses. The following constant pointer can be
274 * used as the IO-area pointer (it can be iounmapped as well, so the
275 * analogy with PCI is quite large):
277 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
279 #define flush_write_buffers()
281 extern int iommu_bio_merge
;
282 #define BIO_VMERGE_BOUNDARY iommu_bio_merge
285 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
288 #define xlate_dev_mem_ptr(p) __va(p)
291 * Convert a virtual cached pointer to an uncached pointer
293 #define xlate_dev_kmem_ptr(p) p
295 #endif /* __KERNEL__ */