include/linux/ide.h

   1 #ifndef _IDE_H
   2 #define _IDE_H
   3 /*
   4  *  linux/include/linux/ide.h
   5  *
   6  *  Copyright (C) 1994-2002  Linus Torvalds & authors
   7  */
   8
   9 #include <linux/init.h>
  10 #include <linux/ioport.h>
  11 #include <linux/hdreg.h>
  12 #include <linux/hdsmart.h>
  13 #include <linux/blkdev.h>
  14 #include <linux/proc_fs.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/bitops.h>
  17 #include <linux/bio.h>
  18 #include <linux/device.h>
  19 #include <linux/pci.h>
  20 #include <linux/completion.h>
  21 #ifdef CONFIG_BLK_DEV_IDEACPI
  22 #include <acpi/acpi.h>
  23 #endif
  24 #include <asm/byteorder.h>
  25 #include <asm/system.h>
  26 #include <asm/io.h>
  27 #include <asm/semaphore.h>
  28 #include <asm/mutex.h>
  29
  30 #if defined(CRIS) || defined(FRV)
  31 # define SUPPORT_VLB_SYNC 0
  32 #else
  33 # define SUPPORT_VLB_SYNC 1
  34 #endif
  35
  36 /*
  37  * Used to indicate "no IRQ", should be a value that cannot be an IRQ
  38  * number.
  39  */
  40
  41 #define IDE_NO_IRQ              (-1)
  42
  43 typedef unsigned char   byte;   /* used everywhere */
  44
  45 /*
  46  * Probably not wise to fiddle with these
  47  */
  48 #define ERROR_MAX       8       /* Max read/write errors per sector */
  49 #define ERROR_RESET     3       /* Reset controller every 4th retry */
  50 #define ERROR_RECAL     1       /* Recalibrate every 2nd retry */
  51
  52 /*
  53  * Tune flags
  54  */
  55 #define IDE_TUNE_NOAUTO         2
  56 #define IDE_TUNE_AUTO           1
  57 #define IDE_TUNE_DEFAULT        0
  58
  59 /*
  60  * state flags
  61  */
  62
  63 #define DMA_PIO_RETRY   1       /* retrying in PIO */
  64
  65 #define HWIF(drive)             ((ide_hwif_t *)((drive)->hwif))
  66 #define HWGROUP(drive)          ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
  67
  68 /*
  69  * Definitions for accessing IDE controller registers
  70  */
  71 #define IDE_NR_PORTS            (10)
  72
  73 #define IDE_DATA_OFFSET         (0)
  74 #define IDE_ERROR_OFFSET        (1)
  75 #define IDE_NSECTOR_OFFSET      (2)
  76 #define IDE_SECTOR_OFFSET       (3)
  77 #define IDE_LCYL_OFFSET         (4)
  78 #define IDE_HCYL_OFFSET         (5)
  79 #define IDE_SELECT_OFFSET       (6)
  80 #define IDE_STATUS_OFFSET       (7)
  81 #define IDE_CONTROL_OFFSET      (8)
  82 #define IDE_IRQ_OFFSET          (9)
  83
  84 #define IDE_FEATURE_OFFSET      IDE_ERROR_OFFSET
  85 #define IDE_COMMAND_OFFSET      IDE_STATUS_OFFSET
  86
  87 #define IDE_DATA_REG            (HWIF(drive)->io_ports[IDE_DATA_OFFSET])
  88 #define IDE_ERROR_REG           (HWIF(drive)->io_ports[IDE_ERROR_OFFSET])
  89 #define IDE_NSECTOR_REG         (HWIF(drive)->io_ports[IDE_NSECTOR_OFFSET])
  90 #define IDE_SECTOR_REG          (HWIF(drive)->io_ports[IDE_SECTOR_OFFSET])
  91 #define IDE_LCYL_REG            (HWIF(drive)->io_ports[IDE_LCYL_OFFSET])
  92 #define IDE_HCYL_REG            (HWIF(drive)->io_ports[IDE_HCYL_OFFSET])
  93 #define IDE_SELECT_REG          (HWIF(drive)->io_ports[IDE_SELECT_OFFSET])
  94 #define IDE_STATUS_REG          (HWIF(drive)->io_ports[IDE_STATUS_OFFSET])
  95 #define IDE_CONTROL_REG         (HWIF(drive)->io_ports[IDE_CONTROL_OFFSET])
  96 #define IDE_IRQ_REG             (HWIF(drive)->io_ports[IDE_IRQ_OFFSET])
  97
  98 #define IDE_FEATURE_REG         IDE_ERROR_REG
  99 #define IDE_COMMAND_REG         IDE_STATUS_REG
 100 #define IDE_ALTSTATUS_REG       IDE_CONTROL_REG
 101 #define IDE_IREASON_REG         IDE_NSECTOR_REG
 102 #define IDE_BCOUNTL_REG         IDE_LCYL_REG
 103 #define IDE_BCOUNTH_REG         IDE_HCYL_REG
 104
 105 #define OK_STAT(stat,good,bad)  (((stat)&((good)|(bad)))==(good))
 106 #define BAD_R_STAT              (BUSY_STAT   | ERR_STAT)
 107 #define BAD_W_STAT              (BAD_R_STAT  | WRERR_STAT)
 108 #define BAD_STAT                (BAD_R_STAT  | DRQ_STAT)
 109 #define DRIVE_READY             (READY_STAT  | SEEK_STAT)
 110 #define DATA_READY              (DRQ_STAT)
 111
 112 #define BAD_CRC                 (ABRT_ERR    | ICRC_ERR)
 113
 114 #define SATA_NR_PORTS           (3)     /* 16 possible ?? */
 115
 116 #define SATA_STATUS_OFFSET      (0)
 117 #define SATA_STATUS_REG         (HWIF(drive)->sata_scr[SATA_STATUS_OFFSET])
 118 #define SATA_ERROR_OFFSET       (1)
 119 #define SATA_ERROR_REG          (HWIF(drive)->sata_scr[SATA_ERROR_OFFSET])
 120 #define SATA_CONTROL_OFFSET     (2)
 121 #define SATA_CONTROL_REG        (HWIF(drive)->sata_scr[SATA_CONTROL_OFFSET])
 122
 123 #define SATA_MISC_OFFSET        (0)
 124 #define SATA_MISC_REG           (HWIF(drive)->sata_misc[SATA_MISC_OFFSET])
 125 #define SATA_PHY_OFFSET         (1)
 126 #define SATA_PHY_REG            (HWIF(drive)->sata_misc[SATA_PHY_OFFSET])
 127 #define SATA_IEN_OFFSET         (2)
 128 #define SATA_IEN_REG            (HWIF(drive)->sata_misc[SATA_IEN_OFFSET])
 129
 130 /*
 131  * Our Physical Region Descriptor (PRD) table should be large enough
 132  * to handle the biggest I/O request we are likely to see.  Since requests
 133  * can have no more than 256 sectors, and since the typical blocksize is
 134  * two or more sectors, we could get by with a limit of 128 entries here for
 135  * the usual worst case.  Most requests seem to include some contiguous blocks,
 136  * further reducing the number of table entries required.
 137  *
 138  * The driver reverts to PIO mode for individual requests that exceed
 139  * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
 140  * 100% of all crazy scenarios here is not necessary.
 141  *
 142  * As it turns out though, we must allocate a full 4KB page for this,
 143  * so the two PRD tables (ide0 & ide1) will each get half of that,
 144  * allowing each to have about 256 entries (8 bytes each) from this.
 145  */
 146 #define PRD_BYTES       8
 147 #define PRD_ENTRIES     256
 148
 149 /*
 150  * Some more useful definitions
 151  */
 152 #define PARTN_BITS      6       /* number of minor dev bits for partitions */
 153 #define MAX_DRIVES      2       /* per interface; 2 assumed by lots of code */
 154 #define SECTOR_SIZE     512
 155 #define SECTOR_WORDS    (SECTOR_SIZE / 4)       /* number of 32bit words per sector */
 156 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
 157
 158 /*
 159  * Timeouts for various operations:
 160  */
 161 #define WAIT_DRQ        (HZ/10)         /* 100msec - spec allows up to 20ms */
 162 #define WAIT_READY      (5*HZ)          /* 5sec - some laptops are very slow */
 163 #define WAIT_PIDENTIFY  (10*HZ) /* 10sec  - should be less than 3ms (?), if all ATAPI CD is closed at boot */
 164 #define WAIT_WORSTCASE  (30*HZ) /* 30sec  - worst case when spinning up */
 165 #define WAIT_CMD        (10*HZ) /* 10sec  - maximum wait for an IRQ to happen */
 166 #define WAIT_MIN_SLEEP  (2*HZ/100)      /* 20msec - minimum sleep time */
 167
 168 /*
 169  * Check for an interrupt and acknowledge the interrupt status
 170  */
 171 struct hwif_s;
 172 typedef int (ide_ack_intr_t)(struct hwif_s *);
 173
 174 /*
 175  * hwif_chipset_t is used to keep track of the specific hardware
 176  * chipset used by each IDE interface, if known.
 177  */
 178 enum {          ide_unknown,    ide_generic,    ide_pci,
 179                 ide_cmd640,     ide_dtc2278,    ide_ali14xx,
 180                 ide_qd65xx,     ide_umc8672,    ide_ht6560b,
 181                 ide_rz1000,     ide_trm290,
 182                 ide_cmd646,     ide_cy82c693,   ide_4drives,
 183                 ide_pmac,       ide_etrax100,   ide_acorn,
 184                 ide_au1xxx, ide_forced
 185 };
 186
 187 typedef u8 hwif_chipset_t;
 188
 189 /*
 190  * Structure to hold all information about the location of this port
 191  */
 192 typedef struct hw_regs_s {
 193         unsigned long   io_ports[IDE_NR_PORTS]; /* task file registers */
 194         int             irq;                    /* our irq number */
 195         ide_ack_intr_t  *ack_intr;              /* acknowledge interrupt */
 196         hwif_chipset_t  chipset;
 197         struct device   *dev;
 198 } hw_regs_t;
 199
 200 struct hwif_s * ide_find_port(unsigned long);
 201
 202 int ide_register_hw(hw_regs_t *, void (*)(struct hwif_s *), int,
 203                     struct hwif_s **);
 204
 205 void ide_setup_ports(   hw_regs_t *hw,
 206                         unsigned long base,
 207                         int *offsets,
 208                         unsigned long ctrl,
 209                         unsigned long intr,
 210                         ide_ack_intr_t *ack_intr,
 211 #if 0
 212                         ide_io_ops_t *iops,
 213 #endif
 214                         int irq);
 215
 216 static inline void ide_std_init_ports(hw_regs_t *hw,
 217                                       unsigned long io_addr,
 218                                       unsigned long ctl_addr)
 219 {
 220         unsigned int i;
 221
 222         for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
 223                 hw->io_ports[i] = io_addr++;
 224
 225         hw->io_ports[IDE_CONTROL_OFFSET] = ctl_addr;
 226 }
 227
 228 #include <asm/ide.h>
 229
 230 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
 231 #undef MAX_HWIFS
 232 #define MAX_HWIFS       CONFIG_IDE_MAX_HWIFS
 233 #endif
 234
 235 /* needed on alpha, x86/x86_64, ia64, mips, ppc32 and sh */
 236 #ifndef IDE_ARCH_OBSOLETE_DEFAULTS
 237 # define ide_default_io_base(index)     (0)
 238 # define ide_default_irq(base)          (0)
 239 # define ide_init_default_irq(base)     (0)
 240 #endif
 241
 242 #ifdef CONFIG_IDE_ARCH_OBSOLETE_INIT
 243 static inline void ide_init_hwif_ports(hw_regs_t *hw,
 244                                        unsigned long io_addr,
 245                                        unsigned long ctl_addr,
 246                                        int *irq)
 247 {
 248         if (!ctl_addr)
 249                 ide_std_init_ports(hw, io_addr, ide_default_io_ctl(io_addr));
 250         else
 251                 ide_std_init_ports(hw, io_addr, ctl_addr);
 252
 253         if (irq)
 254                 *irq = 0;
 255
 256         hw->io_ports[IDE_IRQ_OFFSET] = 0;
 257
 258 #ifdef CONFIG_PPC32
 259         if (ppc_ide_md.ide_init_hwif)
 260                 ppc_ide_md.ide_init_hwif(hw, io_addr, ctl_addr, irq);
 261 #endif
 262 }
 263 #else
 264 static inline void ide_init_hwif_ports(hw_regs_t *hw,
 265                                        unsigned long io_addr,
 266                                        unsigned long ctl_addr,
 267                                        int *irq)
 268 {
 269         if (io_addr || ctl_addr)
 270                 printk(KERN_WARNING "%s: must not be called\n", __FUNCTION__);
 271 }
 272 #endif /* CONFIG_IDE_ARCH_OBSOLETE_INIT */
 273
 274 /* Currently only m68k, apus and m8xx need it */
 275 #ifndef IDE_ARCH_ACK_INTR
 276 # define ide_ack_intr(hwif) (1)
 277 #endif
 278
 279 /* Currently only Atari needs it */
 280 #ifndef IDE_ARCH_LOCK
 281 # define ide_release_lock()                     do {} while (0)
 282 # define ide_get_lock(hdlr, data)               do {} while (0)
 283 #endif /* IDE_ARCH_LOCK */
 284
 285 /*
 286  * Now for the data we need to maintain per-drive:  ide_drive_t
 287  */
 288
 289 #define ide_scsi        0x21
 290 #define ide_disk        0x20
 291 #define ide_optical     0x7
 292 #define ide_cdrom       0x5
 293 #define ide_tape        0x1
 294 #define ide_floppy      0x0
 295
 296 /*
 297  * Special Driver Flags
 298  *
 299  * set_geometry : respecify drive geometry
 300  * recalibrate  : seek to cyl 0
 301  * set_multmode : set multmode count
 302  * set_tune     : tune interface for drive
 303  * serviced     : service command
 304  * reserved     : unused
 305  */
 306 typedef union {
 307         unsigned all                    : 8;
 308         struct {
 309                 unsigned set_geometry   : 1;
 310                 unsigned recalibrate    : 1;
 311                 unsigned set_multmode   : 1;
 312                 unsigned set_tune       : 1;
 313                 unsigned serviced       : 1;
 314                 unsigned reserved       : 3;
 315         } b;
 316 } special_t;
 317
 318 /*
 319  * ATA DATA Register Special.
 320  * ATA NSECTOR Count Register().
 321  * ATAPI Byte Count Register.
 322  */
 323 typedef union {
 324         unsigned all                    :16;
 325         struct {
 326 #if defined(__LITTLE_ENDIAN_BITFIELD)
 327                 unsigned low            :8;     /* LSB */
 328                 unsigned high           :8;     /* MSB */
 329 #elif defined(__BIG_ENDIAN_BITFIELD)
 330                 unsigned high           :8;     /* MSB */
 331                 unsigned low            :8;     /* LSB */
 332 #else
 333 #error "Please fix <asm/byteorder.h>"
 334 #endif
 335         } b;
 336 } ata_nsector_t, ata_data_t, atapi_bcount_t;
 337
 338 /*
 339  * ATA-IDE Select Register, aka Device-Head
 340  *
 341  * head         : always zeros here
 342  * unit         : drive select number: 0/1
 343  * bit5         : always 1
 344  * lba          : using LBA instead of CHS
 345  * bit7         : always 1
 346  */
 347 typedef union {
 348         unsigned all                    : 8;
 349         struct {
 350 #if defined(__LITTLE_ENDIAN_BITFIELD)
 351                 unsigned head           : 4;
 352                 unsigned unit           : 1;
 353                 unsigned bit5           : 1;
 354                 unsigned lba            : 1;
 355                 unsigned bit7           : 1;
 356 #elif defined(__BIG_ENDIAN_BITFIELD)
 357                 unsigned bit7           : 1;
 358                 unsigned lba            : 1;
 359                 unsigned bit5           : 1;
 360                 unsigned unit           : 1;
 361                 unsigned head           : 4;
 362 #else
 363 #error "Please fix <asm/byteorder.h>"
 364 #endif
 365         } b;
 366 } select_t, ata_select_t;
 367
 368 /*
 369  * ATAPI Feature Register
 370  *
 371  * dma          : Using DMA or PIO
 372  * reserved321  : Reserved
 373  * reserved654  : Reserved (Tag Type)
 374  * reserved7    : Reserved
 375  */
 376 typedef union {
 377         unsigned all                    :8;
 378         struct {
 379 #if defined(__LITTLE_ENDIAN_BITFIELD)
 380                 unsigned dma            :1;
 381                 unsigned reserved321    :3;
 382                 unsigned reserved654    :3;
 383                 unsigned reserved7      :1;
 384 #elif defined(__BIG_ENDIAN_BITFIELD)
 385                 unsigned reserved7      :1;
 386                 unsigned reserved654    :3;
 387                 unsigned reserved321    :3;
 388                 unsigned dma            :1;
 389 #else
 390 #error "Please fix <asm/byteorder.h>"
 391 #endif
 392         } b;
 393 } atapi_feature_t;
 394
 395 /*
 396  * ATAPI Interrupt Reason Register.
 397  *
 398  * cod          : Information transferred is command (1) or data (0)
 399  * io           : The device requests us to read (1) or write (0)
 400  * reserved     : Reserved
 401  */
 402 typedef union {
 403         unsigned all                    :8;
 404         struct {
 405 #if defined(__LITTLE_ENDIAN_BITFIELD)
 406                 unsigned cod            :1;
 407                 unsigned io             :1;
 408                 unsigned reserved       :6;
 409 #elif defined(__BIG_ENDIAN_BITFIELD)
 410                 unsigned reserved       :6;
 411                 unsigned io             :1;
 412                 unsigned cod            :1;
 413 #else
 414 #error "Please fix <asm/byteorder.h>"
 415 #endif
 416         } b;
 417 } atapi_ireason_t;
 418
 419 /*
 420  * Status returned from various ide_ functions
 421  */
 422 typedef enum {
 423         ide_stopped,    /* no drive operation was started */
 424         ide_started,    /* a drive operation was started, handler was set */
 425 } ide_startstop_t;
 426
 427 struct ide_driver_s;
 428 struct ide_settings_s;
 429
 430 #ifdef CONFIG_BLK_DEV_IDEACPI
 431 struct ide_acpi_drive_link;
 432 struct ide_acpi_hwif_link;
 433 #endif
 434
 435 typedef struct ide_drive_s {
 436         char            name[4];        /* drive name, such as "hda" */
 437         char            driver_req[10]; /* requests specific driver */
 438
 439         struct request_queue    *queue; /* request queue */
 440
 441         struct request          *rq;    /* current request */
 442         struct ide_drive_s      *next;  /* circular list of hwgroup drives */
 443         void            *driver_data;   /* extra driver data */
 444         struct hd_driveid       *id;    /* drive model identification info */
 445 #ifdef CONFIG_IDE_PROC_FS
 446         struct proc_dir_entry *proc;    /* /proc/ide/ directory entry */
 447         struct ide_settings_s *settings;/* /proc/ide/ drive settings */
 448 #endif
 449         struct hwif_s           *hwif;  /* actually (ide_hwif_t *) */
 450
 451         unsigned long sleep;            /* sleep until this time */
 452         unsigned long service_start;    /* time we started last request */
 453         unsigned long service_time;     /* service time of last request */
 454         unsigned long timeout;          /* max time to wait for irq */
 455
 456         special_t       special;        /* special action flags */
 457         select_t        select;         /* basic drive/head select reg value */
 458
 459         u8      keep_settings;          /* restore settings after drive reset */
 460         u8      using_dma;              /* disk is using dma for read/write */
 461         u8      retry_pio;              /* retrying dma capable host in pio */
 462         u8      state;                  /* retry state */
 463         u8      waiting_for_dma;        /* dma currently in progress */
 464         u8      unmask;                 /* okay to unmask other irqs */
 465         u8      bswap;                  /* byte swap data */
 466         u8      noflush;                /* don't attempt flushes */
 467         u8      dsc_overlap;            /* DSC overlap */
 468         u8      nice1;                  /* give potential excess bandwidth */
 469
 470         unsigned present        : 1;    /* drive is physically present */
 471         unsigned dead           : 1;    /* device ejected hint */
 472         unsigned id_read        : 1;    /* 1=id read from disk 0 = synthetic */
 473         unsigned noprobe        : 1;    /* from:  hdx=noprobe */
 474         unsigned removable      : 1;    /* 1 if need to do check_media_change */
 475         unsigned attach         : 1;    /* needed for removable devices */
 476         unsigned forced_geom    : 1;    /* 1 if hdx=c,h,s was given at boot */
 477         unsigned no_unmask      : 1;    /* disallow setting unmask bit */
 478         unsigned no_io_32bit    : 1;    /* disallow enabling 32bit I/O */
 479         unsigned atapi_overlap  : 1;    /* ATAPI overlap (not supported) */
 480         unsigned nice0          : 1;    /* give obvious excess bandwidth */
 481         unsigned nice2          : 1;    /* give a share in our own bandwidth */
 482         unsigned doorlocking    : 1;    /* for removable only: door lock/unlock works */
 483         unsigned nodma          : 1;    /* disallow DMA */
 484         unsigned autotune       : 2;    /* 0=default, 1=autotune, 2=noautotune */
 485         unsigned remap_0_to_1   : 1;    /* 0=noremap, 1=remap 0->1 (for EZDrive) */
 486         unsigned blocked        : 1;    /* 1=powermanagment told us not to do anything, so sleep nicely */
 487         unsigned vdma           : 1;    /* 1=doing PIO over DMA 0=doing normal DMA */
 488         unsigned scsi           : 1;    /* 0=default, 1=ide-scsi emulation */
 489         unsigned sleeping       : 1;    /* 1=sleeping & sleep field valid */
 490         unsigned post_reset     : 1;
 491         unsigned udma33_warned  : 1;
 492
 493         u8      addressing;     /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
 494         u8      quirk_list;     /* considered quirky, set for a specific host */
 495         u8      init_speed;     /* transfer rate set at boot */
 496         u8      current_speed;  /* current transfer rate set */
 497         u8      desired_speed;  /* desired transfer rate set */
 498         u8      dn;             /* now wide spread use */
 499         u8      wcache;         /* status of write cache */
 500         u8      acoustic;       /* acoustic management */
 501         u8      media;          /* disk, cdrom, tape, floppy, ... */
 502         u8      ctl;            /* "normal" value for IDE_CONTROL_REG */
 503         u8      ready_stat;     /* min status value for drive ready */
 504         u8      mult_count;     /* current multiple sector setting */
 505         u8      mult_req;       /* requested multiple sector setting */
 506         u8      tune_req;       /* requested drive tuning setting */
 507         u8      io_32bit;       /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
 508         u8      bad_wstat;      /* used for ignoring WRERR_STAT */
 509         u8      nowerr;         /* used for ignoring WRERR_STAT */
 510         u8      sect0;          /* offset of first sector for DM6:DDO */
 511         u8      head;           /* "real" number of heads */
 512         u8      sect;           /* "real" sectors per track */
 513         u8      bios_head;      /* BIOS/fdisk/LILO number of heads */
 514         u8      bios_sect;      /* BIOS/fdisk/LILO sectors per track */
 515
 516         unsigned int    bios_cyl;       /* BIOS/fdisk/LILO number of cyls */
 517         unsigned int    cyl;            /* "real" number of cyls */
 518         unsigned int    drive_data;     /* used by set_pio_mode/selectproc */
 519         unsigned int    failures;       /* current failure count */
 520         unsigned int    max_failures;   /* maximum allowed failure count */
 521         u64             probed_capacity;/* initial reported media capacity (ide-cd only currently) */
 522
 523         u64             capacity64;     /* total number of sectors */
 524
 525         int             lun;            /* logical unit */
 526         int             crc_count;      /* crc counter to reduce drive speed */
 527 #ifdef CONFIG_BLK_DEV_IDEACPI
 528         struct ide_acpi_drive_link *acpidata;
 529 #endif
 530         struct list_head list;
 531         struct device   gendev;
 532         struct completion gendev_rel_comp;      /* to deal with device release() */
 533 } ide_drive_t;
 534
 535 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
 536
 537 #define IDE_CHIPSET_PCI_MASK    \
 538     ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
 539 #define IDE_CHIPSET_IS_PCI(c)   ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
 540
 541 struct ide_port_info;
 542
 543 typedef struct hwif_s {
 544         struct hwif_s *next;            /* for linked-list in ide_hwgroup_t */
 545         struct hwif_s *mate;            /* other hwif from same PCI chip */
 546         struct hwgroup_s *hwgroup;      /* actually (ide_hwgroup_t *) */
 547         struct proc_dir_entry *proc;    /* /proc/ide/ directory entry */
 548
 549         char name[6];                   /* name of interface, eg. "ide0" */
 550
 551                 /* task file registers for pata and sata */
 552         unsigned long   io_ports[IDE_NR_PORTS];
 553         unsigned long   sata_scr[SATA_NR_PORTS];
 554         unsigned long   sata_misc[SATA_NR_PORTS];
 555
 556         ide_drive_t     drives[MAX_DRIVES];     /* drive info */
 557
 558         u8 major;       /* our major number */
 559         u8 index;       /* 0 for ide0; 1 for ide1; ... */
 560         u8 channel;     /* for dual-port chips: 0=primary, 1=secondary */
 561         u8 straight8;   /* Alan's straight 8 check */
 562         u8 bus_state;   /* power state of the IDE bus */
 563
 564         u32 host_flags;
 565
 566         u8 pio_mask;
 567
 568         u8 ultra_mask;
 569         u8 mwdma_mask;
 570         u8 swdma_mask;
 571
 572         u8 cbl;         /* cable type */
 573
 574         hwif_chipset_t chipset; /* sub-module for tuning.. */
 575
 576         struct pci_dev  *pci_dev;       /* for pci chipsets */
 577         const struct ide_port_info *cds;        /* chipset device struct */
 578
 579         ide_ack_intr_t *ack_intr;
 580
 581         void (*rw_disk)(ide_drive_t *, struct request *);
 582
 583 #if 0
 584         ide_hwif_ops_t  *hwifops;
 585 #else
 586         /* routine to program host for PIO mode */
 587         void    (*set_pio_mode)(ide_drive_t *, const u8);
 588         /* routine to program host for DMA mode */
 589         void    (*set_dma_mode)(ide_drive_t *, const u8);
 590         /* tweaks hardware to select drive */
 591         void    (*selectproc)(ide_drive_t *);
 592         /* chipset polling based on hba specifics */
 593         int     (*reset_poll)(ide_drive_t *);
 594         /* chipset specific changes to default for device-hba resets */
 595         void    (*pre_reset)(ide_drive_t *);
 596         /* routine to reset controller after a disk reset */
 597         void    (*resetproc)(ide_drive_t *);
 598         /* special interrupt handling for shared pci interrupts */
 599         void    (*intrproc)(ide_drive_t *);
 600         /* special host masking for drive selection */
 601         void    (*maskproc)(ide_drive_t *, int);
 602         /* check host's drive quirk list */
 603         int     (*quirkproc)(ide_drive_t *);
 604         /* driver soft-power interface */
 605         int     (*busproc)(ide_drive_t *, int);
 606 #endif
 607         u8 (*mdma_filter)(ide_drive_t *);
 608         u8 (*udma_filter)(ide_drive_t *);
 609
 610         void (*fixup)(struct hwif_s *);
 611
 612         void (*ata_input_data)(ide_drive_t *, void *, u32);
 613         void (*ata_output_data)(ide_drive_t *, void *, u32);
 614
 615         void (*atapi_input_bytes)(ide_drive_t *, void *, u32);
 616         void (*atapi_output_bytes)(ide_drive_t *, void *, u32);
 617
 618         int (*dma_setup)(ide_drive_t *);
 619         void (*dma_exec_cmd)(ide_drive_t *, u8);
 620         void (*dma_start)(ide_drive_t *);
 621         int (*ide_dma_end)(ide_drive_t *drive);
 622         int (*ide_dma_on)(ide_drive_t *drive);
 623         void (*dma_off_quietly)(ide_drive_t *drive);
 624         int (*ide_dma_test_irq)(ide_drive_t *drive);
 625         void (*ide_dma_clear_irq)(ide_drive_t *drive);
 626         void (*dma_host_on)(ide_drive_t *drive);
 627         void (*dma_host_off)(ide_drive_t *drive);
 628         void (*dma_lost_irq)(ide_drive_t *drive);
 629         void (*dma_timeout)(ide_drive_t *drive);
 630
 631         void (*OUTB)(u8 addr, unsigned long port);
 632         void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
 633         void (*OUTW)(u16 addr, unsigned long port);
 634         void (*OUTSW)(unsigned long port, void *addr, u32 count);
 635         void (*OUTSL)(unsigned long port, void *addr, u32 count);
 636
 637         u8  (*INB)(unsigned long port);
 638         u16 (*INW)(unsigned long port);
 639         void (*INSW)(unsigned long port, void *addr, u32 count);
 640         void (*INSL)(unsigned long port, void *addr, u32 count);
 641
 642         /* dma physical region descriptor table (cpu view) */
 643         unsigned int    *dmatable_cpu;
 644         /* dma physical region descriptor table (dma view) */
 645         dma_addr_t      dmatable_dma;
 646         /* Scatter-gather list used to build the above */
 647         struct scatterlist *sg_table;
 648         int sg_max_nents;               /* Maximum number of entries in it */
 649         int sg_nents;                   /* Current number of entries in it */
 650         int sg_dma_direction;           /* dma transfer direction */
 651
 652         /* data phase of the active command (currently only valid for PIO/DMA) */
 653         int             data_phase;
 654
 655         unsigned int nsect;
 656         unsigned int nleft;
 657         struct scatterlist *cursg;
 658         unsigned int cursg_ofs;
 659
 660         int             rqsize;         /* max sectors per request */
 661         int             irq;            /* our irq number */
 662
 663         unsigned long   dma_base;       /* base addr for dma ports */
 664         unsigned long   dma_command;    /* dma command register */
 665         unsigned long   dma_vendor1;    /* dma vendor 1 register */
 666         unsigned long   dma_status;     /* dma status register */
 667         unsigned long   dma_vendor3;    /* dma vendor 3 register */
 668         unsigned long   dma_prdtable;   /* actual prd table address */
 669
 670         unsigned long   config_data;    /* for use by chipset-specific code */
 671         unsigned long   select_data;    /* for use by chipset-specific code */
 672
 673         unsigned long   extra_base;     /* extra addr for dma ports */
 674         unsigned        extra_ports;    /* number of extra dma ports */
 675
 676         unsigned        noprobe    : 1; /* don't probe for this interface */
 677         unsigned        present    : 1; /* this interface exists */
 678         unsigned        hold       : 1; /* this interface is always present */
 679         unsigned        serialized : 1; /* serialized all channel operation */
 680         unsigned        sharing_irq: 1; /* 1 = sharing irq with another hwif */
 681         unsigned        reset      : 1; /* reset after probe */
 682         unsigned        auto_poll  : 1; /* supports nop auto-poll */
 683         unsigned        sg_mapped  : 1; /* sg_table and sg_nents are ready */
 684         unsigned        no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
 685         unsigned        mmio       : 1; /* host uses MMIO */
 686
 687         struct device   gendev;
 688         struct completion gendev_rel_comp; /* To deal with device release() */
 689
 690         void            *hwif_data;     /* extra hwif data */
 691
 692         unsigned dma;
 693
 694 #ifdef CONFIG_BLK_DEV_IDEACPI
 695         struct ide_acpi_hwif_link *acpidata;
 696 #endif
 697 } ____cacheline_internodealigned_in_smp ide_hwif_t;
 698
 699 /*
 700  *  internal ide interrupt handler type
 701  */
 702 typedef ide_startstop_t (ide_pre_handler_t)(ide_drive_t *, struct request *);
 703 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
 704 typedef int (ide_expiry_t)(ide_drive_t *);
 705
 706 typedef struct hwgroup_s {
 707                 /* irq handler, if active */
 708         ide_startstop_t (*handler)(ide_drive_t *);
 709                 /* irq handler, suspended if active */
 710         ide_startstop_t (*handler_save)(ide_drive_t *);
 711                 /* BOOL: protects all fields below */
 712         volatile int busy;
 713                 /* BOOL: wake us up on timer expiry */
 714         unsigned int sleeping   : 1;
 715                 /* BOOL: polling active & poll_timeout field valid */
 716         unsigned int polling    : 1;
 717                 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
 718         unsigned int resetting  : 1;
 719
 720                 /* current drive */
 721         ide_drive_t *drive;
 722                 /* ptr to current hwif in linked-list */
 723         ide_hwif_t *hwif;
 724
 725                 /* for pci chipsets */
 726         struct pci_dev *pci_dev;
 727
 728                 /* current request */
 729         struct request *rq;
 730                 /* failsafe timer */
 731         struct timer_list timer;
 732                 /* local copy of current write rq */
 733         struct request wrq;
 734                 /* timeout value during long polls */
 735         unsigned long poll_timeout;
 736                 /* queried upon timeouts */
 737         int (*expiry)(ide_drive_t *);
 738                 /* ide_system_bus_speed */
 739         int pio_clock;
 740         int req_gen;
 741         int req_gen_timer;
 742
 743         unsigned char cmd_buf[4];
 744 } ide_hwgroup_t;
 745
 746 typedef struct ide_driver_s ide_driver_t;
 747
 748 extern struct mutex ide_setting_mtx;
 749
 750 int set_io_32bit(ide_drive_t *, int);
 751 int set_pio_mode(ide_drive_t *, int);
 752 int set_using_dma(ide_drive_t *, int);
 753
 754 #ifdef CONFIG_IDE_PROC_FS
 755 /*
 756  * configurable drive settings
 757  */
 758
 759 #define TYPE_INT        0
 760 #define TYPE_BYTE       1
 761 #define TYPE_SHORT      2
 762
 763 #define SETTING_READ    (1 << 0)
 764 #define SETTING_WRITE   (1 << 1)
 765 #define SETTING_RW      (SETTING_READ | SETTING_WRITE)
 766
 767 typedef int (ide_procset_t)(ide_drive_t *, int);
 768 typedef struct ide_settings_s {
 769         char                    *name;
 770         int                     rw;
 771         int                     data_type;
 772         int                     min;
 773         int                     max;
 774         int                     mul_factor;
 775         int                     div_factor;
 776         void                    *data;
 777         ide_procset_t           *set;
 778         int                     auto_remove;
 779         struct ide_settings_s   *next;
 780 } ide_settings_t;
 781
 782 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
 783
 784 /*
 785  * /proc/ide interface
 786  */
 787 typedef struct {
 788         const char      *name;
 789         mode_t          mode;
 790         read_proc_t     *read_proc;
 791         write_proc_t    *write_proc;
 792 } ide_proc_entry_t;
 793
 794 void proc_ide_create(void);
 795 void proc_ide_destroy(void);
 796 void ide_proc_register_port(ide_hwif_t *);
 797 void ide_proc_unregister_port(ide_hwif_t *);
 798 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
 799 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
 800
 801 void ide_add_generic_settings(ide_drive_t *);
 802
 803 read_proc_t proc_ide_read_capacity;
 804 read_proc_t proc_ide_read_geometry;
 805
 806 #ifdef CONFIG_BLK_DEV_IDEPCI
 807 void ide_pci_create_host_proc(const char *, get_info_t *);
 808 #endif
 809
 810 /*
 811  * Standard exit stuff:
 812  */
 813 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
 814 {                                       \
 815         len -= off;                     \
 816         if (len < count) {              \
 817                 *eof = 1;               \
 818                 if (len <= 0)           \
 819                         return 0;       \
 820         } else                          \
 821                 len = count;            \
 822         *start = page + off;            \
 823         return len;                     \
 824 }
 825 #else
 826 static inline void proc_ide_create(void) { ; }
 827 static inline void proc_ide_destroy(void) { ; }
 828 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
 829 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
 830 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
 831 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
 832 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
 833 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
 834 #endif
 835
 836 /*
 837  * Power Management step value (rq->pm->pm_step).
 838  *
 839  * The step value starts at 0 (ide_pm_state_start_suspend) for a
 840  * suspend operation or 1000 (ide_pm_state_start_resume) for a
 841  * resume operation.
 842  *
 843  * For each step, the core calls the subdriver start_power_step() first.
 844  * This can return:
 845  *      - ide_stopped : In this case, the core calls us back again unless
 846  *                      step have been set to ide_power_state_completed.
 847  *      - ide_started : In this case, the channel is left busy until an
 848  *                      async event (interrupt) occurs.
 849  * Typically, start_power_step() will issue a taskfile request with
 850  * do_rw_taskfile().
 851  *
 852  * Upon reception of the interrupt, the core will call complete_power_step()
 853  * with the error code if any. This routine should update the step value
 854  * and return. It should not start a new request. The core will call
 855  * start_power_step for the new step value, unless step have been set to
 856  * ide_power_state_completed.
 857  *
 858  * Subdrivers are expected to define their own additional power
 859  * steps from 1..999 for suspend and from 1001..1999 for resume,
 860  * other values are reserved for future use.
 861  */
 862
 863 enum {
 864         ide_pm_state_completed          = -1,
 865         ide_pm_state_start_suspend      = 0,
 866         ide_pm_state_start_resume       = 1000,
 867 };
 868
 869 /*
 870  * Subdrivers support.
 871  *
 872  * The gendriver.owner field should be set to the module owner of this driver.
 873  * The gendriver.name field should be set to the name of this driver
 874  */
 875 struct ide_driver_s {
 876         const char                      *version;
 877         u8                              media;
 878         unsigned supports_dsc_overlap   : 1;
 879         ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
 880         int             (*end_request)(ide_drive_t *, int, int);
 881         ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
 882         ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
 883         struct device_driver    gen_driver;
 884         int             (*probe)(ide_drive_t *);
 885         void            (*remove)(ide_drive_t *);
 886         void            (*resume)(ide_drive_t *);
 887         void            (*shutdown)(ide_drive_t *);
 888 #ifdef CONFIG_IDE_PROC_FS
 889         ide_proc_entry_t        *proc;
 890 #endif
 891 };
 892
 893 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
 894
 895 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
 896
 897 /*
 898  * ide_hwifs[] is the master data structure used to keep track
 899  * of just about everything in ide.c.  Whenever possible, routines
 900  * should be using pointers to a drive (ide_drive_t *) or
 901  * pointers to a hwif (ide_hwif_t *), rather than indexing this
 902  * structure directly (the allocation/layout may change!).
 903  *
 904  */
 905 #ifndef _IDE_C
 906 extern  ide_hwif_t      ide_hwifs[];            /* master data repository */
 907 #endif
 908 extern int noautodma;
 909
 910 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
 911 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
 912                              int uptodate, int nr_sectors);
 913
 914 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
 915
 916 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
 917                          ide_expiry_t *);
 918
 919 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
 920
 921 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
 922
 923 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
 924
 925 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
 926
 927 extern void ide_fix_driveid(struct hd_driveid *);
 928
 929 extern void ide_fixstring(u8 *, const int, const int);
 930
 931 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
 932
 933 extern ide_startstop_t ide_do_reset (ide_drive_t *);
 934
 935 extern void ide_init_drive_cmd (struct request *rq);
 936
 937 /*
 938  * "action" parameter type for ide_do_drive_cmd() below.
 939  */
 940 typedef enum {
 941         ide_wait,       /* insert rq at end of list, and wait for it */
 942         ide_preempt,    /* insert rq in front of current request */
 943         ide_head_wait,  /* insert rq in front of current request and wait for it */
 944         ide_end         /* insert rq at end of list, but don't wait for it */
 945 } ide_action_t;
 946
 947 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
 948
 949 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
 950
 951 /*
 952  * Issue ATA command and wait for completion.
 953  * Use for implementing commands in kernel
 954  *
 955  *  (ide_drive_t *drive, u8 cmd, u8 nsect, u8 feature, u8 sectors, u8 *buf)
 956  */
 957 extern int ide_wait_cmd(ide_drive_t *, u8, u8, u8, u8, u8 *);
 958
 959 enum {
 960         IDE_TFLAG_LBA48                 = (1 << 0),
 961         IDE_TFLAG_NO_SELECT_MASK        = (1 << 1),
 962         IDE_TFLAG_FLAGGED               = (1 << 2),
 963         IDE_TFLAG_OUT_DATA              = (1 << 3),
 964         IDE_TFLAG_OUT_HOB_FEATURE       = (1 << 4),
 965         IDE_TFLAG_OUT_HOB_NSECT         = (1 << 5),
 966         IDE_TFLAG_OUT_HOB_LBAL          = (1 << 6),
 967         IDE_TFLAG_OUT_HOB_LBAM          = (1 << 7),
 968         IDE_TFLAG_OUT_HOB_LBAH          = (1 << 8),
 969         IDE_TFLAG_OUT_HOB               = IDE_TFLAG_OUT_HOB_FEATURE |
 970                                           IDE_TFLAG_OUT_HOB_NSECT |
 971                                           IDE_TFLAG_OUT_HOB_LBAL |
 972                                           IDE_TFLAG_OUT_HOB_LBAM |
 973                                           IDE_TFLAG_OUT_HOB_LBAH,
 974         IDE_TFLAG_OUT_FEATURE           = (1 << 9),
 975         IDE_TFLAG_OUT_NSECT             = (1 << 10),
 976         IDE_TFLAG_OUT_LBAL              = (1 << 11),
 977         IDE_TFLAG_OUT_LBAM              = (1 << 12),
 978         IDE_TFLAG_OUT_LBAH              = (1 << 13),
 979         IDE_TFLAG_OUT_TF                = IDE_TFLAG_OUT_FEATURE |
 980                                           IDE_TFLAG_OUT_NSECT |
 981                                           IDE_TFLAG_OUT_LBAL |
 982                                           IDE_TFLAG_OUT_LBAM |
 983                                           IDE_TFLAG_OUT_LBAH,
 984         IDE_TFLAG_OUT_DEVICE            = (1 << 14),
 985 };
 986
 987 struct ide_taskfile {
 988         u8      hob_data;       /*  0: high data byte (for TASKFILE IOCTL) */
 989
 990         u8      hob_feature;    /*  1-5: additional data to support LBA48 */
 991         u8      hob_nsect;
 992         u8      hob_lbal;
 993         u8      hob_lbam;
 994         u8      hob_lbah;
 995
 996         u8      data;           /*  6: low data byte (for TASKFILE IOCTL) */
 997
 998         union {                 /*  7: */
 999                 u8 error;       /*   read:  error */
1000                 u8 feature;     /*  write: feature */
1001         };
1002
1003         u8      nsect;          /*  8: number of sectors */
1004         u8      lbal;           /*  9: LBA low */
1005         u8      lbam;           /* 10: LBA mid */
1006         u8      lbah;           /* 11: LBA high */
1007
1008         u8      device;         /* 12: device select */
1009
1010         union {                 /* 13: */
1011                 u8 status;      /*  read: status  */
1012                 u8 command;     /* write: command */
1013         };
1014 };
1015
1016 typedef struct ide_task_s {
1017         union {
1018                 struct ide_taskfile     tf;
1019                 u8                      tf_array[14];
1020         };
1021         u16                     tf_flags;
1022         ide_reg_valid_t         tf_in_flags;
1023         int                     data_phase;
1024         int                     command_type;
1025         ide_pre_handler_t       *prehandler;
1026         ide_handler_t           *handler;
1027         struct request          *rq;            /* copy of request */
1028         void                    *special;       /* valid_t generally */
1029 } ide_task_t;
1030
1031 void ide_tf_load(ide_drive_t *, ide_task_t *);
1032
1033 extern u32 ide_read_24(ide_drive_t *);
1034
1035 extern void SELECT_DRIVE(ide_drive_t *);
1036 extern void SELECT_INTERRUPT(ide_drive_t *);
1037 extern void SELECT_MASK(ide_drive_t *, int);
1038 extern void QUIRK_LIST(ide_drive_t *);
1039
1040 extern int drive_is_ready(ide_drive_t *);
1041
1042 /*
1043  * taskfile io for disks for now...and builds request from ide_ioctl
1044  */
1045 extern ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
1046
1047 /*
1048  * Special Flagged Register Validation Caller
1049  */
1050 extern ide_startstop_t flagged_taskfile(ide_drive_t *, ide_task_t *);
1051
1052 extern ide_startstop_t set_multmode_intr(ide_drive_t *);
1053 extern ide_startstop_t set_geometry_intr(ide_drive_t *);
1054 extern ide_startstop_t recal_intr(ide_drive_t *);
1055 extern ide_startstop_t task_no_data_intr(ide_drive_t *);
1056 extern ide_startstop_t task_in_intr(ide_drive_t *);
1057 extern ide_startstop_t pre_task_out_intr(ide_drive_t *, struct request *);
1058
1059 extern int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *);
1060
1061 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
1062
1063 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
1064 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
1065 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
1066
1067 extern int system_bus_clock(void);
1068
1069 extern int ide_driveid_update(ide_drive_t *);
1070 extern int ide_ata66_check(ide_drive_t *, ide_task_t *);
1071 extern int ide_config_drive_speed(ide_drive_t *, u8);
1072 extern u8 eighty_ninty_three (ide_drive_t *);
1073 extern int set_transfer(ide_drive_t *, ide_task_t *);
1074 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
1075
1076 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
1077
1078 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
1079
1080 extern int ide_spin_wait_hwgroup(ide_drive_t *);
1081 extern void ide_timer_expiry(unsigned long);
1082 extern irqreturn_t ide_intr(int irq, void *dev_id);
1083 extern void do_ide_request(struct request_queue *);
1084
1085 void ide_init_disk(struct gendisk *, ide_drive_t *);
1086
1087 extern int ideprobe_init(void);
1088
1089 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1090 extern void ide_scan_pcibus(int scan_direction) __init;
1091 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1092 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1093 #else
1094 #define ide_pci_register_driver(d) pci_register_driver(d)
1095 #endif
1096
1097 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1098 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1099
1100 extern void default_hwif_iops(ide_hwif_t *);
1101 extern void default_hwif_mmiops(ide_hwif_t *);
1102 extern void default_hwif_transport(ide_hwif_t *);
1103
1104 typedef struct ide_pci_enablebit_s {
1105         u8      reg;    /* byte pci reg holding the enable-bit */
1106         u8      mask;   /* mask to isolate the enable-bit */
1107         u8      val;    /* value of masked reg when "enabled" */
1108 } ide_pci_enablebit_t;
1109
1110 enum {
1111         /* Uses ISA control ports not PCI ones. */
1112         IDE_HFLAG_ISA_PORTS             = (1 << 0),
1113         /* single port device */
1114         IDE_HFLAG_SINGLE                = (1 << 1),
1115         /* don't use legacy PIO blacklist */
1116         IDE_HFLAG_PIO_NO_BLACKLIST      = (1 << 2),
1117         /* don't use conservative PIO "downgrade" */
1118         IDE_HFLAG_PIO_NO_DOWNGRADE      = (1 << 3),
1119         /* use PIO8/9 for prefetch off/on */
1120         IDE_HFLAG_ABUSE_PREFETCH        = (1 << 4),
1121         /* use PIO6/7 for fast-devsel off/on */
1122         IDE_HFLAG_ABUSE_FAST_DEVSEL     = (1 << 5),
1123         /* use 100-102 and 200-202 PIO values to set DMA modes */
1124         IDE_HFLAG_ABUSE_DMA_MODES       = (1 << 6),
1125         /*
1126          * keep DMA setting when programming PIO mode, may be used only
1127          * for hosts which have separate PIO and DMA timings (ie. PMAC)
1128          */
1129         IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1130         /* program host for the transfer mode after programming device */
1131         IDE_HFLAG_POST_SET_MODE         = (1 << 8),
1132         /* don't program host/device for the transfer mode ("smart" hosts) */
1133         IDE_HFLAG_NO_SET_MODE           = (1 << 9),
1134         /* trust BIOS for programming chipset/device for DMA */
1135         IDE_HFLAG_TRUST_BIOS_FOR_DMA    = (1 << 10),
1136         /* host uses VDMA */
1137         IDE_HFLAG_VDMA                  = (1 << 11),
1138         /* ATAPI DMA is unsupported */
1139         IDE_HFLAG_NO_ATAPI_DMA          = (1 << 12),
1140         /* set if host is a "bootable" controller */
1141         IDE_HFLAG_BOOTABLE              = (1 << 13),
1142         /* host doesn't support DMA */
1143         IDE_HFLAG_NO_DMA                = (1 << 14),
1144         /* check if host is PCI IDE device before allowing DMA */
1145         IDE_HFLAG_NO_AUTODMA            = (1 << 15),
1146         /* host is CS5510/CS5520 */
1147         IDE_HFLAG_CS5520                = (1 << 16),
1148         /* no LBA48 */
1149         IDE_HFLAG_NO_LBA48              = (1 << 17),
1150         /* no LBA48 DMA */
1151         IDE_HFLAG_NO_LBA48_DMA          = (1 << 18),
1152         /* data FIFO is cleared by an error */
1153         IDE_HFLAG_ERROR_STOPS_FIFO      = (1 << 19),
1154         /* serialize ports */
1155         IDE_HFLAG_SERIALIZE             = (1 << 20),
1156         /* use legacy IRQs */
1157         IDE_HFLAG_LEGACY_IRQS           = (1 << 21),
1158         /* force use of legacy IRQs */
1159         IDE_HFLAG_FORCE_LEGACY_IRQS     = (1 << 22),
1160         /* limit LBA48 requests to 256 sectors */
1161         IDE_HFLAG_RQSIZE_256            = (1 << 23),
1162         /* use 32-bit I/O ops */
1163         IDE_HFLAG_IO_32BIT              = (1 << 24),
1164         /* unmask IRQs */
1165         IDE_HFLAG_UNMASK_IRQS           = (1 << 25),
1166 };
1167
1168 #ifdef CONFIG_BLK_DEV_OFFBOARD
1169 # define IDE_HFLAG_OFF_BOARD    IDE_HFLAG_BOOTABLE
1170 #else
1171 # define IDE_HFLAG_OFF_BOARD    0
1172 #endif
1173
1174 struct ide_port_info {
1175         char                    *name;
1176         unsigned int            (*init_chipset)(struct pci_dev *, const char *);
1177         void                    (*init_iops)(ide_hwif_t *);
1178         void                    (*init_hwif)(ide_hwif_t *);
1179         void                    (*init_dma)(ide_hwif_t *, unsigned long);
1180         void                    (*fixup)(ide_hwif_t *);
1181         ide_pci_enablebit_t     enablebits[2];
1182         hwif_chipset_t          chipset;
1183         unsigned int            extra;
1184         u32                     host_flags;
1185         u8                      pio_mask;
1186         u8                      swdma_mask;
1187         u8                      mwdma_mask;
1188         u8                      udma_mask;
1189 };
1190
1191 int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1192 int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1193
1194 void ide_map_sg(ide_drive_t *, struct request *);
1195 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1196
1197 #define BAD_DMA_DRIVE           0
1198 #define GOOD_DMA_DRIVE          1
1199
1200 struct drive_list_entry {
1201         const char *id_model;
1202         const char *id_firmware;
1203 };
1204
1205 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1206
1207 #ifdef CONFIG_BLK_DEV_IDEDMA
1208 int __ide_dma_bad_drive(ide_drive_t *);
1209 int ide_id_dma_bug(ide_drive_t *);
1210
1211 u8 ide_find_dma_mode(ide_drive_t *, u8);
1212
1213 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1214 {
1215         return ide_find_dma_mode(drive, XFER_UDMA_6);
1216 }
1217
1218 void ide_dma_off(ide_drive_t *);
1219 int ide_set_dma(ide_drive_t *);
1220 ide_startstop_t ide_dma_intr(ide_drive_t *);
1221
1222 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1223 extern int ide_build_sglist(ide_drive_t *, struct request *);
1224 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1225 extern void ide_destroy_dmatable(ide_drive_t *);
1226 extern int ide_release_dma(ide_hwif_t *);
1227 extern void ide_setup_dma(ide_hwif_t *, unsigned long, unsigned int);
1228
1229 void ide_dma_host_off(ide_drive_t *);
1230 void ide_dma_off_quietly(ide_drive_t *);
1231 void ide_dma_host_on(ide_drive_t *);
1232 extern int __ide_dma_on(ide_drive_t *);
1233 extern int ide_dma_setup(ide_drive_t *);
1234 extern void ide_dma_start(ide_drive_t *);
1235 extern int __ide_dma_end(ide_drive_t *);
1236 extern void ide_dma_lost_irq(ide_drive_t *);
1237 extern void ide_dma_timeout(ide_drive_t *);
1238 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
1239
1240 #else
1241 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1242 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1243 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1244 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1245 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1246 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1247 #endif /* CONFIG_BLK_DEV_IDEDMA */
1248
1249 #ifndef CONFIG_BLK_DEV_IDEDMA_PCI
1250 static inline void ide_release_dma(ide_hwif_t *drive) {;}
1251 #endif
1252
1253 #ifdef CONFIG_BLK_DEV_IDEACPI
1254 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1255 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1256 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1257 extern void ide_acpi_init(ide_hwif_t *hwif);
1258 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1259 #else
1260 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1261 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1262 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1263 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1264 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1265 #endif
1266
1267 extern int ide_hwif_request_regions(ide_hwif_t *hwif);
1268 extern void ide_hwif_release_regions(ide_hwif_t* hwif);
1269 extern void ide_unregister (unsigned int index);
1270
1271 void ide_register_region(struct gendisk *);
1272 void ide_unregister_region(struct gendisk *);
1273
1274 void ide_undecoded_slave(ide_hwif_t *);
1275
1276 int ide_device_add(u8 idx[4]);
1277
1278 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1279 {
1280         return hwif->hwif_data;
1281 }
1282
1283 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1284 {
1285         hwif->hwif_data = data;
1286 }
1287
1288 const char *ide_xfer_verbose(u8 mode);
1289 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1290 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1291
1292 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1293 {
1294         return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1295 }
1296
1297 static inline int ide_dev_is_sata(struct hd_driveid *id)
1298 {
1299         /*
1300          * See if word 93 is 0 AND drive is at least ATA-5 compatible
1301          * verifying that word 80 by casting it to a signed type --
1302          * this trick allows us to filter out the reserved values of
1303          * 0x0000 and 0xffff along with the earlier ATA revisions...
1304          */
1305         if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1306                 return 1;
1307         return 0;
1308 }
1309
1310 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1311
1312 typedef struct ide_pio_timings_s {
1313         int     setup_time;     /* Address setup (ns) minimum */
1314         int     active_time;    /* Active pulse (ns) minimum */
1315         int     cycle_time;     /* Cycle time (ns) minimum = */
1316                                 /* active + recovery (+ setup for some chips) */
1317 } ide_pio_timings_t;
1318
1319 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1320 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1321 extern const ide_pio_timings_t ide_pio_timings[6];
1322
1323 int ide_set_pio_mode(ide_drive_t *, u8);
1324 int ide_set_dma_mode(ide_drive_t *, u8);
1325
1326 void ide_set_pio(ide_drive_t *, u8);
1327
1328 static inline void ide_set_max_pio(ide_drive_t *drive)
1329 {
1330         ide_set_pio(drive, 255);
1331 }
1332
1333 extern spinlock_t ide_lock;
1334 extern struct mutex ide_cfg_mtx;
1335 /*
1336  * Structure locking:
1337  *
1338  * ide_cfg_mtx and ide_lock together protect changes to
1339  * ide_hwif_t->{next,hwgroup}
1340  * ide_drive_t->next
1341  *
1342  * ide_hwgroup_t->busy: ide_lock
1343  * ide_hwgroup_t->hwif: ide_lock
1344  * ide_hwif_t->mate: constant, no locking
1345  * ide_drive_t->hwif: constant, no locking
1346  */
1347
1348 #define local_irq_set(flags)    do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1349
1350 extern struct bus_type ide_bus_type;
1351
1352 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1353 #define ide_id_has_flush_cache(id)      ((id)->cfs_enable_2 & 0x3000)
1354
1355 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1356 #define ide_id_has_flush_cache_ext(id)  \
1357         (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1358
1359 static inline int hwif_to_node(ide_hwif_t *hwif)
1360 {
1361         struct pci_dev *dev = hwif->pci_dev;
1362         return dev ? pcibus_to_node(dev->bus) : -1;
1363 }
1364
1365 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1366 {
1367         ide_hwif_t *hwif        = HWIF(drive);
1368
1369         return &hwif->drives[(drive->dn ^ 1) & 1];
1370 }
1371
1372 #endif /* _IDE_H */