include/asm-x86/smp_64.h

   1 #ifndef __ASM_SMP_H
   2 #define __ASM_SMP_H
   3
   4 #include <linux/cpumask.h>
   5 #include <linux/init.h>
   6
   7 /*
   8  * We need the APIC definitions automatically as part of 'smp.h'
   9  */
  10 #include <asm/apic.h>
  11 #include <asm/io_apic.h>
  12 #include <asm/mpspec.h>
  13 #include <asm/pda.h>
  14 #include <asm/thread_info.h>
  15
  16 extern cpumask_t cpu_initialized;
  17 extern cpumask_t cpu_callin_map;
  18
  19 extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
  20                                   void *info, int wait);
  21
  22 #ifdef CONFIG_SMP
  23
  24 #define raw_smp_processor_id()  read_pda(cpunumber)
  25
  26 #define stack_smp_processor_id()                                        \
  27 ({                                                                      \
  28         struct thread_info *ti;                                         \
  29         asm("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK));  \
  30         ti->cpu;                                                        \
  31 })
  32
  33 /*
  34  * On x86 all CPUs are mapped 1:1 to the APIC space. This simplifies
  35  * scheduling and IPI sending and compresses data structures.
  36  */
  37 static inline int num_booting_cpus(void)
  38 {
  39         return cpus_weight(cpu_callout_map);
  40 }
  41
  42 #else /* CONFIG_SMP */
  43 #define stack_smp_processor_id() 0
  44
  45 #endif /* !CONFIG_SMP */
  46
  47 #define safe_smp_processor_id()         smp_processor_id()
  48
  49 static inline int logical_smp_processor_id(void)
  50 {
  51         /* we don't want to mark this access volatile - bad code generation */
  52         return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
  53 }
  54
  55 #include <mach_apicdef.h>
  56 static inline int hard_smp_processor_id(void)
  57 {
  58         /* we don't want to mark this access volatile - bad code generation */
  59         return GET_APIC_ID(*(u32 *)(APIC_BASE + APIC_ID));
  60 }
  61
  62 #endif
  63