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Merge branch 'master' of git://git.infradead.org/users/pcmoore/lblnet-2.6_next into...
[linux-2.6/mini2440.git] / drivers / pci / hotplug / cpqphp_core.c
blob54defec51d0895f7dd2136230fa56e87e8feac3b
1 /*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2001 IBM Corp.
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
28 * Torben Mathiasen <torben.mathiasen@hp.com>
29 *
30 */
31
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/kernel.h>
35 #include <linux/types.h>
36 #include <linux/proc_fs.h>
37 #include <linux/slab.h>
38 #include <linux/workqueue.h>
39 #include <linux/pci.h>
40 #include <linux/pci_hotplug.h>
41 #include <linux/init.h>
42 #include <linux/interrupt.h>
43
44 #include <asm/uaccess.h>
45
46 #include "cpqphp.h"
47 #include "cpqphp_nvram.h"
48 #include "../../../arch/x86/pci/pci.h" /* horrible hack showing how processor dependent we are... */
49
50
51 /* Global variables */
52 int cpqhp_debug;
53 int cpqhp_legacy_mode;
54 struct controller *cpqhp_ctrl_list; /* = NULL */
55 struct pci_func *cpqhp_slot_list[256];
56
57 /* local variables */
58 static void __iomem *smbios_table;
59 static void __iomem *smbios_start;
60 static void __iomem *cpqhp_rom_start;
61 static int power_mode;
62 static int debug;
63 static int initialized;
64
65 #define DRIVER_VERSION "0.9.8"
66 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
67 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
68
69 MODULE_AUTHOR(DRIVER_AUTHOR);
70 MODULE_DESCRIPTION(DRIVER_DESC);
71 MODULE_LICENSE("GPL");
72
73 module_param(power_mode, bool, 0644);
74 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
75
76 module_param(debug, bool, 0644);
77 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
78
79 #define CPQHPC_MODULE_MINOR 208
80
81 static int one_time_init (void);
82 static int set_attention_status (struct hotplug_slot *slot, u8 value);
83 static int process_SI (struct hotplug_slot *slot);
84 static int process_SS (struct hotplug_slot *slot);
85 static int hardware_test (struct hotplug_slot *slot, u32 value);
86 static int get_power_status (struct hotplug_slot *slot, u8 *value);
87 static int get_attention_status (struct hotplug_slot *slot, u8 *value);
88 static int get_latch_status (struct hotplug_slot *slot, u8 *value);
89 static int get_adapter_status (struct hotplug_slot *slot, u8 *value);
90 static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
91 static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
92
93 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
94 .owner = THIS_MODULE,
95 .set_attention_status = set_attention_status,
96 .enable_slot = process_SI,
97 .disable_slot = process_SS,
98 .hardware_test = hardware_test,
99 .get_power_status = get_power_status,
100 .get_attention_status = get_attention_status,
101 .get_latch_status = get_latch_status,
102 .get_adapter_status = get_adapter_status,
103 .get_max_bus_speed = get_max_bus_speed,
104 .get_cur_bus_speed = get_cur_bus_speed,
105 };
106
107
108 static inline int is_slot64bit(struct slot *slot)
109 {
110 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
111 }
112
113 static inline int is_slot66mhz(struct slot *slot)
114 {
115 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
116 }
117
118 /**
119 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
120 * @begin: begin pointer for region to be scanned.
121 * @end: end pointer for region to be scanned.
122 *
123 * Returns pointer to the head of the SMBIOS tables (or %NULL).
124 */
125 static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
126 {
127 void __iomem *fp;
128 void __iomem *endp;
129 u8 temp1, temp2, temp3, temp4;
130 int status = 0;
131
132 endp = (end - sizeof(u32) + 1);
133
134 for (fp = begin; fp <= endp; fp += 16) {
135 temp1 = readb(fp);
136 temp2 = readb(fp+1);
137 temp3 = readb(fp+2);
138 temp4 = readb(fp+3);
139 if (temp1 == '_' &&
140 temp2 == 'S' &&
141 temp3 == 'M' &&
142 temp4 == '_') {
143 status = 1;
144 break;
145 }
146 }
147
148 if (!status)
149 fp = NULL;
150
151 dbg("Discovered SMBIOS Entry point at %p\n", fp);
152
153 return fp;
154 }
155
156 /**
157 * init_SERR - Initializes the per slot SERR generation.
158 * @ctrl: controller to use
159 *
160 * For unexpected switch opens
161 */
162 static int init_SERR(struct controller * ctrl)
163 {
164 u32 tempdword;
165 u32 number_of_slots;
166 u8 physical_slot;
167
168 if (!ctrl)
169 return 1;
170
171 tempdword = ctrl->first_slot;
172
173 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
174 // Loop through slots
175 while (number_of_slots) {
176 physical_slot = tempdword;
177 writeb(0, ctrl->hpc_reg + SLOT_SERR);
178 tempdword++;
179 number_of_slots--;
180 }
181
182 return 0;
183 }
184
185
186 /* nice debugging output */
187 static int pci_print_IRQ_route (void)
188 {
189 struct irq_routing_table *routing_table;
190 int len;
191 int loop;
192
193 u8 tbus, tdevice, tslot;
194
195 routing_table = pcibios_get_irq_routing_table();
196 if (routing_table == NULL) {
197 err("No BIOS Routing Table??? Not good\n");
198 return -ENOMEM;
199 }
200
201 len = (routing_table->size - sizeof(struct irq_routing_table)) /
202 sizeof(struct irq_info);
203 // Make sure I got at least one entry
204 if (len == 0) {
205 kfree(routing_table);
206 return -1;
207 }
208
209 dbg("bus dev func slot\n");
210
211 for (loop = 0; loop < len; ++loop) {
212 tbus = routing_table->slots[loop].bus;
213 tdevice = routing_table->slots[loop].devfn;
214 tslot = routing_table->slots[loop].slot;
215 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
216
217 }
218 kfree(routing_table);
219 return 0;
220 }
221
222
223 /**
224 * get_subsequent_smbios_entry: get the next entry from bios table.
225 * @smbios_start: where to start in the SMBIOS table
226 * @smbios_table: location of the SMBIOS table
227 * @curr: %NULL or pointer to previously returned structure
228 *
229 * Gets the first entry if previous == NULL;
230 * otherwise, returns the next entry.
231 * Uses global SMBIOS Table pointer.
232 *
233 * Returns a pointer to an SMBIOS structure or NULL if none found.
234 */
235 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
236 void __iomem *smbios_table,
237 void __iomem *curr)
238 {
239 u8 bail = 0;
240 u8 previous_byte = 1;
241 void __iomem *p_temp;
242 void __iomem *p_max;
243
244 if (!smbios_table || !curr)
245 return(NULL);
246
247 // set p_max to the end of the table
248 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
249
250 p_temp = curr;
251 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
252
253 while ((p_temp < p_max) && !bail) {
254 /* Look for the double NULL terminator
255 * The first condition is the previous byte
256 * and the second is the curr */
257 if (!previous_byte && !(readb(p_temp))) {
258 bail = 1;
259 }
260
261 previous_byte = readb(p_temp);
262 p_temp++;
263 }
264
265 if (p_temp < p_max) {
266 return p_temp;
267 } else {
268 return NULL;
269 }
270 }
271
272
273 /**
274 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
275 * @smbios_start: where to start in the SMBIOS table
276 * @smbios_table: location of the SMBIOS table
277 * @type: SMBIOS structure type to be returned
278 * @previous: %NULL or pointer to previously returned structure
279 *
280 * Gets the first entry of the specified type if previous == %NULL;
281 * Otherwise, returns the next entry of the given type.
282 * Uses global SMBIOS Table pointer.
283 * Uses get_subsequent_smbios_entry.
284 *
285 * Returns a pointer to an SMBIOS structure or %NULL if none found.
286 */
287 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
288 void __iomem *smbios_table,
289 u8 type,
290 void __iomem *previous)
291 {
292 if (!smbios_table)
293 return NULL;
294
295 if (!previous) {
296 previous = smbios_start;
297 } else {
298 previous = get_subsequent_smbios_entry(smbios_start,
299 smbios_table, previous);
300 }
301
302 while (previous) {
303 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
304 previous = get_subsequent_smbios_entry(smbios_start,
305 smbios_table, previous);
306 } else {
307 break;
308 }
309 }
310
311 return previous;
312 }
313
314 static void release_slot(struct hotplug_slot *hotplug_slot)
315 {
316 struct slot *slot = hotplug_slot->private;
317
318 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
319
320 kfree(slot->hotplug_slot->info);
321 kfree(slot->hotplug_slot->name);
322 kfree(slot->hotplug_slot);
323 kfree(slot);
324 }
325
326 static int ctrl_slot_setup(struct controller *ctrl,
327 void __iomem *smbios_start,
328 void __iomem *smbios_table)
329 {
330 struct slot *slot;
331 struct hotplug_slot *hotplug_slot;
332 struct hotplug_slot_info *hotplug_slot_info;
333 u8 number_of_slots;
334 u8 slot_device;
335 u8 slot_number;
336 u8 ctrl_slot;
337 u32 tempdword;
338 void __iomem *slot_entry= NULL;
339 int result = -ENOMEM;
340
341 dbg("%s\n", __func__);
342
343 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
344
345 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
346 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
347 slot_number = ctrl->first_slot;
348
349 while (number_of_slots) {
350 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
351 if (!slot)
352 goto error;
353
354 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
355 GFP_KERNEL);
356 if (!slot->hotplug_slot)
357 goto error_slot;
358 hotplug_slot = slot->hotplug_slot;
359
360 hotplug_slot->info =
361 kzalloc(sizeof(*(hotplug_slot->info)),
362 GFP_KERNEL);
363 if (!hotplug_slot->info)
364 goto error_hpslot;
365 hotplug_slot_info = hotplug_slot->info;
366 hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL);
367
368 if (!hotplug_slot->name)
369 goto error_info;
370
371 slot->ctrl = ctrl;
372 slot->bus = ctrl->bus;
373 slot->device = slot_device;
374 slot->number = slot_number;
375 dbg("slot->number = %d\n", slot->number);
376
377 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
378 slot_entry);
379
380 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
381 slot->number)) {
382 slot_entry = get_SMBIOS_entry(smbios_start,
383 smbios_table, 9, slot_entry);
384 }
385
386 slot->p_sm_slot = slot_entry;
387
388 init_timer(&slot->task_event);
389 slot->task_event.expires = jiffies + 5 * HZ;
390 slot->task_event.function = cpqhp_pushbutton_thread;
391
392 //FIXME: these capabilities aren't used but if they are
393 // they need to be correctly implemented
394 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
395 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
396
397 if (is_slot64bit(slot))
398 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
399 if (is_slot66mhz(slot))
400 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
401 if (ctrl->speed == PCI_SPEED_66MHz)
402 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
403
404 ctrl_slot =
405 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
406
407 // Check presence
408 slot->capabilities |=
409 ((((~tempdword) >> 23) |
410 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
411 // Check the switch state
412 slot->capabilities |=
413 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
414 // Check the slot enable
415 slot->capabilities |=
416 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
417
418 /* register this slot with the hotplug pci core */
419 hotplug_slot->release = &release_slot;
420 hotplug_slot->private = slot;
421 make_slot_name(hotplug_slot->name, SLOT_NAME_SIZE, slot);
422 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
423
424 hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
425 hotplug_slot_info->attention_status =
426 cpq_get_attention_status(ctrl, slot);
427 hotplug_slot_info->latch_status =
428 cpq_get_latch_status(ctrl, slot);
429 hotplug_slot_info->adapter_status =
430 get_presence_status(ctrl, slot);
431
432 dbg("registering bus %d, dev %d, number %d, "
433 "ctrl->slot_device_offset %d, slot %d\n",
434 slot->bus, slot->device,
435 slot->number, ctrl->slot_device_offset,
436 slot_number);
437 result = pci_hp_register(hotplug_slot,
438 ctrl->pci_dev->subordinate,
439 slot->device);
440 if (result) {
441 err("pci_hp_register failed with error %d\n", result);
442 goto error_name;
443 }
444
445 slot->next = ctrl->slot;
446 ctrl->slot = slot;
447
448 number_of_slots--;
449 slot_device++;
450 slot_number++;
451 }
452
453 return 0;
454 error_name:
455 kfree(hotplug_slot->name);
456 error_info:
457 kfree(hotplug_slot_info);
458 error_hpslot:
459 kfree(hotplug_slot);
460 error_slot:
461 kfree(slot);
462 error:
463 return result;
464 }
465
466 static int ctrl_slot_cleanup (struct controller * ctrl)
467 {
468 struct slot *old_slot, *next_slot;
469
470 old_slot = ctrl->slot;
471 ctrl->slot = NULL;
472
473 while (old_slot) {
474 /* memory will be freed by the release_slot callback */
475 next_slot = old_slot->next;
476 pci_hp_deregister (old_slot->hotplug_slot);
477 old_slot = next_slot;
478 }
479
480 cpqhp_remove_debugfs_files(ctrl);
481
482 //Free IRQ associated with hot plug device
483 free_irq(ctrl->interrupt, ctrl);
484 //Unmap the memory
485 iounmap(ctrl->hpc_reg);
486 //Finally reclaim PCI mem
487 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
488 pci_resource_len(ctrl->pci_dev, 0));
489
490 return(0);
491 }
492
493
494 //============================================================================
495 // function: get_slot_mapping
496 //
497 // Description: Attempts to determine a logical slot mapping for a PCI
498 // device. Won't work for more than one PCI-PCI bridge
499 // in a slot.
500 //
501 // Input: u8 bus_num - bus number of PCI device
502 // u8 dev_num - device number of PCI device
503 // u8 *slot - Pointer to u8 where slot number will
504 // be returned
505 //
506 // Output: SUCCESS or FAILURE
507 //=============================================================================
508 static int
509 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
510 {
511 struct irq_routing_table *PCIIRQRoutingInfoLength;
512 u32 work;
513 long len;
514 long loop;
515
516 u8 tbus, tdevice, tslot, bridgeSlot;
517
518 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
519
520 bridgeSlot = 0xFF;
521
522 PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
523 if (!PCIIRQRoutingInfoLength)
524 return -1;
525
526 len = (PCIIRQRoutingInfoLength->size -
527 sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
528 // Make sure I got at least one entry
529 if (len == 0) {
530 kfree(PCIIRQRoutingInfoLength);
531 return -1;
532 }
533
534 for (loop = 0; loop < len; ++loop) {
535 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
536 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
537 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
538
539 if ((tbus == bus_num) && (tdevice == dev_num)) {
540 *slot = tslot;
541 kfree(PCIIRQRoutingInfoLength);
542 return 0;
543 } else {
544 /* Did not get a match on the target PCI device. Check
545 * if the current IRQ table entry is a PCI-to-PCI bridge
546 * device. If so, and it's secondary bus matches the
547 * bus number for the target device, I need to save the
548 * bridge's slot number. If I can not find an entry for
549 * the target device, I will have to assume it's on the
550 * other side of the bridge, and assign it the bridge's
551 * slot. */
552 bus->number = tbus;
553 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
554 PCI_CLASS_REVISION, &work);
555
556 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
557 pci_bus_read_config_dword(bus,
558 PCI_DEVFN(tdevice, 0),
559 PCI_PRIMARY_BUS, &work);
560 // See if bridge's secondary bus matches target bus.
561 if (((work >> 8) & 0x000000FF) == (long) bus_num) {
562 bridgeSlot = tslot;
563 }
564 }
565 }
566
567 }
568
569 // If we got here, we didn't find an entry in the IRQ mapping table
570 // for the target PCI device. If we did determine that the target
571 // device is on the other side of a PCI-to-PCI bridge, return the
572 // slot number for the bridge.
573 if (bridgeSlot != 0xFF) {
574 *slot = bridgeSlot;
575 kfree(PCIIRQRoutingInfoLength);
576 return 0;
577 }
578 kfree(PCIIRQRoutingInfoLength);
579 // Couldn't find an entry in the routing table for this PCI device
580 return -1;
581 }
582
583
584 /**
585 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
586 * @ctrl: struct controller to use
587 * @func: PCI device/function info
588 * @status: LED control flag: 1 = LED on, 0 = LED off
589 */
590 static int
591 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
592 u32 status)
593 {
594 u8 hp_slot;
595
596 if (func == NULL)
597 return(1);
598
599 hp_slot = func->device - ctrl->slot_device_offset;
600
601 // Wait for exclusive access to hardware
602 mutex_lock(&ctrl->crit_sect);
603
604 if (status == 1) {
605 amber_LED_on (ctrl, hp_slot);
606 } else if (status == 0) {
607 amber_LED_off (ctrl, hp_slot);
608 } else {
609 // Done with exclusive hardware access
610 mutex_unlock(&ctrl->crit_sect);
611 return(1);
612 }
613
614 set_SOGO(ctrl);
615
616 // Wait for SOBS to be unset
617 wait_for_ctrl_irq (ctrl);
618
619 // Done with exclusive hardware access
620 mutex_unlock(&ctrl->crit_sect);
621
622 return(0);
623 }
624
625
626 /**
627 * set_attention_status - Turns the Amber LED for a slot on or off
628 * @hotplug_slot: slot to change LED on
629 * @status: LED control flag
630 */
631 static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
632 {
633 struct pci_func *slot_func;
634 struct slot *slot = hotplug_slot->private;
635 struct controller *ctrl = slot->ctrl;
636 u8 bus;
637 u8 devfn;
638 u8 device;
639 u8 function;
640
641 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
642
643 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
644 return -ENODEV;
645
646 device = devfn >> 3;
647 function = devfn & 0x7;
648 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
649
650 slot_func = cpqhp_slot_find(bus, device, function);
651 if (!slot_func)
652 return -ENODEV;
653
654 return cpqhp_set_attention_status(ctrl, slot_func, status);
655 }
656
657
658 static int process_SI(struct hotplug_slot *hotplug_slot)
659 {
660 struct pci_func *slot_func;
661 struct slot *slot = hotplug_slot->private;
662 struct controller *ctrl = slot->ctrl;
663 u8 bus;
664 u8 devfn;
665 u8 device;
666 u8 function;
667
668 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
669
670 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
671 return -ENODEV;
672
673 device = devfn >> 3;
674 function = devfn & 0x7;
675 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
676
677 slot_func = cpqhp_slot_find(bus, device, function);
678 if (!slot_func)
679 return -ENODEV;
680
681 slot_func->bus = bus;
682 slot_func->device = device;
683 slot_func->function = function;
684 slot_func->configured = 0;
685 dbg("board_added(%p, %p)\n", slot_func, ctrl);
686 return cpqhp_process_SI(ctrl, slot_func);
687 }
688
689
690 static int process_SS(struct hotplug_slot *hotplug_slot)
691 {
692 struct pci_func *slot_func;
693 struct slot *slot = hotplug_slot->private;
694 struct controller *ctrl = slot->ctrl;
695 u8 bus;
696 u8 devfn;
697 u8 device;
698 u8 function;
699
700 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
701
702 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
703 return -ENODEV;
704
705 device = devfn >> 3;
706 function = devfn & 0x7;
707 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
708
709 slot_func = cpqhp_slot_find(bus, device, function);
710 if (!slot_func)
711 return -ENODEV;
712
713 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
714 return cpqhp_process_SS(ctrl, slot_func);
715 }
716
717
718 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
719 {
720 struct slot *slot = hotplug_slot->private;
721 struct controller *ctrl = slot->ctrl;
722
723 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
724
725 return cpqhp_hardware_test(ctrl, value);
726 }
727
728
729 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
730 {
731 struct slot *slot = hotplug_slot->private;
732 struct controller *ctrl = slot->ctrl;
733
734 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
735
736 *value = get_slot_enabled(ctrl, slot);
737 return 0;
738 }
739
740 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
741 {
742 struct slot *slot = hotplug_slot->private;
743 struct controller *ctrl = slot->ctrl;
744
745 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
746
747 *value = cpq_get_attention_status(ctrl, slot);
748 return 0;
749 }
750
751 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
752 {
753 struct slot *slot = hotplug_slot->private;
754 struct controller *ctrl = slot->ctrl;
755
756 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
757
758 *value = cpq_get_latch_status(ctrl, slot);
759
760 return 0;
761 }
762
763 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
764 {
765 struct slot *slot = hotplug_slot->private;
766 struct controller *ctrl = slot->ctrl;
767
768 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
769
770 *value = get_presence_status(ctrl, slot);
771
772 return 0;
773 }
774
775 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
776 {
777 struct slot *slot = hotplug_slot->private;
778 struct controller *ctrl = slot->ctrl;
779
780 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
781
782 *value = ctrl->speed_capability;
783
784 return 0;
785 }
786
787 static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
788 {
789 struct slot *slot = hotplug_slot->private;
790 struct controller *ctrl = slot->ctrl;
791
792 dbg("%s - physical_slot = %s\n", __func__, hotplug_slot->name);
793
794 *value = ctrl->speed;
795
796 return 0;
797 }
798
799 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
800 {
801 u8 num_of_slots = 0;
802 u8 hp_slot = 0;
803 u8 device;
804 u8 bus_cap;
805 u16 temp_word;
806 u16 vendor_id;
807 u16 subsystem_vid;
808 u16 subsystem_deviceid;
809 u32 rc;
810 struct controller *ctrl;
811 struct pci_func *func;
812 int err;
813
814 err = pci_enable_device(pdev);
815 if (err) {
816 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
817 pci_name(pdev), err);
818 return err;
819 }
820
821 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
822 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
823 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
824 err(msg_HPC_non_compaq_or_intel);
825 rc = -ENODEV;
826 goto err_disable_device;
827 }
828 dbg("Vendor ID: %x\n", vendor_id);
829
830 dbg("revision: %d\n", pdev->revision);
831 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
832 err(msg_HPC_rev_error);
833 rc = -ENODEV;
834 goto err_disable_device;
835 }
836
837 /* Check for the proper subsytem ID's
838 * Intel uses a different SSID programming model than Compaq.
839 * For Intel, each SSID bit identifies a PHP capability.
840 * Also Intel HPC's may have RID=0.
841 */
842 if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
843 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
844 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
845 if (rc) {
846 err("%s : pci_read_config_word failed\n", __func__);
847 goto err_disable_device;
848 }
849 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
850 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
851 err(msg_HPC_non_compaq_or_intel);
852 rc = -ENODEV;
853 goto err_disable_device;
854 }
855
856 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
857 if (!ctrl) {
858 err("%s : out of memory\n", __func__);
859 rc = -ENOMEM;
860 goto err_disable_device;
861 }
862
863 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
864 if (rc) {
865 err("%s : pci_read_config_word failed\n", __func__);
866 goto err_free_ctrl;
867 }
868
869 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
870
871 /* Set Vendor ID, so it can be accessed later from other functions */
872 ctrl->vendor_id = vendor_id;
873
874 switch (subsystem_vid) {
875 case PCI_VENDOR_ID_COMPAQ:
876 if (pdev->revision >= 0x13) { /* CIOBX */
877 ctrl->push_flag = 1;
878 ctrl->slot_switch_type = 1;
879 ctrl->push_button = 1;
880 ctrl->pci_config_space = 1;
881 ctrl->defeature_PHP = 1;
882 ctrl->pcix_support = 1;
883 ctrl->pcix_speed_capability = 1;
884 pci_read_config_byte(pdev, 0x41, &bus_cap);
885 if (bus_cap & 0x80) {
886 dbg("bus max supports 133MHz PCI-X\n");
887 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
888 break;
889 }
890 if (bus_cap & 0x40) {
891 dbg("bus max supports 100MHz PCI-X\n");
892 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
893 break;
894 }
895 if (bus_cap & 20) {
896 dbg("bus max supports 66MHz PCI-X\n");
897 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
898 break;
899 }
900 if (bus_cap & 10) {
901 dbg("bus max supports 66MHz PCI\n");
902 ctrl->speed_capability = PCI_SPEED_66MHz;
903 break;
904 }
905
906 break;
907 }
908
909 switch (subsystem_deviceid) {
910 case PCI_SUB_HPC_ID:
911 /* Original 6500/7000 implementation */
912 ctrl->slot_switch_type = 1;
913 ctrl->speed_capability = PCI_SPEED_33MHz;
914 ctrl->push_button = 0;
915 ctrl->pci_config_space = 1;
916 ctrl->defeature_PHP = 1;
917 ctrl->pcix_support = 0;
918 ctrl->pcix_speed_capability = 0;
919 break;
920 case PCI_SUB_HPC_ID2:
921 /* First Pushbutton implementation */
922 ctrl->push_flag = 1;
923 ctrl->slot_switch_type = 1;
924 ctrl->speed_capability = PCI_SPEED_33MHz;
925 ctrl->push_button = 1;
926 ctrl->pci_config_space = 1;
927 ctrl->defeature_PHP = 1;
928 ctrl->pcix_support = 0;
929 ctrl->pcix_speed_capability = 0;
930 break;
931 case PCI_SUB_HPC_ID_INTC:
932 /* Third party (6500/7000) */
933 ctrl->slot_switch_type = 1;
934 ctrl->speed_capability = PCI_SPEED_33MHz;
935 ctrl->push_button = 0;
936 ctrl->pci_config_space = 1;
937 ctrl->defeature_PHP = 1;
938 ctrl->pcix_support = 0;
939 ctrl->pcix_speed_capability = 0;
940 break;
941 case PCI_SUB_HPC_ID3:
942 /* First 66 Mhz implementation */
943 ctrl->push_flag = 1;
944 ctrl->slot_switch_type = 1;
945 ctrl->speed_capability = PCI_SPEED_66MHz;
946 ctrl->push_button = 1;
947 ctrl->pci_config_space = 1;
948 ctrl->defeature_PHP = 1;
949 ctrl->pcix_support = 0;
950 ctrl->pcix_speed_capability = 0;
951 break;
952 case PCI_SUB_HPC_ID4:
953 /* First PCI-X implementation, 100MHz */
954 ctrl->push_flag = 1;
955 ctrl->slot_switch_type = 1;
956 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
957 ctrl->push_button = 1;
958 ctrl->pci_config_space = 1;
959 ctrl->defeature_PHP = 1;
960 ctrl->pcix_support = 1;
961 ctrl->pcix_speed_capability = 0;
962 break;
963 default:
964 err(msg_HPC_not_supported);
965 rc = -ENODEV;
966 goto err_free_ctrl;
967 }
968 break;
969
970 case PCI_VENDOR_ID_INTEL:
971 /* Check for speed capability (0=33, 1=66) */
972 if (subsystem_deviceid & 0x0001) {
973 ctrl->speed_capability = PCI_SPEED_66MHz;
974 } else {
975 ctrl->speed_capability = PCI_SPEED_33MHz;
976 }
977
978 /* Check for push button */
979 if (subsystem_deviceid & 0x0002) {
980 /* no push button */
981 ctrl->push_button = 0;
982 } else {
983 /* push button supported */
984 ctrl->push_button = 1;
985 }
986
987 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
988 if (subsystem_deviceid & 0x0004) {
989 /* no switch */
990 ctrl->slot_switch_type = 0;
991 } else {
992 /* switch */
993 ctrl->slot_switch_type = 1;
994 }
995
996 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
997 if (subsystem_deviceid & 0x0008) {
998 ctrl->defeature_PHP = 1; // PHP supported
999 } else {
1000 ctrl->defeature_PHP = 0; // PHP not supported
1001 }
1002
1003 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
1004 if (subsystem_deviceid & 0x0010) {
1005 ctrl->alternate_base_address = 1; // supported
1006 } else {
1007 ctrl->alternate_base_address = 0; // not supported
1008 }
1009
1010 /* PCI Config Space Index (0=not supported, 1=supported) */
1011 if (subsystem_deviceid & 0x0020) {
1012 ctrl->pci_config_space = 1; // supported
1013 } else {
1014 ctrl->pci_config_space = 0; // not supported
1015 }
1016
1017 /* PCI-X support */
1018 if (subsystem_deviceid & 0x0080) {
1019 /* PCI-X capable */
1020 ctrl->pcix_support = 1;
1021 /* Frequency of operation in PCI-X mode */
1022 if (subsystem_deviceid & 0x0040) {
1023 /* 133MHz PCI-X if bit 7 is 1 */
1024 ctrl->pcix_speed_capability = 1;
1025 } else {
1026 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1027 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1028 ctrl->pcix_speed_capability = 0;
1029 }
1030 } else {
1031 /* Conventional PCI */
1032 ctrl->pcix_support = 0;
1033 ctrl->pcix_speed_capability = 0;
1034 }
1035 break;
1036
1037 default:
1038 err(msg_HPC_not_supported);
1039 rc = -ENODEV;
1040 goto err_free_ctrl;
1041 }
1042
1043 } else {
1044 err(msg_HPC_not_supported);
1045 return -ENODEV;
1046 }
1047
1048 // Tell the user that we found one.
1049 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1050 pdev->bus->number);
1051
1052 dbg("Hotplug controller capabilities:\n");
1053 dbg(" speed_capability %d\n", ctrl->speed_capability);
1054 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1055 "switch present" : "no switch");
1056 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1057 "PHP supported" : "PHP not supported");
1058 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1059 "supported" : "not supported");
1060 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1061 "supported" : "not supported");
1062 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1063 "supported" : "not supported");
1064 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1065 "supported" : "not supported");
1066
1067 ctrl->pci_dev = pdev;
1068 pci_set_drvdata(pdev, ctrl);
1069
1070 /* make our own copy of the pci bus structure,
1071 * as we like tweaking it a lot */
1072 ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
1073 if (!ctrl->pci_bus) {
1074 err("out of memory\n");
1075 rc = -ENOMEM;
1076 goto err_free_ctrl;
1077 }
1078 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
1079
1080 ctrl->bus = pdev->bus->number;
1081 ctrl->rev = pdev->revision;
1082 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1083 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1084
1085 mutex_init(&ctrl->crit_sect);
1086 init_waitqueue_head(&ctrl->queue);
1087
1088 /* initialize our threads if they haven't already been started up */
1089 rc = one_time_init();
1090 if (rc) {
1091 goto err_free_bus;
1092 }
1093
1094 dbg("pdev = %p\n", pdev);
1095 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1096 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1097
1098 if (!request_mem_region(pci_resource_start(pdev, 0),
1099 pci_resource_len(pdev, 0), MY_NAME)) {
1100 err("cannot reserve MMIO region\n");
1101 rc = -ENOMEM;
1102 goto err_free_bus;
1103 }
1104
1105 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1106 pci_resource_len(pdev, 0));
1107 if (!ctrl->hpc_reg) {
1108 err("cannot remap MMIO region %llx @ %llx\n",
1109 (unsigned long long)pci_resource_len(pdev, 0),
1110 (unsigned long long)pci_resource_start(pdev, 0));
1111 rc = -ENODEV;
1112 goto err_free_mem_region;
1113 }
1114
1115 // Check for 66Mhz operation
1116 ctrl->speed = get_controller_speed(ctrl);
1117
1118
1119 /********************************************************
1120 *
1121 * Save configuration headers for this and
1122 * subordinate PCI buses
1123 *
1124 ********************************************************/
1125
1126 // find the physical slot number of the first hot plug slot
1127
1128 /* Get slot won't work for devices behind bridges, but
1129 * in this case it will always be called for the "base"
1130 * bus/dev/func of a slot.
1131 * CS: this is leveraging the PCIIRQ routing code from the kernel
1132 * (pci-pc.c: get_irq_routing_table) */
1133 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1134 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1135 &(ctrl->first_slot));
1136 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1137 ctrl->first_slot, rc);
1138 if (rc) {
1139 err(msg_initialization_err, rc);
1140 goto err_iounmap;
1141 }
1142
1143 // Store PCI Config Space for all devices on this bus
1144 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1145 if (rc) {
1146 err("%s: unable to save PCI configuration data, error %d\n",
1147 __func__, rc);
1148 goto err_iounmap;
1149 }
1150
1151 /*
1152 * Get IO, memory, and IRQ resources for new devices
1153 */
1154 // The next line is required for cpqhp_find_available_resources
1155 ctrl->interrupt = pdev->irq;
1156 if (ctrl->interrupt < 0x10) {
1157 cpqhp_legacy_mode = 1;
1158 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1159 }
1160
1161 ctrl->cfgspc_irq = 0;
1162 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1163
1164 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1165 ctrl->add_support = !rc;
1166 if (rc) {
1167 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1168 err("unable to locate PCI configuration resources for hot plug add.\n");
1169 goto err_iounmap;
1170 }
1171
1172 /*
1173 * Finish setting up the hot plug ctrl device
1174 */
1175 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1176 dbg("NumSlots %d \n", ctrl->slot_device_offset);
1177
1178 ctrl->next_event = 0;
1179
1180 /* Setup the slot information structures */
1181 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1182 if (rc) {
1183 err(msg_initialization_err, 6);
1184 err("%s: unable to save PCI configuration data, error %d\n",
1185 __func__, rc);
1186 goto err_iounmap;
1187 }
1188
1189 /* Mask all general input interrupts */
1190 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1191
1192 /* set up the interrupt */
1193 dbg("HPC interrupt = %d \n", ctrl->interrupt);
1194 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1195 IRQF_SHARED, MY_NAME, ctrl)) {
1196 err("Can't get irq %d for the hotplug pci controller\n",
1197 ctrl->interrupt);
1198 rc = -ENODEV;
1199 goto err_iounmap;
1200 }
1201
1202 /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
1203 temp_word = readw(ctrl->hpc_reg + MISC);
1204 temp_word |= 0x4006;
1205 writew(temp_word, ctrl->hpc_reg + MISC);
1206
1207 // Changed 05/05/97 to clear all interrupts at start
1208 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1209
1210 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1211
1212 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1213
1214 if (!cpqhp_ctrl_list) {
1215 cpqhp_ctrl_list = ctrl;
1216 ctrl->next = NULL;
1217 } else {
1218 ctrl->next = cpqhp_ctrl_list;
1219 cpqhp_ctrl_list = ctrl;
1220 }
1221
1222 // turn off empty slots here unless command line option "ON" set
1223 // Wait for exclusive access to hardware
1224 mutex_lock(&ctrl->crit_sect);
1225
1226 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1227
1228 // find first device number for the ctrl
1229 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1230
1231 while (num_of_slots) {
1232 dbg("num_of_slots: %d\n", num_of_slots);
1233 func = cpqhp_slot_find(ctrl->bus, device, 0);
1234 if (!func)
1235 break;
1236
1237 hp_slot = func->device - ctrl->slot_device_offset;
1238 dbg("hp_slot: %d\n", hp_slot);
1239
1240 // We have to save the presence info for these slots
1241 temp_word = ctrl->ctrl_int_comp >> 16;
1242 func->presence_save = (temp_word >> hp_slot) & 0x01;
1243 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1244
1245 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
1246 func->switch_save = 0;
1247 } else {
1248 func->switch_save = 0x10;
1249 }
1250
1251 if (!power_mode) {
1252 if (!func->is_a_board) {
1253 green_LED_off(ctrl, hp_slot);
1254 slot_disable(ctrl, hp_slot);
1255 }
1256 }
1257
1258 device++;
1259 num_of_slots--;
1260 }
1261
1262 if (!power_mode) {
1263 set_SOGO(ctrl);
1264 // Wait for SOBS to be unset
1265 wait_for_ctrl_irq(ctrl);
1266 }
1267
1268 rc = init_SERR(ctrl);
1269 if (rc) {
1270 err("init_SERR failed\n");
1271 mutex_unlock(&ctrl->crit_sect);
1272 goto err_free_irq;
1273 }
1274
1275 // Done with exclusive hardware access
1276 mutex_unlock(&ctrl->crit_sect);
1277
1278 cpqhp_create_debugfs_files(ctrl);
1279
1280 return 0;
1281
1282 err_free_irq:
1283 free_irq(ctrl->interrupt, ctrl);
1284 err_iounmap:
1285 iounmap(ctrl->hpc_reg);
1286 err_free_mem_region:
1287 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1288 err_free_bus:
1289 kfree(ctrl->pci_bus);
1290 err_free_ctrl:
1291 kfree(ctrl);
1292 err_disable_device:
1293 pci_disable_device(pdev);
1294 return rc;
1295 }
1296
1297
1298 static int one_time_init(void)
1299 {
1300 int loop;
1301 int retval = 0;
1302
1303 if (initialized)
1304 return 0;
1305
1306 power_mode = 0;
1307
1308 retval = pci_print_IRQ_route();
1309 if (retval)
1310 goto error;
1311
1312 dbg("Initialize + Start the notification mechanism \n");
1313
1314 retval = cpqhp_event_start_thread();
1315 if (retval)
1316 goto error;
1317
1318 dbg("Initialize slot lists\n");
1319 for (loop = 0; loop < 256; loop++) {
1320 cpqhp_slot_list[loop] = NULL;
1321 }
1322
1323 // FIXME: We also need to hook the NMI handler eventually.
1324 // this also needs to be worked with Christoph
1325 // register_NMI_handler();
1326
1327 // Map rom address
1328 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
1329 if (!cpqhp_rom_start) {
1330 err ("Could not ioremap memory region for ROM\n");
1331 retval = -EIO;
1332 goto error;
1333 }
1334
1335 /* Now, map the int15 entry point if we are on compaq specific hardware */
1336 compaq_nvram_init(cpqhp_rom_start);
1337
1338 /* Map smbios table entry point structure */
1339 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
1340 cpqhp_rom_start + ROM_PHY_LEN);
1341 if (!smbios_table) {
1342 err ("Could not find the SMBIOS pointer in memory\n");
1343 retval = -EIO;
1344 goto error_rom_start;
1345 }
1346
1347 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
1348 readw(smbios_table + ST_LENGTH));
1349 if (!smbios_start) {
1350 err ("Could not ioremap memory region taken from SMBIOS values\n");
1351 retval = -EIO;
1352 goto error_smbios_start;
1353 }
1354
1355 initialized = 1;
1356
1357 return retval;
1358
1359 error_smbios_start:
1360 iounmap(smbios_start);
1361 error_rom_start:
1362 iounmap(cpqhp_rom_start);
1363 error:
1364 return retval;
1365 }
1366
1367
1368 static void __exit unload_cpqphpd(void)
1369 {
1370 struct pci_func *next;
1371 struct pci_func *TempSlot;
1372 int loop;
1373 u32 rc;
1374 struct controller *ctrl;
1375 struct controller *tctrl;
1376 struct pci_resource *res;
1377 struct pci_resource *tres;
1378
1379 rc = compaq_nvram_store(cpqhp_rom_start);
1380
1381 ctrl = cpqhp_ctrl_list;
1382
1383 while (ctrl) {
1384 if (ctrl->hpc_reg) {
1385 u16 misc;
1386 rc = read_slot_enable (ctrl);
1387
1388 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1389 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1390
1391 misc = readw(ctrl->hpc_reg + MISC);
1392 misc &= 0xFFFD;
1393 writew(misc, ctrl->hpc_reg + MISC);
1394 }
1395
1396 ctrl_slot_cleanup(ctrl);
1397
1398 res = ctrl->io_head;
1399 while (res) {
1400 tres = res;
1401 res = res->next;
1402 kfree(tres);
1403 }
1404
1405 res = ctrl->mem_head;
1406 while (res) {
1407 tres = res;
1408 res = res->next;
1409 kfree(tres);
1410 }
1411
1412 res = ctrl->p_mem_head;
1413 while (res) {
1414 tres = res;
1415 res = res->next;
1416 kfree(tres);
1417 }
1418
1419 res = ctrl->bus_head;
1420 while (res) {
1421 tres = res;
1422 res = res->next;
1423 kfree(tres);
1424 }
1425
1426 kfree (ctrl->pci_bus);
1427
1428 tctrl = ctrl;
1429 ctrl = ctrl->next;
1430 kfree(tctrl);
1431 }
1432
1433 for (loop = 0; loop < 256; loop++) {
1434 next = cpqhp_slot_list[loop];
1435 while (next != NULL) {
1436 res = next->io_head;
1437 while (res) {
1438 tres = res;
1439 res = res->next;
1440 kfree(tres);
1441 }
1442
1443 res = next->mem_head;
1444 while (res) {
1445 tres = res;
1446 res = res->next;
1447 kfree(tres);
1448 }
1449
1450 res = next->p_mem_head;
1451 while (res) {
1452 tres = res;
1453 res = res->next;
1454 kfree(tres);
1455 }
1456
1457 res = next->bus_head;
1458 while (res) {
1459 tres = res;
1460 res = res->next;
1461 kfree(tres);
1462 }
1463
1464 TempSlot = next;
1465 next = next->next;
1466 kfree(TempSlot);
1467 }
1468 }
1469
1470 // Stop the notification mechanism
1471 if (initialized)
1472 cpqhp_event_stop_thread();
1473
1474 //unmap the rom address
1475 if (cpqhp_rom_start)
1476 iounmap(cpqhp_rom_start);
1477 if (smbios_start)
1478 iounmap(smbios_start);
1479 }
1480
1481
1482
1483 static struct pci_device_id hpcd_pci_tbl[] = {
1484 {
1485 /* handle any PCI Hotplug controller */
1486 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1487 .class_mask = ~0,
1488
1489 /* no matter who makes it */
1490 .vendor = PCI_ANY_ID,
1491 .device = PCI_ANY_ID,
1492 .subvendor = PCI_ANY_ID,
1493 .subdevice = PCI_ANY_ID,
1494
1495 }, { /* end: all zeroes */ }
1496 };
1497
1498 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1499
1500
1501
1502 static struct pci_driver cpqhpc_driver = {
1503 .name = "compaq_pci_hotplug",
1504 .id_table = hpcd_pci_tbl,
1505 .probe = cpqhpc_probe,
1506 /* remove: cpqhpc_remove_one, */
1507 };
1508
1509
1510
1511 static int __init cpqhpc_init(void)
1512 {
1513 int result;
1514
1515 cpqhp_debug = debug;
1516
1517 info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
1518 cpqhp_initialize_debugfs();
1519 result = pci_register_driver(&cpqhpc_driver);
1520 dbg("pci_register_driver = %d\n", result);
1521 return result;
1522 }
1523
1524
1525 static void __exit cpqhpc_cleanup(void)
1526 {
1527 dbg("unload_cpqphpd()\n");
1528 unload_cpqphpd();
1529
1530 dbg("pci_unregister_driver\n");
1531 pci_unregister_driver(&cpqhpc_driver);
1532 cpqhp_shutdown_debugfs();
1533 }
1534
1535
1536 module_init(cpqhpc_init);
1537 module_exit(cpqhpc_cleanup);
1538
1539
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