2 * linux/arch/arm/mach-clps7500/core.c
4 * Copyright (C) 1998 Russell King
5 * Copyright (C) 1999 Nexus Electronics Ltd
7 * Extra MM routines for CL7500 architecture
9 #include <linux/kernel.h>
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/list.h>
14 #include <linux/sched.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/serial_8250.h>
19 #include <asm/mach/arch.h>
20 #include <asm/mach/map.h>
21 #include <asm/mach/irq.h>
22 #include <asm/mach/time.h>
24 #include <asm/hardware.h>
25 #include <asm/hardware/iomd.h>
28 #include <asm/mach-types.h>
30 unsigned int vram_size
;
32 static void cl7500_ack_irq_a(unsigned int irq
)
34 unsigned int val
, mask
;
37 val
= iomd_readb(IOMD_IRQMASKA
);
38 iomd_writeb(val
& ~mask
, IOMD_IRQMASKA
);
39 iomd_writeb(mask
, IOMD_IRQCLRA
);
42 static void cl7500_mask_irq_a(unsigned int irq
)
44 unsigned int val
, mask
;
47 val
= iomd_readb(IOMD_IRQMASKA
);
48 iomd_writeb(val
& ~mask
, IOMD_IRQMASKA
);
51 static void cl7500_unmask_irq_a(unsigned int irq
)
53 unsigned int val
, mask
;
56 val
= iomd_readb(IOMD_IRQMASKA
);
57 iomd_writeb(val
| mask
, IOMD_IRQMASKA
);
60 static struct irqchip clps7500_a_chip
= {
61 .ack
= cl7500_ack_irq_a
,
62 .mask
= cl7500_mask_irq_a
,
63 .unmask
= cl7500_unmask_irq_a
,
66 static void cl7500_mask_irq_b(unsigned int irq
)
68 unsigned int val
, mask
;
70 mask
= 1 << (irq
& 7);
71 val
= iomd_readb(IOMD_IRQMASKB
);
72 iomd_writeb(val
& ~mask
, IOMD_IRQMASKB
);
75 static void cl7500_unmask_irq_b(unsigned int irq
)
77 unsigned int val
, mask
;
79 mask
= 1 << (irq
& 7);
80 val
= iomd_readb(IOMD_IRQMASKB
);
81 iomd_writeb(val
| mask
, IOMD_IRQMASKB
);
84 static struct irqchip clps7500_b_chip
= {
85 .ack
= cl7500_mask_irq_b
,
86 .mask
= cl7500_mask_irq_b
,
87 .unmask
= cl7500_unmask_irq_b
,
90 static void cl7500_mask_irq_c(unsigned int irq
)
92 unsigned int val
, mask
;
94 mask
= 1 << (irq
& 7);
95 val
= iomd_readb(IOMD_IRQMASKC
);
96 iomd_writeb(val
& ~mask
, IOMD_IRQMASKC
);
99 static void cl7500_unmask_irq_c(unsigned int irq
)
101 unsigned int val
, mask
;
103 mask
= 1 << (irq
& 7);
104 val
= iomd_readb(IOMD_IRQMASKC
);
105 iomd_writeb(val
| mask
, IOMD_IRQMASKC
);
108 static struct irqchip clps7500_c_chip
= {
109 .ack
= cl7500_mask_irq_c
,
110 .mask
= cl7500_mask_irq_c
,
111 .unmask
= cl7500_unmask_irq_c
,
114 static void cl7500_mask_irq_d(unsigned int irq
)
116 unsigned int val
, mask
;
118 mask
= 1 << (irq
& 7);
119 val
= iomd_readb(IOMD_IRQMASKD
);
120 iomd_writeb(val
& ~mask
, IOMD_IRQMASKD
);
123 static void cl7500_unmask_irq_d(unsigned int irq
)
125 unsigned int val
, mask
;
127 mask
= 1 << (irq
& 7);
128 val
= iomd_readb(IOMD_IRQMASKD
);
129 iomd_writeb(val
| mask
, IOMD_IRQMASKD
);
132 static struct irqchip clps7500_d_chip
= {
133 .ack
= cl7500_mask_irq_d
,
134 .mask
= cl7500_mask_irq_d
,
135 .unmask
= cl7500_unmask_irq_d
,
138 static void cl7500_mask_irq_dma(unsigned int irq
)
140 unsigned int val
, mask
;
142 mask
= 1 << (irq
& 7);
143 val
= iomd_readb(IOMD_DMAMASK
);
144 iomd_writeb(val
& ~mask
, IOMD_DMAMASK
);
147 static void cl7500_unmask_irq_dma(unsigned int irq
)
149 unsigned int val
, mask
;
151 mask
= 1 << (irq
& 7);
152 val
= iomd_readb(IOMD_DMAMASK
);
153 iomd_writeb(val
| mask
, IOMD_DMAMASK
);
156 static struct irqchip clps7500_dma_chip
= {
157 .ack
= cl7500_mask_irq_dma
,
158 .mask
= cl7500_mask_irq_dma
,
159 .unmask
= cl7500_unmask_irq_dma
,
162 static void cl7500_mask_irq_fiq(unsigned int irq
)
164 unsigned int val
, mask
;
166 mask
= 1 << (irq
& 7);
167 val
= iomd_readb(IOMD_FIQMASK
);
168 iomd_writeb(val
& ~mask
, IOMD_FIQMASK
);
171 static void cl7500_unmask_irq_fiq(unsigned int irq
)
173 unsigned int val
, mask
;
175 mask
= 1 << (irq
& 7);
176 val
= iomd_readb(IOMD_FIQMASK
);
177 iomd_writeb(val
| mask
, IOMD_FIQMASK
);
180 static struct irqchip clps7500_fiq_chip
= {
181 .ack
= cl7500_mask_irq_fiq
,
182 .mask
= cl7500_mask_irq_fiq
,
183 .unmask
= cl7500_unmask_irq_fiq
,
186 static void cl7500_no_action(unsigned int irq
)
190 static struct irqchip clps7500_no_chip
= {
191 .ack
= cl7500_no_action
,
192 .mask
= cl7500_no_action
,
193 .unmask
= cl7500_no_action
,
196 static struct irqaction irq_isa
= { no_action
, 0, CPU_MASK_NONE
, "isa", NULL
, NULL
};
198 static void __init
clps7500_init_irq(void)
200 unsigned int irq
, flags
;
202 iomd_writeb(0, IOMD_IRQMASKA
);
203 iomd_writeb(0, IOMD_IRQMASKB
);
204 iomd_writeb(0, IOMD_FIQMASK
);
205 iomd_writeb(0, IOMD_DMAMASK
);
207 for (irq
= 0; irq
< NR_IRQS
; irq
++) {
210 if (irq
<= 6 || (irq
>= 9 && irq
<= 15) ||
211 (irq
>= 48 && irq
<= 55))
216 set_irq_chip(irq
, &clps7500_a_chip
);
217 set_irq_handler(irq
, do_level_IRQ
);
218 set_irq_flags(irq
, flags
);
222 set_irq_chip(irq
, &clps7500_b_chip
);
223 set_irq_handler(irq
, do_level_IRQ
);
224 set_irq_flags(irq
, flags
);
228 set_irq_chip(irq
, &clps7500_dma_chip
);
229 set_irq_handler(irq
, do_level_IRQ
);
230 set_irq_flags(irq
, flags
);
234 set_irq_chip(irq
, &clps7500_c_chip
);
235 set_irq_handler(irq
, do_level_IRQ
);
236 set_irq_flags(irq
, flags
);
240 set_irq_chip(irq
, &clps7500_d_chip
);
241 set_irq_handler(irq
, do_level_IRQ
);
242 set_irq_flags(irq
, flags
);
246 set_irq_chip(irq
, &clps7500_no_chip
);
247 set_irq_handler(irq
, do_level_IRQ
);
248 set_irq_flags(irq
, flags
);
252 set_irq_chip(irq
, &clps7500_fiq_chip
);
253 set_irq_handler(irq
, do_level_IRQ
);
254 set_irq_flags(irq
, flags
);
259 setup_irq(IRQ_ISA
, &irq_isa
);
262 static struct map_desc cl7500_io_desc
[] __initdata
= {
264 .virtual = (unsigned long)IO_BASE
,
265 .pfn
= __phys_to_pfn(IO_START
),
270 .pfn
= __phys_to_pfn(ISA_START
),
274 .virtual = FLASH_BASE
,
275 .pfn
= __phys_to_pfn(FLASH_START
),
276 .length
= FLASH_SIZE
,
280 .pfn
= __phys_to_pfn(LED_START
),
286 static void __init
clps7500_map_io(void)
288 iotable_init(cl7500_io_desc
, ARRAY_SIZE(cl7500_io_desc
));
291 extern void ioctime_init(void);
292 extern unsigned long ioc_timer_gettimeoffset(void);
295 clps7500_timer_interrupt(int irq
, void *dev_id
)
297 write_seqlock(&xtime_lock
);
301 /* Why not using do_leds interface?? */
303 /* Twinkle the lights. */
304 static int count
, state
= 0xff00;
308 *((volatile unsigned int *)LED_ADDRESS
) = state
;
312 write_sequnlock(&xtime_lock
);
317 static struct irqaction clps7500_timer_irq
= {
318 .name
= "CLPS7500 Timer Tick",
319 .flags
= IRQF_DISABLED
| IRQF_TIMER
,
320 .handler
= clps7500_timer_interrupt
,
324 * Set up timer interrupt.
326 static void __init
clps7500_timer_init(void)
329 setup_irq(IRQ_TIMER
, &clps7500_timer_irq
);
332 static struct sys_timer clps7500_timer
= {
333 .init
= clps7500_timer_init
,
334 .offset
= ioc_timer_gettimeoffset
,
337 static struct plat_serial8250_port serial_platform_data
[] = {
339 .mapbase
= 0x03010fe0,
344 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
| UPF_SKIP_TEST
,
347 .mapbase
= 0x03010be0,
352 .flags
= UPF_BOOT_AUTOCONF
| UPF_IOREMAP
| UPF_SKIP_TEST
,
355 .iobase
= ISASLOT_IO
+ 0x2e8,
360 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
363 .iobase
= ISASLOT_IO
+ 0x3e8,
368 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
,
373 static struct platform_device serial_device
= {
374 .name
= "serial8250",
375 .id
= PLAT8250_DEV_PLATFORM
,
377 .platform_data
= serial_platform_data
,
381 static void __init
clps7500_init(void)
383 platform_device_register(&serial_device
);
386 MACHINE_START(CLPS7500
, "CL-PS7500")
387 /* Maintainer: Philip Blundell */
388 .phys_io
= 0x03000000,
389 .io_pg_offst
= ((0xe0000000) >> 18) & 0xfffc,
390 .map_io
= clps7500_map_io
,
391 .init_irq
= clps7500_init_irq
,
392 .init_machine
= clps7500_init
,
393 .timer
= &clps7500_timer
,