2 * mmconfig-shared.c - Low-level direct PCI config space access via
3 * MMCONFIG - common code between i386 and x86-64.
6 * - known chipset handling
7 * - ACPI decoding and validation
9 * Per-architecture code takes care of the mappings and accesses
13 #include <linux/pci.h>
14 #include <linux/init.h>
15 #include <linux/acpi.h>
16 #include <linux/bitmap.h>
21 /* aperture is up to 256MB but BIOS may reserve less */
22 #define MMCONFIG_APER_MIN (2 * 1024*1024)
23 #define MMCONFIG_APER_MAX (256 * 1024*1024)
25 /* Indicate if the mmcfg resources have been placed into the resource table. */
26 static int __initdata pci_mmcfg_resources_inserted
;
28 static const char __init
*pci_mmcfg_e7520(void)
31 pci_direct_conf1
.read(0, 0, PCI_DEVFN(0,0), 0xce, 2, &win
);
34 if(win
== 0x0000 || win
== 0xf000)
35 pci_mmcfg_config_num
= 0;
37 pci_mmcfg_config_num
= 1;
38 pci_mmcfg_config
= kzalloc(sizeof(pci_mmcfg_config
[0]), GFP_KERNEL
);
39 if (!pci_mmcfg_config
)
41 pci_mmcfg_config
[0].address
= win
<< 16;
42 pci_mmcfg_config
[0].pci_segment
= 0;
43 pci_mmcfg_config
[0].start_bus_number
= 0;
44 pci_mmcfg_config
[0].end_bus_number
= 255;
47 return "Intel Corporation E7520 Memory Controller Hub";
50 static const char __init
*pci_mmcfg_intel_945(void)
52 u32 pciexbar
, mask
= 0, len
= 0;
54 pci_mmcfg_config_num
= 1;
56 pci_direct_conf1
.read(0, 0, PCI_DEVFN(0,0), 0x48, 4, &pciexbar
);
60 pci_mmcfg_config_num
= 0;
63 switch ((pciexbar
>> 1) & 3) {
77 pci_mmcfg_config_num
= 0;
80 /* Errata #2, things break when not aligned on a 256Mb boundary */
81 /* Can only happen in 64M/128M mode */
83 if ((pciexbar
& mask
) & 0x0fffffffU
)
84 pci_mmcfg_config_num
= 0;
86 /* Don't hit the APIC registers and their friends */
87 if ((pciexbar
& mask
) >= 0xf0000000U
)
88 pci_mmcfg_config_num
= 0;
90 if (pci_mmcfg_config_num
) {
91 pci_mmcfg_config
= kzalloc(sizeof(pci_mmcfg_config
[0]), GFP_KERNEL
);
92 if (!pci_mmcfg_config
)
94 pci_mmcfg_config
[0].address
= pciexbar
& mask
;
95 pci_mmcfg_config
[0].pci_segment
= 0;
96 pci_mmcfg_config
[0].start_bus_number
= 0;
97 pci_mmcfg_config
[0].end_bus_number
= (len
>> 20) - 1;
100 return "Intel Corporation 945G/GZ/P/PL Express Memory Controller Hub";
103 struct pci_mmcfg_hostbridge_probe
{
106 const char *(*probe
)(void);
109 static struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes
[] __initdata
= {
110 { PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_E7520_MCH
, pci_mmcfg_e7520
},
111 { PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82945G_HB
, pci_mmcfg_intel_945
},
114 static int __init
pci_mmcfg_check_hostbridge(void)
121 pci_direct_conf1
.read(0, 0, PCI_DEVFN(0,0), 0, 4, &l
);
123 device
= (l
>> 16) & 0xffff;
125 pci_mmcfg_config_num
= 0;
126 pci_mmcfg_config
= NULL
;
129 for (i
= 0; !name
&& i
< ARRAY_SIZE(pci_mmcfg_probes
); i
++) {
130 if (pci_mmcfg_probes
[i
].vendor
== vendor
&&
131 pci_mmcfg_probes
[i
].device
== device
)
132 name
= pci_mmcfg_probes
[i
].probe();
136 printk(KERN_INFO
"PCI: Found %s %s MMCONFIG support.\n",
137 name
, pci_mmcfg_config_num
? "with" : "without");
143 static void __init
pci_mmcfg_insert_resources(unsigned long resource_flags
)
145 #define PCI_MMCFG_RESOURCE_NAME_LEN 19
147 struct resource
*res
;
151 res
= kcalloc(PCI_MMCFG_RESOURCE_NAME_LEN
+ sizeof(*res
),
152 pci_mmcfg_config_num
, GFP_KERNEL
);
154 printk(KERN_ERR
"PCI: Unable to allocate MMCONFIG resources\n");
158 names
= (void *)&res
[pci_mmcfg_config_num
];
159 for (i
= 0; i
< pci_mmcfg_config_num
; i
++, res
++) {
160 struct acpi_mcfg_allocation
*cfg
= &pci_mmcfg_config
[i
];
161 num_buses
= cfg
->end_bus_number
- cfg
->start_bus_number
+ 1;
163 snprintf(names
, PCI_MMCFG_RESOURCE_NAME_LEN
, "PCI MMCONFIG %u",
165 res
->start
= cfg
->address
;
166 res
->end
= res
->start
+ (num_buses
<< 20) - 1;
167 res
->flags
= IORESOURCE_MEM
| resource_flags
;
168 insert_resource(&iomem_resource
, res
);
169 names
+= PCI_MMCFG_RESOURCE_NAME_LEN
;
172 /* Mark that the resources have been inserted. */
173 pci_mmcfg_resources_inserted
= 1;
176 static acpi_status __init
check_mcfg_resource(struct acpi_resource
*res
,
179 struct resource
*mcfg_res
= data
;
180 struct acpi_resource_address64 address
;
183 if (res
->type
== ACPI_RESOURCE_TYPE_FIXED_MEMORY32
) {
184 struct acpi_resource_fixed_memory32
*fixmem32
=
185 &res
->data
.fixed_memory32
;
188 if ((mcfg_res
->start
>= fixmem32
->address
) &&
189 (mcfg_res
->end
< (fixmem32
->address
+
190 fixmem32
->address_length
))) {
192 return AE_CTRL_TERMINATE
;
195 if ((res
->type
!= ACPI_RESOURCE_TYPE_ADDRESS32
) &&
196 (res
->type
!= ACPI_RESOURCE_TYPE_ADDRESS64
))
199 status
= acpi_resource_to_address64(res
, &address
);
200 if (ACPI_FAILURE(status
) ||
201 (address
.address_length
<= 0) ||
202 (address
.resource_type
!= ACPI_MEMORY_RANGE
))
205 if ((mcfg_res
->start
>= address
.minimum
) &&
206 (mcfg_res
->end
< (address
.minimum
+ address
.address_length
))) {
208 return AE_CTRL_TERMINATE
;
213 static acpi_status __init
find_mboard_resource(acpi_handle handle
, u32 lvl
,
214 void *context
, void **rv
)
216 struct resource
*mcfg_res
= context
;
218 acpi_walk_resources(handle
, METHOD_NAME__CRS
,
219 check_mcfg_resource
, context
);
222 return AE_CTRL_TERMINATE
;
227 static int __init
is_acpi_reserved(unsigned long start
, unsigned long end
)
229 struct resource mcfg_res
;
231 mcfg_res
.start
= start
;
235 acpi_get_devices("PNP0C01", find_mboard_resource
, &mcfg_res
, NULL
);
238 acpi_get_devices("PNP0C02", find_mboard_resource
, &mcfg_res
,
241 return mcfg_res
.flags
;
244 static void __init
pci_mmcfg_reject_broken(void)
246 typeof(pci_mmcfg_config
[0]) *cfg
;
249 if ((pci_mmcfg_config_num
== 0) ||
250 (pci_mmcfg_config
== NULL
) ||
251 (pci_mmcfg_config
[0].address
== 0))
254 cfg
= &pci_mmcfg_config
[0];
257 * Handle more broken MCFG tables on Asus etc.
258 * They only contain a single entry for bus 0-0.
260 if (pci_mmcfg_config_num
== 1 &&
261 cfg
->pci_segment
== 0 &&
262 (cfg
->start_bus_number
| cfg
->end_bus_number
) == 0) {
263 printk(KERN_ERR
"PCI: start and end of bus number is 0. "
264 "Rejected as broken MCFG.\n");
268 for (i
= 0; i
< pci_mmcfg_config_num
; i
++) {
269 u32 size
= (cfg
->end_bus_number
+ 1) << 20;
270 cfg
= &pci_mmcfg_config
[i
];
271 printk(KERN_NOTICE
"PCI: MCFG configuration %d: base %lu "
272 "segment %hu buses %u - %u\n",
273 i
, (unsigned long)cfg
->address
, cfg
->pci_segment
,
274 (unsigned int)cfg
->start_bus_number
,
275 (unsigned int)cfg
->end_bus_number
);
276 if (is_acpi_reserved(cfg
->address
, cfg
->address
+ size
- 1)) {
277 printk(KERN_NOTICE
"PCI: MCFG area at %Lx reserved "
278 "in ACPI motherboard resources\n",
281 printk(KERN_ERR
"PCI: BIOS Bug: MCFG area at %Lx is not"
282 " reserved in ACPI motherboard resources\n",
284 /* Don't try to do this check unless configuration
285 type 1 is available. */
286 if ((pci_probe
& PCI_PROBE_CONF1
) &&
287 e820_all_mapped(cfg
->address
,
288 cfg
->address
+ size
- 1,
291 "PCI: MCFG area at %Lx reserved in "
302 printk(KERN_ERR
"PCI: Not using MMCONFIG.\n");
303 pci_mmcfg_arch_free();
304 kfree(pci_mmcfg_config
);
305 pci_mmcfg_config
= NULL
;
306 pci_mmcfg_config_num
= 0;
309 void __init
pci_mmcfg_early_init(int type
)
311 if ((pci_probe
& PCI_PROBE_MMCONF
) == 0)
314 /* If type 1 access is available, no need to enable MMCONFIG yet, we can
315 defer until later when the ACPI interpreter is available to better
320 acpi_table_parse(ACPI_SIG_MCFG
, acpi_parse_mcfg
);
322 if ((pci_mmcfg_config_num
== 0) ||
323 (pci_mmcfg_config
== NULL
) ||
324 (pci_mmcfg_config
[0].address
== 0))
327 if (pci_mmcfg_arch_init())
328 pci_probe
= (pci_probe
& ~PCI_PROBE_MASK
) | PCI_PROBE_MMCONF
;
331 void __init
pci_mmcfg_late_init(void)
333 int known_bridge
= 0;
335 /* MMCONFIG disabled */
336 if ((pci_probe
& PCI_PROBE_MMCONF
) == 0)
339 /* MMCONFIG already enabled */
340 if (!(pci_probe
& PCI_PROBE_MASK
& ~PCI_PROBE_MMCONF
))
343 if ((pci_probe
& PCI_PROBE_CONF1
) && pci_mmcfg_check_hostbridge())
346 acpi_table_parse(ACPI_SIG_MCFG
, acpi_parse_mcfg
);
348 pci_mmcfg_reject_broken();
350 if ((pci_mmcfg_config_num
== 0) ||
351 (pci_mmcfg_config
== NULL
) ||
352 (pci_mmcfg_config
[0].address
== 0))
355 if (pci_mmcfg_arch_init()) {
357 pci_mmcfg_insert_resources(IORESOURCE_BUSY
);
358 pci_probe
= (pci_probe
& ~PCI_PROBE_MASK
) | PCI_PROBE_MMCONF
;
361 * Signal not to attempt to insert mmcfg resources because
362 * the architecture mmcfg setup could not initialize.
364 pci_mmcfg_resources_inserted
= 1;
368 static int __init
pci_mmcfg_late_insert_resources(void)
371 * If resources are already inserted or we are not using MMCONFIG,
372 * don't insert the resources.
374 if ((pci_mmcfg_resources_inserted
== 1) ||
375 (pci_probe
& PCI_PROBE_MMCONF
) == 0 ||
376 (pci_mmcfg_config_num
== 0) ||
377 (pci_mmcfg_config
== NULL
) ||
378 (pci_mmcfg_config
[0].address
== 0))
382 * Attempt to insert the mmcfg resources but not with the busy flag
383 * marked so it won't cause request errors when __request_region is
386 pci_mmcfg_insert_resources(0);
392 * Perform MMCONFIG resource insertion after PCI initialization to allow for
393 * misprogrammed MCFG tables that state larger sizes but actually conflict
394 * with other system resources.
396 late_initcall(pci_mmcfg_late_insert_resources
);