Blackfin arch: include linux headers that this one uses definitions from fro sport...
[linux-2.6/mini2440.git] / arch / blackfin / include / asm / bfin_sport.h
blobd4169590e757d6416e043ddca7ea899bfc370fac
1 /*
2 * bfin_sport.h - userspace header for bfin sport driver
4 * Copyright 2004-2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
7 */
9 #ifndef __BFIN_SPORT_H__
10 #define __BFIN_SPORT_H__
12 #ifdef __KERNEL__
13 #include <linux/cdev.h>
14 #include <linux/mutex.h>
15 #include <linux/sched.h>
16 #include <linux/wait.h>
17 #endif
19 #define SPORT_MAJOR 237
20 #define SPORT_NR_DEVS 2
22 /* Sport mode: it can be set to TDM, i2s or others */
23 #define NORM_MODE 0x0
24 #define TDM_MODE 0x1
25 #define I2S_MODE 0x2
27 /* Data format, normal, a-law or u-law */
28 #define NORM_FORMAT 0x0
29 #define ALAW_FORMAT 0x2
30 #define ULAW_FORMAT 0x3
32 /* Function driver which use sport must initialize the structure */
33 struct sport_config {
34 /* TDM (multichannels), I2S or other mode */
35 unsigned int mode:3;
37 /* if TDM mode is selected, channels must be set */
38 int channels; /* Must be in 8 units */
39 unsigned int frame_delay:4; /* Delay between frame sync pulse and first bit */
41 /* I2S mode */
42 unsigned int right_first:1; /* Right stereo channel first */
44 /* In mormal mode, the following item need to be set */
45 unsigned int lsb_first:1; /* order of transmit or receive data */
46 unsigned int fsync:1; /* Frame sync required */
47 unsigned int data_indep:1; /* data independent frame sync generated */
48 unsigned int act_low:1; /* Active low TFS */
49 unsigned int late_fsync:1; /* Late frame sync */
50 unsigned int tckfe:1;
51 unsigned int sec_en:1; /* Secondary side enabled */
53 /* Choose clock source */
54 unsigned int int_clk:1; /* Internal or external clock */
56 /* If external clock is used, the following fields are ignored */
57 int serial_clk;
58 int fsync_clk;
60 unsigned int data_format:2; /* Normal, u-law or a-law */
62 int word_len; /* How length of the word in bits, 3-32 bits */
63 int dma_enabled;
66 /* Userspace interface */
67 #define SPORT_IOC_MAGIC 'P'
68 #define SPORT_IOC_CONFIG _IOWR('P', 0x01, struct sport_config)
70 #ifdef __KERNEL__
72 struct sport_register {
73 unsigned short tcr1;
74 unsigned short reserved0;
75 unsigned short tcr2;
76 unsigned short reserved1;
77 unsigned short tclkdiv;
78 unsigned short reserved2;
79 unsigned short tfsdiv;
80 unsigned short reserved3;
81 unsigned long tx;
82 unsigned long reserved_l0;
83 unsigned long rx;
84 unsigned long reserved_l1;
85 unsigned short rcr1;
86 unsigned short reserved4;
87 unsigned short rcr2;
88 unsigned short reserved5;
89 unsigned short rclkdiv;
90 unsigned short reserved6;
91 unsigned short rfsdiv;
92 unsigned short reserved7;
93 unsigned short stat;
94 unsigned short reserved8;
95 unsigned short chnl;
96 unsigned short reserved9;
97 unsigned short mcmc1;
98 unsigned short reserved10;
99 unsigned short mcmc2;
100 unsigned short reserved11;
101 unsigned long mtcs0;
102 unsigned long mtcs1;
103 unsigned long mtcs2;
104 unsigned long mtcs3;
105 unsigned long mrcs0;
106 unsigned long mrcs1;
107 unsigned long mrcs2;
108 unsigned long mrcs3;
111 struct sport_dev {
112 struct cdev cdev; /* Char device structure */
114 int sport_num;
116 int dma_rx_chan;
117 int dma_tx_chan;
119 int rx_irq;
120 unsigned char *rx_buf; /* Buffer store the received data */
121 int rx_len; /* How many bytes will be received */
122 int rx_received; /* How many bytes has been received */
124 int tx_irq;
125 const unsigned char *tx_buf;
126 int tx_len;
127 int tx_sent;
129 int sport_err_irq;
131 struct mutex mutex; /* mutual exclusion semaphore */
132 struct task_struct *task;
134 wait_queue_head_t waitq;
135 int wait_con;
136 struct sport_register *regs;
137 struct sport_config config;
140 #endif
142 #define SPORT_TCR1 0
143 #define SPORT_TCR2 1
144 #define SPORT_TCLKDIV 2
145 #define SPORT_TFSDIV 3
146 #define SPORT_RCR1 8
147 #define SPORT_RCR2 9
148 #define SPORT_RCLKDIV 10
149 #define SPORT_RFSDIV 11
150 #define SPORT_CHANNEL 13
151 #define SPORT_MCMC1 14
152 #define SPORT_MCMC2 15
153 #define SPORT_MTCS0 16
154 #define SPORT_MTCS1 17
155 #define SPORT_MTCS2 18
156 #define SPORT_MTCS3 19
157 #define SPORT_MRCS0 20
158 #define SPORT_MRCS1 21
159 #define SPORT_MRCS2 22
160 #define SPORT_MRCS3 23
162 #endif