Merge git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable
[linux-2.6/mini2440.git] / arch / ia64 / include / asm / mca.h
blob18a4321349a3313973369e553dd4d90e0e220bab
1 /*
2 * File: mca.h
3 * Purpose: Machine check handling specific defines
5 * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
6 * Copyright (C) Vijay Chander <vijay@engr.sgi.com>
7 * Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
8 * Copyright (C) Russ Anderson <rja@sgi.com>
9 */
11 #ifndef _ASM_IA64_MCA_H
12 #define _ASM_IA64_MCA_H
14 #if !defined(__ASSEMBLY__)
16 #include <linux/interrupt.h>
17 #include <linux/types.h>
19 #include <asm/param.h>
20 #include <asm/sal.h>
21 #include <asm/processor.h>
22 #include <asm/mca_asm.h>
24 #define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
26 typedef struct ia64_fptr {
27 unsigned long fp;
28 unsigned long gp;
29 } ia64_fptr_t;
31 typedef union cmcv_reg_u {
32 u64 cmcv_regval;
33 struct {
34 u64 cmcr_vector : 8;
35 u64 cmcr_reserved1 : 4;
36 u64 cmcr_ignored1 : 1;
37 u64 cmcr_reserved2 : 3;
38 u64 cmcr_mask : 1;
39 u64 cmcr_ignored2 : 47;
40 } cmcv_reg_s;
42 } cmcv_reg_t;
44 #define cmcv_mask cmcv_reg_s.cmcr_mask
45 #define cmcv_vector cmcv_reg_s.cmcr_vector
47 enum {
48 IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
49 IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
50 IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
51 IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3,
54 /* Information maintained by the MC infrastructure */
55 typedef struct ia64_mc_info_s {
56 u64 imi_mca_handler;
57 size_t imi_mca_handler_size;
58 u64 imi_monarch_init_handler;
59 size_t imi_monarch_init_handler_size;
60 u64 imi_slave_init_handler;
61 size_t imi_slave_init_handler_size;
62 u8 imi_rendez_checkin[NR_CPUS];
64 } ia64_mc_info_t;
66 /* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
67 * Besides the handover state, it also contains some saved registers from the
68 * time of the event.
69 * Note: mca_asm.S depends on the precise layout of this structure.
72 struct ia64_sal_os_state {
74 /* SAL to OS */
75 u64 os_gp; /* GP of the os registered with the SAL, physical */
76 u64 pal_proc; /* PAL_PROC entry point, physical */
77 u64 sal_proc; /* SAL_PROC entry point, physical */
78 u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */
79 u64 proc_state_param; /* from R18 */
80 u64 monarch; /* 1 for a monarch event, 0 for a slave */
82 /* common */
83 u64 sal_ra; /* Return address in SAL, physical */
84 u64 sal_gp; /* GP of the SAL - physical */
85 pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */
86 /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
87 * Note: if the MCA/INIT recovery code wants to resume to a new context
88 * then it must change these values to reflect the new kernel stack.
90 u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
91 u64 prev_IA64_KR_CURRENT_STACK;
92 struct task_struct *prev_task; /* previous task, NULL if it is not useful */
93 /* Some interrupt registers are not saved in minstate, pt_regs or
94 * switch_stack. Because MCA/INIT can occur when interrupts are
95 * disabled, we need to save the additional interrupt registers over
96 * MCA/INIT and resume.
98 u64 isr;
99 u64 ifa;
100 u64 itir;
101 u64 iipa;
102 u64 iim;
103 u64 iha;
105 /* OS to SAL */
106 u64 os_status; /* OS status to SAL, enum below */
107 u64 context; /* 0 if return to same context
108 1 if return to new context */
111 enum {
112 IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
113 IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
114 IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
115 IA64_MCA_HALT = -3 /* System to be halted by SAL */
118 enum {
119 IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
120 IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
123 enum {
124 IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
125 IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
128 /* Per-CPU MCA state that is too big for normal per-CPU variables. */
130 struct ia64_mca_cpu {
131 u64 mca_stack[KERNEL_STACK_SIZE/8];
132 u64 init_stack[KERNEL_STACK_SIZE/8];
135 /* Array of physical addresses of each CPU's MCA area. */
136 extern unsigned long __per_cpu_mca[NR_CPUS];
138 extern int cpe_vector;
139 extern int ia64_cpe_irq;
140 extern void ia64_mca_init(void);
141 extern void ia64_mca_cpu_init(void *);
142 extern void ia64_os_mca_dispatch(void);
143 extern void ia64_os_mca_dispatch_end(void);
144 extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
145 extern void ia64_init_handler(struct pt_regs *,
146 struct switch_stack *,
147 struct ia64_sal_os_state *);
148 extern void ia64_monarch_init_handler(void);
149 extern void ia64_slave_init_handler(void);
150 extern void ia64_mca_cmc_vector_setup(void);
151 extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
152 extern void ia64_unreg_MCA_extension(void);
153 extern u64 ia64_get_rnat(u64 *);
154 extern void ia64_mca_printk(const char * fmt, ...)
155 __attribute__ ((format (printf, 1, 2)));
157 struct ia64_mca_notify_die {
158 struct ia64_sal_os_state *sos;
159 int *monarch_cpu;
160 int *data;
163 DECLARE_PER_CPU(u64, ia64_mca_pal_base);
165 #else /* __ASSEMBLY__ */
167 #define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
168 #define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
169 #define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
170 #define IA64_MCA_HALT -3 /* System to be halted by SAL */
172 #define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
173 #define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
175 #define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
176 #define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
178 #endif /* !__ASSEMBLY__ */
179 #endif /* _ASM_IA64_MCA_H */