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[ARM] pxa: move UART register definitions into dedicated regs-uart.h
[linux-2.6/mini2440.git] / drivers / net / irda / pxaficp_ir.c
blobba445133f3eb0ad9cff1a3d5cbc20d6e2819fc2c
1 /*
2 * linux/drivers/net/irda/pxaficp_ir.c
3 *
4 * Based on sa1100_ir.c by Russell King
5 *
6 * Changes copyright (C) 2003-2005 MontaVista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor
13 *
14 */
15 #include <linux/module.h>
16 #include <linux/netdevice.h>
17 #include <linux/platform_device.h>
18 #include <linux/clk.h>
19
20 #include <net/irda/irda.h>
21 #include <net/irda/irmod.h>
22 #include <net/irda/wrapper.h>
23 #include <net/irda/irda_device.h>
24
25 #include <asm/dma.h>
26 #include <mach/irda.h>
27 #include <mach/pxa-regs.h>
28 #include <mach/regs-uart.h>
29
30 #define FICP __REG(0x40800000) /* Start of FICP area */
31 #define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */
32 #define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */
33 #define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */
34 #define ICDR __REG(0x4080000c) /* ICP Data Register */
35 #define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */
36 #define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */
37
38 #define ICCR0_AME (1 << 7) /* Address match enable */
39 #define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */
40 #define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */
41 #define ICCR0_RXE (1 << 4) /* Receive enable */
42 #define ICCR0_TXE (1 << 3) /* Transmit enable */
43 #define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */
44 #define ICCR0_LBM (1 << 1) /* Loopback mode */
45 #define ICCR0_ITR (1 << 0) /* IrDA transmission */
46
47 #define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */
48 #define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */
49 #define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */
50 #define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */
51 #define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */
52 #define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */
53
54 #ifdef CONFIG_PXA27x
55 #define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */
56 #endif
57 #define ICSR0_FRE (1 << 5) /* Framing error */
58 #define ICSR0_RFS (1 << 4) /* Receive FIFO service request */
59 #define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */
60 #define ICSR0_RAB (1 << 2) /* Receiver abort */
61 #define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */
62 #define ICSR0_EIF (1 << 0) /* End/Error in FIFO */
63
64 #define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */
65 #define ICSR1_CRE (1 << 5) /* CRC error */
66 #define ICSR1_EOF (1 << 4) /* End of frame */
67 #define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */
68 #define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */
69 #define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */
70 #define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */
71
72 #define IrSR_RXPL_NEG_IS_ZERO (1<<4)
73 #define IrSR_RXPL_POS_IS_ZERO 0x0
74 #define IrSR_TXPL_NEG_IS_ZERO (1<<3)
75 #define IrSR_TXPL_POS_IS_ZERO 0x0
76 #define IrSR_XMODE_PULSE_1_6 (1<<2)
77 #define IrSR_XMODE_PULSE_3_16 0x0
78 #define IrSR_RCVEIR_IR_MODE (1<<1)
79 #define IrSR_RCVEIR_UART_MODE 0x0
80 #define IrSR_XMITIR_IR_MODE (1<<0)
81 #define IrSR_XMITIR_UART_MODE 0x0
82
83 #define IrSR_IR_RECEIVE_ON (\
84 IrSR_RXPL_NEG_IS_ZERO | \
85 IrSR_TXPL_POS_IS_ZERO | \
86 IrSR_XMODE_PULSE_3_16 | \
87 IrSR_RCVEIR_IR_MODE | \
88 IrSR_XMITIR_UART_MODE)
89
90 #define IrSR_IR_TRANSMIT_ON (\
91 IrSR_RXPL_NEG_IS_ZERO | \
92 IrSR_TXPL_POS_IS_ZERO | \
93 IrSR_XMODE_PULSE_3_16 | \
94 IrSR_RCVEIR_UART_MODE | \
95 IrSR_XMITIR_IR_MODE)
96
97 struct pxa_irda {
98 int speed;
99 int newspeed;
100 unsigned long last_oscr;
101
102 unsigned char *dma_rx_buff;
103 unsigned char *dma_tx_buff;
104 dma_addr_t dma_rx_buff_phy;
105 dma_addr_t dma_tx_buff_phy;
106 unsigned int dma_tx_buff_len;
107 int txdma;
108 int rxdma;
109
110 struct net_device_stats stats;
111 struct irlap_cb *irlap;
112 struct qos_info qos;
113
114 iobuff_t tx_buff;
115 iobuff_t rx_buff;
116
117 struct device *dev;
118 struct pxaficp_platform_data *pdata;
119 struct clk *fir_clk;
120 struct clk *sir_clk;
121 struct clk *cur_clk;
122 };
123
124 static inline void pxa_irda_disable_clk(struct pxa_irda *si)
125 {
126 if (si->cur_clk)
127 clk_disable(si->cur_clk);
128 si->cur_clk = NULL;
129 }
130
131 static inline void pxa_irda_enable_firclk(struct pxa_irda *si)
132 {
133 si->cur_clk = si->fir_clk;
134 clk_enable(si->fir_clk);
135 }
136
137 static inline void pxa_irda_enable_sirclk(struct pxa_irda *si)
138 {
139 si->cur_clk = si->sir_clk;
140 clk_enable(si->sir_clk);
141 }
142
143
144 #define IS_FIR(si) ((si)->speed >= 4000000)
145 #define IRDA_FRAME_SIZE_LIMIT 2047
146
147 inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si)
148 {
149 DCSR(si->rxdma) = DCSR_NODESC;
150 DSADR(si->rxdma) = __PREG(ICDR);
151 DTADR(si->rxdma) = si->dma_rx_buff_phy;
152 DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT;
153 DCSR(si->rxdma) |= DCSR_RUN;
154 }
155
156 inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si)
157 {
158 DCSR(si->txdma) = DCSR_NODESC;
159 DSADR(si->txdma) = si->dma_tx_buff_phy;
160 DTADR(si->txdma) = __PREG(ICDR);
161 DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len;
162 DCSR(si->txdma) |= DCSR_RUN;
163 }
164
165 /*
166 * Set the IrDA communications speed.
167 */
168 static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
169 {
170 unsigned long flags;
171 unsigned int divisor;
172
173 switch (speed) {
174 case 9600: case 19200: case 38400:
175 case 57600: case 115200:
176
177 /* refer to PXA250/210 Developer's Manual 10-7 */
178 /* BaudRate = 14.7456 MHz / (16*Divisor) */
179 divisor = 14745600 / (16 * speed);
180
181 local_irq_save(flags);
182
183 if (IS_FIR(si)) {
184 /* stop RX DMA */
185 DCSR(si->rxdma) &= ~DCSR_RUN;
186 /* disable FICP */
187 ICCR0 = 0;
188 pxa_irda_disable_clk(si);
189
190 /* set board transceiver to SIR mode */
191 si->pdata->transceiver_mode(si->dev, IR_SIRMODE);
192
193 /* enable the STUART clock */
194 pxa_irda_enable_sirclk(si);
195 }
196
197 /* disable STUART first */
198 STIER = 0;
199
200 /* access DLL & DLH */
201 STLCR |= LCR_DLAB;
202 STDLL = divisor & 0xff;
203 STDLH = divisor >> 8;
204 STLCR &= ~LCR_DLAB;
205
206 si->speed = speed;
207 STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
208 STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
209
210 local_irq_restore(flags);
211 break;
212
213 case 4000000:
214 local_irq_save(flags);
215
216 /* disable STUART */
217 STIER = 0;
218 STISR = 0;
219 pxa_irda_disable_clk(si);
220
221 /* disable FICP first */
222 ICCR0 = 0;
223
224 /* set board transceiver to FIR mode */
225 si->pdata->transceiver_mode(si->dev, IR_FIRMODE);
226
227 /* enable the FICP clock */
228 pxa_irda_enable_firclk(si);
229
230 si->speed = speed;
231 pxa_irda_fir_dma_rx_start(si);
232 ICCR0 = ICCR0_ITR | ICCR0_RXE;
233
234 local_irq_restore(flags);
235 break;
236
237 default:
238 return -EINVAL;
239 }
240
241 return 0;
242 }
243
244 /* SIR interrupt service routine. */
245 static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id)
246 {
247 struct net_device *dev = dev_id;
248 struct pxa_irda *si = netdev_priv(dev);
249 int iir, lsr, data;
250
251 iir = STIIR;
252
253 switch (iir & 0x0F) {
254 case 0x06: /* Receiver Line Status */
255 lsr = STLSR;
256 while (lsr & LSR_FIFOE) {
257 data = STRBR;
258 if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) {
259 printk(KERN_DEBUG "pxa_ir: sir receiving error\n");
260 si->stats.rx_errors++;
261 if (lsr & LSR_FE)
262 si->stats.rx_frame_errors++;
263 if (lsr & LSR_OE)
264 si->stats.rx_fifo_errors++;
265 } else {
266 si->stats.rx_bytes++;
267 async_unwrap_char(dev, &si->stats, &si->rx_buff, data);
268 }
269 lsr = STLSR;
270 }
271 dev->last_rx = jiffies;
272 si->last_oscr = OSCR;
273 break;
274
275 case 0x04: /* Received Data Available */
276 /* forth through */
277
278 case 0x0C: /* Character Timeout Indication */
279 do {
280 si->stats.rx_bytes++;
281 async_unwrap_char(dev, &si->stats, &si->rx_buff, STRBR);
282 } while (STLSR & LSR_DR);
283 dev->last_rx = jiffies;
284 si->last_oscr = OSCR;
285 break;
286
287 case 0x02: /* Transmit FIFO Data Request */
288 while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) {
289 STTHR = *si->tx_buff.data++;
290 si->tx_buff.len -= 1;
291 }
292
293 if (si->tx_buff.len == 0) {
294 si->stats.tx_packets++;
295 si->stats.tx_bytes += si->tx_buff.data -
296 si->tx_buff.head;
297
298 /* We need to ensure that the transmitter has finished. */
299 while ((STLSR & LSR_TEMT) == 0)
300 cpu_relax();
301 si->last_oscr = OSCR;
302
303 /*
304 * Ok, we've finished transmitting. Now enable
305 * the receiver. Sometimes we get a receive IRQ
306 * immediately after a transmit...
307 */
308 if (si->newspeed) {
309 pxa_irda_set_speed(si, si->newspeed);
310 si->newspeed = 0;
311 } else {
312 /* enable IR Receiver, disable IR Transmitter */
313 STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
314 /* enable STUART and receive interrupts */
315 STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
316 }
317 /* I'm hungry! */
318 netif_wake_queue(dev);
319 }
320 break;
321 }
322
323 return IRQ_HANDLED;
324 }
325
326 /* FIR Receive DMA interrupt handler */
327 static void pxa_irda_fir_dma_rx_irq(int channel, void *data)
328 {
329 int dcsr = DCSR(channel);
330
331 DCSR(channel) = dcsr & ~DCSR_RUN;
332
333 printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr);
334 }
335
336 /* FIR Transmit DMA interrupt handler */
337 static void pxa_irda_fir_dma_tx_irq(int channel, void *data)
338 {
339 struct net_device *dev = data;
340 struct pxa_irda *si = netdev_priv(dev);
341 int dcsr;
342
343 dcsr = DCSR(channel);
344 DCSR(channel) = dcsr & ~DCSR_RUN;
345
346 if (dcsr & DCSR_ENDINTR) {
347 si->stats.tx_packets++;
348 si->stats.tx_bytes += si->dma_tx_buff_len;
349 } else {
350 si->stats.tx_errors++;
351 }
352
353 while (ICSR1 & ICSR1_TBY)
354 cpu_relax();
355 si->last_oscr = OSCR;
356
357 /*
358 * HACK: It looks like the TBY bit is dropped too soon.
359 * Without this delay things break.
360 */
361 udelay(120);
362
363 if (si->newspeed) {
364 pxa_irda_set_speed(si, si->newspeed);
365 si->newspeed = 0;
366 } else {
367 int i = 64;
368
369 ICCR0 = 0;
370 pxa_irda_fir_dma_rx_start(si);
371 while ((ICSR1 & ICSR1_RNE) && i--)
372 (void)ICDR;
373 ICCR0 = ICCR0_ITR | ICCR0_RXE;
374
375 if (i < 0)
376 printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
377 }
378 netif_wake_queue(dev);
379 }
380
381 /* EIF(Error in FIFO/End in Frame) handler for FIR */
382 static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0)
383 {
384 unsigned int len, stat, data;
385
386 /* Get the current data position. */
387 len = DTADR(si->rxdma) - si->dma_rx_buff_phy;
388
389 do {
390 /* Read Status, and then Data. */
391 stat = ICSR1;
392 rmb();
393 data = ICDR;
394
395 if (stat & (ICSR1_CRE | ICSR1_ROR)) {
396 si->stats.rx_errors++;
397 if (stat & ICSR1_CRE) {
398 printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n");
399 si->stats.rx_crc_errors++;
400 }
401 if (stat & ICSR1_ROR) {
402 printk(KERN_DEBUG "pxa_ir: fir receive overrun\n");
403 si->stats.rx_over_errors++;
404 }
405 } else {
406 si->dma_rx_buff[len++] = data;
407 }
408 /* If we hit the end of frame, there's no point in continuing. */
409 if (stat & ICSR1_EOF)
410 break;
411 } while (ICSR0 & ICSR0_EIF);
412
413 if (stat & ICSR1_EOF) {
414 /* end of frame. */
415 struct sk_buff *skb;
416
417 if (icsr0 & ICSR0_FRE) {
418 printk(KERN_ERR "pxa_ir: dropping erroneous frame\n");
419 si->stats.rx_dropped++;
420 return;
421 }
422
423 skb = alloc_skb(len+1,GFP_ATOMIC);
424 if (!skb) {
425 printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n");
426 si->stats.rx_dropped++;
427 return;
428 }
429
430 /* Align IP header to 20 bytes */
431 skb_reserve(skb, 1);
432 skb_copy_to_linear_data(skb, si->dma_rx_buff, len);
433 skb_put(skb, len);
434
435 /* Feed it to IrLAP */
436 skb->dev = dev;
437 skb_reset_mac_header(skb);
438 skb->protocol = htons(ETH_P_IRDA);
439 netif_rx(skb);
440
441 si->stats.rx_packets++;
442 si->stats.rx_bytes += len;
443
444 dev->last_rx = jiffies;
445 }
446 }
447
448 /* FIR interrupt handler */
449 static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id)
450 {
451 struct net_device *dev = dev_id;
452 struct pxa_irda *si = netdev_priv(dev);
453 int icsr0, i = 64;
454
455 /* stop RX DMA */
456 DCSR(si->rxdma) &= ~DCSR_RUN;
457 si->last_oscr = OSCR;
458 icsr0 = ICSR0;
459
460 if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) {
461 if (icsr0 & ICSR0_FRE) {
462 printk(KERN_DEBUG "pxa_ir: fir receive frame error\n");
463 si->stats.rx_frame_errors++;
464 } else {
465 printk(KERN_DEBUG "pxa_ir: fir receive abort\n");
466 si->stats.rx_errors++;
467 }
468 ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB);
469 }
470
471 if (icsr0 & ICSR0_EIF) {
472 /* An error in FIFO occured, or there is a end of frame */
473 pxa_irda_fir_irq_eif(si, dev, icsr0);
474 }
475
476 ICCR0 = 0;
477 pxa_irda_fir_dma_rx_start(si);
478 while ((ICSR1 & ICSR1_RNE) && i--)
479 (void)ICDR;
480 ICCR0 = ICCR0_ITR | ICCR0_RXE;
481
482 if (i < 0)
483 printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
484
485 return IRQ_HANDLED;
486 }
487
488 /* hard_xmit interface of irda device */
489 static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
490 {
491 struct pxa_irda *si = netdev_priv(dev);
492 int speed = irda_get_next_speed(skb);
493
494 /*
495 * Does this packet contain a request to change the interface
496 * speed? If so, remember it until we complete the transmission
497 * of this frame.
498 */
499 if (speed != si->speed && speed != -1)
500 si->newspeed = speed;
501
502 /*
503 * If this is an empty frame, we can bypass a lot.
504 */
505 if (skb->len == 0) {
506 if (si->newspeed) {
507 si->newspeed = 0;
508 pxa_irda_set_speed(si, speed);
509 }
510 dev_kfree_skb(skb);
511 return 0;
512 }
513
514 netif_stop_queue(dev);
515
516 if (!IS_FIR(si)) {
517 si->tx_buff.data = si->tx_buff.head;
518 si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize);
519
520 /* Disable STUART interrupts and switch to transmit mode. */
521 STIER = 0;
522 STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6;
523
524 /* enable STUART and transmit interrupts */
525 STIER = IER_UUE | IER_TIE;
526 } else {
527 unsigned long mtt = irda_get_mtt(skb);
528
529 si->dma_tx_buff_len = skb->len;
530 skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len);
531
532 if (mtt)
533 while ((unsigned)(OSCR - si->last_oscr)/4 < mtt)
534 cpu_relax();
535
536 /* stop RX DMA, disable FICP */
537 DCSR(si->rxdma) &= ~DCSR_RUN;
538 ICCR0 = 0;
539
540 pxa_irda_fir_dma_tx_start(si);
541 ICCR0 = ICCR0_ITR | ICCR0_TXE;
542 }
543
544 dev_kfree_skb(skb);
545 dev->trans_start = jiffies;
546 return 0;
547 }
548
549 static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
550 {
551 struct if_irda_req *rq = (struct if_irda_req *)ifreq;
552 struct pxa_irda *si = netdev_priv(dev);
553 int ret;
554
555 switch (cmd) {
556 case SIOCSBANDWIDTH:
557 ret = -EPERM;
558 if (capable(CAP_NET_ADMIN)) {
559 /*
560 * We are unable to set the speed if the
561 * device is not running.
562 */
563 if (netif_running(dev)) {
564 ret = pxa_irda_set_speed(si,
565 rq->ifr_baudrate);
566 } else {
567 printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n");
568 ret = 0;
569 }
570 }
571 break;
572
573 case SIOCSMEDIABUSY:
574 ret = -EPERM;
575 if (capable(CAP_NET_ADMIN)) {
576 irda_device_set_media_busy(dev, TRUE);
577 ret = 0;
578 }
579 break;
580
581 case SIOCGRECEIVING:
582 ret = 0;
583 rq->ifr_receiving = IS_FIR(si) ? 0
584 : si->rx_buff.state != OUTSIDE_FRAME;
585 break;
586
587 default:
588 ret = -EOPNOTSUPP;
589 break;
590 }
591
592 return ret;
593 }
594
595 static struct net_device_stats *pxa_irda_stats(struct net_device *dev)
596 {
597 struct pxa_irda *si = netdev_priv(dev);
598 return &si->stats;
599 }
600
601 static void pxa_irda_startup(struct pxa_irda *si)
602 {
603 /* Disable STUART interrupts */
604 STIER = 0;
605 /* enable STUART interrupt to the processor */
606 STMCR = MCR_OUT2;
607 /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */
608 STLCR = LCR_WLS0 | LCR_WLS1;
609 /* enable FIFO, we use FIFO to improve performance */
610 STFCR = FCR_TRFIFOE | FCR_ITL_32;
611
612 /* disable FICP */
613 ICCR0 = 0;
614 /* configure FICP ICCR2 */
615 ICCR2 = ICCR2_TXP | ICCR2_TRIG_32;
616
617 /* configure DMAC */
618 DRCMR(17) = si->rxdma | DRCMR_MAPVLD;
619 DRCMR(18) = si->txdma | DRCMR_MAPVLD;
620
621 /* force SIR reinitialization */
622 si->speed = 4000000;
623 pxa_irda_set_speed(si, 9600);
624
625 printk(KERN_DEBUG "pxa_ir: irda startup\n");
626 }
627
628 static void pxa_irda_shutdown(struct pxa_irda *si)
629 {
630 unsigned long flags;
631
632 local_irq_save(flags);
633
634 /* disable STUART and interrupt */
635 STIER = 0;
636 /* disable STUART SIR mode */
637 STISR = 0;
638
639 /* disable DMA */
640 DCSR(si->txdma) &= ~DCSR_RUN;
641 DCSR(si->rxdma) &= ~DCSR_RUN;
642 /* disable FICP */
643 ICCR0 = 0;
644
645 /* disable the STUART or FICP clocks */
646 pxa_irda_disable_clk(si);
647
648 DRCMR(17) = 0;
649 DRCMR(18) = 0;
650
651 local_irq_restore(flags);
652
653 /* power off board transceiver */
654 si->pdata->transceiver_mode(si->dev, IR_OFF);
655
656 printk(KERN_DEBUG "pxa_ir: irda shutdown\n");
657 }
658
659 static int pxa_irda_start(struct net_device *dev)
660 {
661 struct pxa_irda *si = netdev_priv(dev);
662 int err;
663
664 si->speed = 9600;
665
666 err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev);
667 if (err)
668 goto err_irq1;
669
670 err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev);
671 if (err)
672 goto err_irq2;
673
674 /*
675 * The interrupt must remain disabled for now.
676 */
677 disable_irq(IRQ_STUART);
678 disable_irq(IRQ_ICP);
679
680 err = -EBUSY;
681 si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev);
682 if (si->rxdma < 0)
683 goto err_rx_dma;
684
685 si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev);
686 if (si->txdma < 0)
687 goto err_tx_dma;
688
689 err = -ENOMEM;
690 si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
691 &si->dma_rx_buff_phy, GFP_KERNEL );
692 if (!si->dma_rx_buff)
693 goto err_dma_rx_buff;
694
695 si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
696 &si->dma_tx_buff_phy, GFP_KERNEL );
697 if (!si->dma_tx_buff)
698 goto err_dma_tx_buff;
699
700 /* Setup the serial port for the initial speed. */
701 pxa_irda_startup(si);
702
703 /*
704 * Open a new IrLAP layer instance.
705 */
706 si->irlap = irlap_open(dev, &si->qos, "pxa");
707 err = -ENOMEM;
708 if (!si->irlap)
709 goto err_irlap;
710
711 /*
712 * Now enable the interrupt and start the queue
713 */
714 enable_irq(IRQ_STUART);
715 enable_irq(IRQ_ICP);
716 netif_start_queue(dev);
717
718 printk(KERN_DEBUG "pxa_ir: irda driver opened\n");
719
720 return 0;
721
722 err_irlap:
723 pxa_irda_shutdown(si);
724 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
725 err_dma_tx_buff:
726 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
727 err_dma_rx_buff:
728 pxa_free_dma(si->txdma);
729 err_tx_dma:
730 pxa_free_dma(si->rxdma);
731 err_rx_dma:
732 free_irq(IRQ_ICP, dev);
733 err_irq2:
734 free_irq(IRQ_STUART, dev);
735 err_irq1:
736
737 return err;
738 }
739
740 static int pxa_irda_stop(struct net_device *dev)
741 {
742 struct pxa_irda *si = netdev_priv(dev);
743
744 netif_stop_queue(dev);
745
746 pxa_irda_shutdown(si);
747
748 /* Stop IrLAP */
749 if (si->irlap) {
750 irlap_close(si->irlap);
751 si->irlap = NULL;
752 }
753
754 free_irq(IRQ_STUART, dev);
755 free_irq(IRQ_ICP, dev);
756
757 pxa_free_dma(si->rxdma);
758 pxa_free_dma(si->txdma);
759
760 if (si->dma_rx_buff)
761 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
762 if (si->dma_tx_buff)
763 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
764
765 printk(KERN_DEBUG "pxa_ir: irda driver closed\n");
766 return 0;
767 }
768
769 static int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state)
770 {
771 struct net_device *dev = platform_get_drvdata(_dev);
772 struct pxa_irda *si;
773
774 if (dev && netif_running(dev)) {
775 si = netdev_priv(dev);
776 netif_device_detach(dev);
777 pxa_irda_shutdown(si);
778 }
779
780 return 0;
781 }
782
783 static int pxa_irda_resume(struct platform_device *_dev)
784 {
785 struct net_device *dev = platform_get_drvdata(_dev);
786 struct pxa_irda *si;
787
788 if (dev && netif_running(dev)) {
789 si = netdev_priv(dev);
790 pxa_irda_startup(si);
791 netif_device_attach(dev);
792 netif_wake_queue(dev);
793 }
794
795 return 0;
796 }
797
798
799 static int pxa_irda_init_iobuf(iobuff_t *io, int size)
800 {
801 io->head = kmalloc(size, GFP_KERNEL | GFP_DMA);
802 if (io->head != NULL) {
803 io->truesize = size;
804 io->in_frame = FALSE;
805 io->state = OUTSIDE_FRAME;
806 io->data = io->head;
807 }
808 return io->head ? 0 : -ENOMEM;
809 }
810
811 static int pxa_irda_probe(struct platform_device *pdev)
812 {
813 struct net_device *dev;
814 struct pxa_irda *si;
815 unsigned int baudrate_mask;
816 int err;
817
818 if (!pdev->dev.platform_data)
819 return -ENODEV;
820
821 err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY;
822 if (err)
823 goto err_mem_1;
824
825 err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY;
826 if (err)
827 goto err_mem_2;
828
829 dev = alloc_irdadev(sizeof(struct pxa_irda));
830 if (!dev)
831 goto err_mem_3;
832
833 si = netdev_priv(dev);
834 si->dev = &pdev->dev;
835 si->pdata = pdev->dev.platform_data;
836
837 si->sir_clk = clk_get(&pdev->dev, "UARTCLK");
838 si->fir_clk = clk_get(&pdev->dev, "FICPCLK");
839 if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) {
840 err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk);
841 goto err_mem_4;
842 }
843
844 /*
845 * Initialise the SIR buffers
846 */
847 err = pxa_irda_init_iobuf(&si->rx_buff, 14384);
848 if (err)
849 goto err_mem_4;
850 err = pxa_irda_init_iobuf(&si->tx_buff, 4000);
851 if (err)
852 goto err_mem_5;
853
854 if (si->pdata->startup)
855 err = si->pdata->startup(si->dev);
856 if (err)
857 goto err_startup;
858
859 dev->hard_start_xmit = pxa_irda_hard_xmit;
860 dev->open = pxa_irda_start;
861 dev->stop = pxa_irda_stop;
862 dev->do_ioctl = pxa_irda_ioctl;
863 dev->get_stats = pxa_irda_stats;
864
865 irda_init_max_qos_capabilies(&si->qos);
866
867 baudrate_mask = 0;
868 if (si->pdata->transceiver_cap & IR_SIRMODE)
869 baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200;
870 if (si->pdata->transceiver_cap & IR_FIRMODE)
871 baudrate_mask |= IR_4000000 << 8;
872
873 si->qos.baud_rate.bits &= baudrate_mask;
874 si->qos.min_turn_time.bits = 7; /* 1ms or more */
875
876 irda_qos_bits_to_value(&si->qos);
877
878 err = register_netdev(dev);
879
880 if (err == 0)
881 dev_set_drvdata(&pdev->dev, dev);
882
883 if (err) {
884 if (si->pdata->shutdown)
885 si->pdata->shutdown(si->dev);
886 err_startup:
887 kfree(si->tx_buff.head);
888 err_mem_5:
889 kfree(si->rx_buff.head);
890 err_mem_4:
891 if (si->sir_clk && !IS_ERR(si->sir_clk))
892 clk_put(si->sir_clk);
893 if (si->fir_clk && !IS_ERR(si->fir_clk))
894 clk_put(si->fir_clk);
895 free_netdev(dev);
896 err_mem_3:
897 release_mem_region(__PREG(FICP), 0x1c);
898 err_mem_2:
899 release_mem_region(__PREG(STUART), 0x24);
900 }
901 err_mem_1:
902 return err;
903 }
904
905 static int pxa_irda_remove(struct platform_device *_dev)
906 {
907 struct net_device *dev = platform_get_drvdata(_dev);
908
909 if (dev) {
910 struct pxa_irda *si = netdev_priv(dev);
911 unregister_netdev(dev);
912 if (si->pdata->shutdown)
913 si->pdata->shutdown(si->dev);
914 kfree(si->tx_buff.head);
915 kfree(si->rx_buff.head);
916 clk_put(si->fir_clk);
917 clk_put(si->sir_clk);
918 free_netdev(dev);
919 }
920
921 release_mem_region(__PREG(STUART), 0x24);
922 release_mem_region(__PREG(FICP), 0x1c);
923
924 return 0;
925 }
926
927 static struct platform_driver pxa_ir_driver = {
928 .driver = {
929 .name = "pxa2xx-ir",
930 .owner = THIS_MODULE,
931 },
932 .probe = pxa_irda_probe,
933 .remove = pxa_irda_remove,
934 .suspend = pxa_irda_suspend,
935 .resume = pxa_irda_resume,
936 };
937
938 static int __init pxa_irda_init(void)
939 {
940 return platform_driver_register(&pxa_ir_driver);
941 }
942
943 static void __exit pxa_irda_exit(void)
944 {
945 platform_driver_unregister(&pxa_ir_driver);
946 }
947
948 module_init(pxa_irda_init);
949 module_exit(pxa_irda_exit);
950
951 MODULE_LICENSE("GPL");
952 MODULE_ALIAS("platform:pxa2xx-ir");
Support for the Chinese Samsung S3C2440 based development boards