arch/sh/kernel/cpu/clock.c

   1 /*
   2  * arch/sh/kernel/cpu/clock.c - SuperH clock framework
   3  *
   4  *  Copyright (C) 2005, 2006, 2007  Paul Mundt
   5  *
   6  * This clock framework is derived from the OMAP version by:
   7  *
   8  *      Copyright (C) 2004 - 2005 Nokia Corporation
   9  *      Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
  10  *
  11  *  Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
  12  *
  13  * This file is subject to the terms and conditions of the GNU General Public
  14  * License.  See the file "COPYING" in the main directory of this archive
  15  * for more details.
  16  */
  17 #include <linux/kernel.h>
  18 #include <linux/init.h>
  19 #include <linux/module.h>
  20 #include <linux/mutex.h>
  21 #include <linux/list.h>
  22 #include <linux/kref.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/err.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/proc_fs.h>
  27 #include <asm/clock.h>
  28 #include <asm/timer.h>
  29
  30 static LIST_HEAD(clock_list);
  31 static DEFINE_SPINLOCK(clock_lock);
  32 static DEFINE_MUTEX(clock_list_sem);
  33
  34 /*
  35  * Each subtype is expected to define the init routines for these clocks,
  36  * as each subtype (or processor family) will have these clocks at the
  37  * very least. These are all provided through the CPG, which even some of
  38  * the more quirky parts (such as ST40, SH4-202, etc.) still have.
  39  *
  40  * The processor-specific code is expected to register any additional
  41  * clock sources that are of interest.
  42  */
  43 static struct clk master_clk = {
  44         .name           = "master_clk",
  45         .flags          = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
  46         .rate           = CONFIG_SH_PCLK_FREQ,
  47 };
  48
  49 static struct clk module_clk = {
  50         .name           = "module_clk",
  51         .parent         = &master_clk,
  52         .flags          = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
  53 };
  54
  55 static struct clk bus_clk = {
  56         .name           = "bus_clk",
  57         .parent         = &master_clk,
  58         .flags          = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
  59 };
  60
  61 static struct clk cpu_clk = {
  62         .name           = "cpu_clk",
  63         .parent         = &master_clk,
  64         .flags          = CLK_ALWAYS_ENABLED,
  65 };
  66
  67 /*
  68  * The ordering of these clocks matters, do not change it.
  69  */
  70 static struct clk *onchip_clocks[] = {
  71         &master_clk,
  72         &module_clk,
  73         &bus_clk,
  74         &cpu_clk,
  75 };
  76
  77 static void propagate_rate(struct clk *clk)
  78 {
  79         struct clk *clkp;
  80
  81         list_for_each_entry(clkp, &clock_list, node) {
  82                 if (likely(clkp->parent != clk))
  83                         continue;
  84                 if (likely(clkp->ops && clkp->ops->recalc))
  85                         clkp->ops->recalc(clkp);
  86                 if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
  87                         propagate_rate(clkp);
  88         }
  89 }
  90
  91 static int __clk_enable(struct clk *clk)
  92 {
  93         /*
  94          * See if this is the first time we're enabling the clock, some
  95          * clocks that are always enabled still require "special"
  96          * initialization. This is especially true if the clock mode
  97          * changes and the clock needs to hunt for the proper set of
  98          * divisors to use before it can effectively recalc.
  99          */
 100         if (unlikely(atomic_read(&clk->kref.refcount) == 1))
 101                 if (clk->ops && clk->ops->init)
 102                         clk->ops->init(clk);
 103
 104         kref_get(&clk->kref);
 105
 106         if (clk->flags & CLK_ALWAYS_ENABLED)
 107                 return 0;
 108
 109         if (likely(clk->ops && clk->ops->enable))
 110                 clk->ops->enable(clk);
 111
 112         return 0;
 113 }
 114
 115 int clk_enable(struct clk *clk)
 116 {
 117         unsigned long flags;
 118         int ret;
 119
 120         if (!clk)
 121                 return -EINVAL;
 122
 123         clk_enable(clk->parent);
 124
 125         spin_lock_irqsave(&clock_lock, flags);
 126         ret = __clk_enable(clk);
 127         spin_unlock_irqrestore(&clock_lock, flags);
 128
 129         return ret;
 130 }
 131 EXPORT_SYMBOL_GPL(clk_enable);
 132
 133 static void clk_kref_release(struct kref *kref)
 134 {
 135         /* Nothing to do */
 136 }
 137
 138 static void __clk_disable(struct clk *clk)
 139 {
 140         int count = kref_put(&clk->kref, clk_kref_release);
 141
 142         if (clk->flags & CLK_ALWAYS_ENABLED)
 143                 return;
 144
 145         if (!count) {   /* count reaches zero, disable the clock */
 146                 if (likely(clk->ops && clk->ops->disable))
 147                         clk->ops->disable(clk);
 148         }
 149 }
 150
 151 void clk_disable(struct clk *clk)
 152 {
 153         unsigned long flags;
 154
 155         if (!clk)
 156                 return;
 157
 158         spin_lock_irqsave(&clock_lock, flags);
 159         __clk_disable(clk);
 160         spin_unlock_irqrestore(&clock_lock, flags);
 161
 162         clk_disable(clk->parent);
 163 }
 164 EXPORT_SYMBOL_GPL(clk_disable);
 165
 166 int clk_register(struct clk *clk)
 167 {
 168         mutex_lock(&clock_list_sem);
 169
 170         list_add(&clk->node, &clock_list);
 171         kref_init(&clk->kref);
 172
 173         mutex_unlock(&clock_list_sem);
 174
 175         if (clk->flags & CLK_ALWAYS_ENABLED) {
 176                 pr_debug( "Clock '%s' is ALWAYS_ENABLED\n", clk->name);
 177                 if (clk->ops && clk->ops->init)
 178                         clk->ops->init(clk);
 179                 if (clk->ops && clk->ops->enable)
 180                         clk->ops->enable(clk);
 181                 pr_debug( "Enabled.");
 182         }
 183
 184         return 0;
 185 }
 186 EXPORT_SYMBOL_GPL(clk_register);
 187
 188 void clk_unregister(struct clk *clk)
 189 {
 190         mutex_lock(&clock_list_sem);
 191         list_del(&clk->node);
 192         mutex_unlock(&clock_list_sem);
 193 }
 194 EXPORT_SYMBOL_GPL(clk_unregister);
 195
 196 unsigned long clk_get_rate(struct clk *clk)
 197 {
 198         return clk->rate;
 199 }
 200 EXPORT_SYMBOL_GPL(clk_get_rate);
 201
 202 int clk_set_rate(struct clk *clk, unsigned long rate)
 203 {
 204         return clk_set_rate_ex(clk, rate, 0);
 205 }
 206 EXPORT_SYMBOL_GPL(clk_set_rate);
 207
 208 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
 209 {
 210         int ret = -EOPNOTSUPP;
 211
 212         if (likely(clk->ops && clk->ops->set_rate)) {
 213                 unsigned long flags;
 214
 215                 spin_lock_irqsave(&clock_lock, flags);
 216                 ret = clk->ops->set_rate(clk, rate, algo_id);
 217                 spin_unlock_irqrestore(&clock_lock, flags);
 218         }
 219
 220         if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
 221                 propagate_rate(clk);
 222
 223         return ret;
 224 }
 225 EXPORT_SYMBOL_GPL(clk_set_rate_ex);
 226
 227 void clk_recalc_rate(struct clk *clk)
 228 {
 229         if (likely(clk->ops && clk->ops->recalc)) {
 230                 unsigned long flags;
 231
 232                 spin_lock_irqsave(&clock_lock, flags);
 233                 clk->ops->recalc(clk);
 234                 spin_unlock_irqrestore(&clock_lock, flags);
 235         }
 236
 237         if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
 238                 propagate_rate(clk);
 239 }
 240 EXPORT_SYMBOL_GPL(clk_recalc_rate);
 241
 242 long clk_round_rate(struct clk *clk, unsigned long rate)
 243 {
 244         if (likely(clk->ops && clk->ops->round_rate)) {
 245                 unsigned long flags, rounded;
 246
 247                 spin_lock_irqsave(&clock_lock, flags);
 248                 rounded = clk->ops->round_rate(clk, rate);
 249                 spin_unlock_irqrestore(&clock_lock, flags);
 250
 251                 return rounded;
 252         }
 253
 254         return clk_get_rate(clk);
 255 }
 256 EXPORT_SYMBOL_GPL(clk_round_rate);
 257
 258 /*
 259  * Returns a clock. Note that we first try to use device id on the bus
 260  * and clock name. If this fails, we try to use clock name only.
 261  */
 262 struct clk *clk_get(struct device *dev, const char *id)
 263 {
 264         struct clk *p, *clk = ERR_PTR(-ENOENT);
 265         int idno;
 266
 267         if (dev == NULL || dev->bus != &platform_bus_type)
 268                 idno = -1;
 269         else
 270                 idno = to_platform_device(dev)->id;
 271
 272         mutex_lock(&clock_list_sem);
 273         list_for_each_entry(p, &clock_list, node) {
 274                 if (p->id == idno &&
 275                     strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
 276                         clk = p;
 277                         goto found;
 278                 }
 279         }
 280
 281         list_for_each_entry(p, &clock_list, node) {
 282                 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
 283                         clk = p;
 284                         break;
 285                 }
 286         }
 287
 288 found:
 289         mutex_unlock(&clock_list_sem);
 290
 291         return clk;
 292 }
 293 EXPORT_SYMBOL_GPL(clk_get);
 294
 295 void clk_put(struct clk *clk)
 296 {
 297         if (clk && !IS_ERR(clk))
 298                 module_put(clk->owner);
 299 }
 300 EXPORT_SYMBOL_GPL(clk_put);
 301
 302 void __init __attribute__ ((weak))
 303 arch_init_clk_ops(struct clk_ops **ops, int type)
 304 {
 305 }
 306
 307 int __init __attribute__ ((weak))
 308 arch_clk_init(void)
 309 {
 310         return 0;
 311 }
 312
 313 static int show_clocks(char *buf, char **start, off_t off,
 314                        int len, int *eof, void *data)
 315 {
 316         struct clk *clk;
 317         char *p = buf;
 318
 319         list_for_each_entry_reverse(clk, &clock_list, node) {
 320                 unsigned long rate = clk_get_rate(clk);
 321
 322                 p += sprintf(p, "%-12s\t: %ld.%02ldMHz\t%s\n", clk->name,
 323                              rate / 1000000, (rate % 1000000) / 10000,
 324                              ((clk->flags & CLK_ALWAYS_ENABLED) ||
 325                               (atomic_read(&clk->kref.refcount) != 1)) ?
 326                              "enabled" : "disabled");
 327         }
 328
 329         return p - buf;
 330 }
 331
 332 int __init clk_init(void)
 333 {
 334         int i, ret = 0;
 335
 336         BUG_ON(!master_clk.rate);
 337
 338         for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
 339                 struct clk *clk = onchip_clocks[i];
 340
 341                 arch_init_clk_ops(&clk->ops, i);
 342                 ret |= clk_register(clk);
 343         }
 344
 345         ret |= arch_clk_init();
 346
 347         /* Kick the child clocks.. */
 348         propagate_rate(&master_clk);
 349         propagate_rate(&bus_clk);
 350
 351         return ret;
 352 }
 353
 354 static int __init clk_proc_init(void)
 355 {
 356         struct proc_dir_entry *p;
 357         p = create_proc_read_entry("clocks", S_IRUSR, NULL,
 358                                    show_clocks, NULL);
 359         if (unlikely(!p))
 360                 return -EINVAL;
 361
 362         return 0;
 363 }
 364 subsys_initcall(clk_proc_init);