Redo R4600 workaround based on new information from PMC-Sierra. This
commitd9a6d25e750de3518a7b5b1ca92925121d8b6efe
authorRalf Baechle <ralf@linux-mips.org>
Sat, 26 Apr 2003 03:18:21 +0000 (26 03:18 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 26 Apr 2003 03:18:21 +0000 (26 03:18 +0000)
treecce3c2325b57eedeeb38cae7483840c6cb18f418
parent8c7d4edc6a7781eb31bd267f5923ef0ab0564e81
Redo R4600 workaround based on new information from PMC-Sierra.  This
improves interrupt latency significantly and fixes another problem with
the old workaround so should be considered a critical upgrade for R4600
systems.

Apply CPU workarounds only to those machines which were actually shipped
with the affected processors.  As for the R4600 the assumption is only
IP22 was shipped with V1.7 and V2.0 processors and SNI RM200C only with
V2.0 processors; for all other systems the workarounds are disabled.

Control workarounds based on value of the preprocessor symbol, not
based on it's definedness.

Move R5432 workaround to the (hopefully ...) right place and copy it
to those places where it was missing.
arch/mips/kernel/entry.S
arch/mips/mm/c-r4k.c
arch/mips/mm/tlbex-r4k.S
arch/mips64/kernel/r4k_genex.S
arch/mips64/mm/c-r4k.c
arch/mips64/mm/tlb-glue-sb1.S
arch/mips64/mm/tlbex-r4k.S
drivers/char/sb1250_duart.c
include/asm-mips/war.h
include/asm-mips64/war.h