drivers/infiniband/hw/mthca/mthca_dev.h

   1 /*
   2  * Copyright (c) 2004, 2005 Topspin Communications.  All rights reserved.
   3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  *
  33  * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
  34  */
  35
  36 #ifndef MTHCA_DEV_H
  37 #define MTHCA_DEV_H
  38
  39 #include <linux/spinlock.h>
  40 #include <linux/kernel.h>
  41 #include <linux/pci.h>
  42 #include <linux/dma-mapping.h>
  43 #include <asm/semaphore.h>
  44
  45 #include "mthca_provider.h"
  46 #include "mthca_doorbell.h"
  47
  48 #define DRV_NAME        "ib_mthca"
  49 #define PFX             DRV_NAME ": "
  50 #define DRV_VERSION     "0.06-pre"
  51 #define DRV_RELDATE     "November 8, 2004"
  52
  53 enum {
  54         MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
  55         MTHCA_FLAG_SRQ        = 1 << 2,
  56         MTHCA_FLAG_MSI        = 1 << 3,
  57         MTHCA_FLAG_MSI_X      = 1 << 4,
  58         MTHCA_FLAG_NO_LAM     = 1 << 5,
  59         MTHCA_FLAG_FMR        = 1 << 6,
  60         MTHCA_FLAG_MEMFREE    = 1 << 7,
  61         MTHCA_FLAG_PCIE       = 1 << 8
  62 };
  63
  64 enum {
  65         MTHCA_MAX_PORTS = 2
  66 };
  67
  68 enum {
  69         MTHCA_EQ_CONTEXT_SIZE =  0x40,
  70         MTHCA_CQ_CONTEXT_SIZE =  0x40,
  71         MTHCA_QP_CONTEXT_SIZE = 0x200,
  72         MTHCA_RDB_ENTRY_SIZE  =  0x20,
  73         MTHCA_AV_SIZE         =  0x20,
  74         MTHCA_MGM_ENTRY_SIZE  =  0x40,
  75
  76         /* Arbel FW gives us these, but we need them for Tavor */
  77         MTHCA_MPT_ENTRY_SIZE  =  0x40,
  78         MTHCA_MTT_SEG_SIZE    =  0x40,
  79 };
  80
  81 enum {
  82         MTHCA_EQ_CMD,
  83         MTHCA_EQ_ASYNC,
  84         MTHCA_EQ_COMP,
  85         MTHCA_NUM_EQ
  86 };
  87
  88 enum {
  89         MTHCA_OPCODE_NOP            = 0x00,
  90         MTHCA_OPCODE_RDMA_WRITE     = 0x08,
  91         MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
  92         MTHCA_OPCODE_SEND           = 0x0a,
  93         MTHCA_OPCODE_SEND_IMM       = 0x0b,
  94         MTHCA_OPCODE_RDMA_READ      = 0x10,
  95         MTHCA_OPCODE_ATOMIC_CS      = 0x11,
  96         MTHCA_OPCODE_ATOMIC_FA      = 0x12,
  97         MTHCA_OPCODE_BIND_MW        = 0x18,
  98         MTHCA_OPCODE_INVALID        = 0xff
  99 };
 100
 101 struct mthca_cmd {
 102         struct pci_pool          *pool;
 103         int                       use_events;
 104         struct semaphore          hcr_sem;
 105         struct semaphore          poll_sem;
 106         struct semaphore          event_sem;
 107         int                       max_cmds;
 108         spinlock_t                context_lock;
 109         int                       free_head;
 110         struct mthca_cmd_context *context;
 111         u16                       token_mask;
 112 };
 113
 114 struct mthca_limits {
 115         int      num_ports;
 116         int      vl_cap;
 117         int      mtu_cap;
 118         int      gid_table_len;
 119         int      pkey_table_len;
 120         int      local_ca_ack_delay;
 121         int      num_uars;
 122         int      max_sg;
 123         int      num_qps;
 124         int      reserved_qps;
 125         int      num_srqs;
 126         int      reserved_srqs;
 127         int      num_eecs;
 128         int      reserved_eecs;
 129         int      num_cqs;
 130         int      reserved_cqs;
 131         int      num_eqs;
 132         int      reserved_eqs;
 133         int      num_mpts;
 134         int      num_mtt_segs;
 135         int      fmr_reserved_mtts;
 136         int      reserved_mtts;
 137         int      reserved_mrws;
 138         int      reserved_uars;
 139         int      num_mgms;
 140         int      num_amgms;
 141         int      reserved_mcgs;
 142         int      num_pds;
 143         int      reserved_pds;
 144 };
 145
 146 struct mthca_alloc {
 147         u32            last;
 148         u32            top;
 149         u32            max;
 150         u32            mask;
 151         spinlock_t     lock;
 152         unsigned long *table;
 153 };
 154
 155 struct mthca_array {
 156         struct {
 157                 void    **page;
 158                 int       used;
 159         } *page_list;
 160 };
 161
 162 struct mthca_uar_table {
 163         struct mthca_alloc alloc;
 164         u64                uarc_base;
 165         int                uarc_size;
 166 };
 167
 168 struct mthca_pd_table {
 169         struct mthca_alloc alloc;
 170 };
 171
 172 struct mthca_buddy {
 173         unsigned long **bits;
 174         int             max_order;
 175         spinlock_t      lock;
 176 };
 177
 178 struct mthca_mr_table {
 179         struct mthca_alloc      mpt_alloc;
 180         struct mthca_buddy      mtt_buddy;
 181         struct mthca_buddy     *fmr_mtt_buddy;
 182         u64                     mtt_base;
 183         u64                     mpt_base;
 184         struct mthca_icm_table *mtt_table;
 185         struct mthca_icm_table *mpt_table;
 186         struct {
 187                 void __iomem   *mpt_base;
 188                 void __iomem   *mtt_base;
 189                 struct mthca_buddy mtt_buddy;
 190         } tavor_fmr;
 191 };
 192
 193 struct mthca_eq_table {
 194         struct mthca_alloc alloc;
 195         void __iomem      *clr_int;
 196         u32                clr_mask;
 197         u32                arm_mask;
 198         struct mthca_eq    eq[MTHCA_NUM_EQ];
 199         u64                icm_virt;
 200         struct page       *icm_page;
 201         dma_addr_t         icm_dma;
 202         int                have_irq;
 203         u8                 inta_pin;
 204 };
 205
 206 struct mthca_cq_table {
 207         struct mthca_alloc      alloc;
 208         spinlock_t              lock;
 209         struct mthca_array      cq;
 210         struct mthca_icm_table *table;
 211 };
 212
 213 struct mthca_qp_table {
 214         struct mthca_alloc      alloc;
 215         u32                     rdb_base;
 216         int                     rdb_shift;
 217         int                     sqp_start;
 218         spinlock_t              lock;
 219         struct mthca_array      qp;
 220         struct mthca_icm_table *qp_table;
 221         struct mthca_icm_table *eqp_table;
 222         struct mthca_icm_table *rdb_table;
 223 };
 224
 225 struct mthca_av_table {
 226         struct pci_pool   *pool;
 227         int                num_ddr_avs;
 228         u64                ddr_av_base;
 229         void __iomem      *av_map;
 230         struct mthca_alloc alloc;
 231 };
 232
 233 struct mthca_mcg_table {
 234         struct semaphore        sem;
 235         struct mthca_alloc      alloc;
 236         struct mthca_icm_table *table;
 237 };
 238
 239 struct mthca_dev {
 240         struct ib_device  ib_dev;
 241         struct pci_dev   *pdev;
 242
 243         int              hca_type;
 244         unsigned long    mthca_flags;
 245         unsigned long    device_cap_flags;
 246
 247         u32              rev_id;
 248
 249         /* firmware info */
 250         u64              fw_ver;
 251         union {
 252                 struct {
 253                         u64 fw_start;
 254                         u64 fw_end;
 255                 }        tavor;
 256                 struct {
 257                         u64 clr_int_base;
 258                         u64 eq_arm_base;
 259                         u64 eq_set_ci_base;
 260                         struct mthca_icm *fw_icm;
 261                         struct mthca_icm *aux_icm;
 262                         u16 fw_pages;
 263                 }        arbel;
 264         }                fw;
 265
 266         u64              ddr_start;
 267         u64              ddr_end;
 268
 269         MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
 270         struct semaphore cap_mask_mutex;
 271
 272         void __iomem    *hcr;
 273         void __iomem    *kar;
 274         void __iomem    *clr_base;
 275         union {
 276                 struct {
 277                         void __iomem *ecr_base;
 278                 } tavor;
 279                 struct {
 280                         void __iomem *eq_arm;
 281                         void __iomem *eq_set_ci_base;
 282                 } arbel;
 283         } eq_regs;
 284
 285         struct mthca_cmd    cmd;
 286         struct mthca_limits limits;
 287
 288         struct mthca_uar_table uar_table;
 289         struct mthca_pd_table  pd_table;
 290         struct mthca_mr_table  mr_table;
 291         struct mthca_eq_table  eq_table;
 292         struct mthca_cq_table  cq_table;
 293         struct mthca_qp_table  qp_table;
 294         struct mthca_av_table  av_table;
 295         struct mthca_mcg_table mcg_table;
 296
 297         struct mthca_uar       driver_uar;
 298         struct mthca_db_table *db_tab;
 299         struct mthca_pd        driver_pd;
 300         struct mthca_mr        driver_mr;
 301
 302         struct ib_mad_agent  *send_agent[MTHCA_MAX_PORTS][2];
 303         struct ib_ah         *sm_ah[MTHCA_MAX_PORTS];
 304         spinlock_t            sm_lock;
 305 };
 306
 307 #define mthca_dbg(mdev, format, arg...) \
 308         dev_dbg(&mdev->pdev->dev, format, ## arg)
 309 #define mthca_err(mdev, format, arg...) \
 310         dev_err(&mdev->pdev->dev, format, ## arg)
 311 #define mthca_info(mdev, format, arg...) \
 312         dev_info(&mdev->pdev->dev, format, ## arg)
 313 #define mthca_warn(mdev, format, arg...) \
 314         dev_warn(&mdev->pdev->dev, format, ## arg)
 315
 316 extern void __buggy_use_of_MTHCA_GET(void);
 317 extern void __buggy_use_of_MTHCA_PUT(void);
 318
 319 #define MTHCA_GET(dest, source, offset)                               \
 320         do {                                                          \
 321                 void *__p = (char *) (source) + (offset);             \
 322                 switch (sizeof (dest)) {                              \
 323                         case 1: (dest) = *(u8 *) __p;       break;    \
 324                         case 2: (dest) = be16_to_cpup(__p); break;    \
 325                         case 4: (dest) = be32_to_cpup(__p); break;    \
 326                         case 8: (dest) = be64_to_cpup(__p); break;    \
 327                         default: __buggy_use_of_MTHCA_GET();          \
 328                 }                                                     \
 329         } while (0)
 330
 331 #define MTHCA_PUT(dest, source, offset)                               \
 332         do {                                                          \
 333                 __typeof__(source) *__p =                             \
 334                         (__typeof__(source) *) ((char *) (dest) + (offset)); \
 335                 switch (sizeof(source)) {                             \
 336                         case 1: *__p = (source);            break;    \
 337                         case 2: *__p = cpu_to_be16(source); break;    \
 338                         case 4: *__p = cpu_to_be32(source); break;    \
 339                         case 8: *__p = cpu_to_be64(source); break;    \
 340                         default: __buggy_use_of_MTHCA_PUT();          \
 341                 }                                                     \
 342         } while (0)
 343
 344 int mthca_reset(struct mthca_dev *mdev);
 345
 346 u32 mthca_alloc(struct mthca_alloc *alloc);
 347 void mthca_free(struct mthca_alloc *alloc, u32 obj);
 348 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
 349                      u32 reserved);
 350 void mthca_alloc_cleanup(struct mthca_alloc *alloc);
 351 void *mthca_array_get(struct mthca_array *array, int index);
 352 int mthca_array_set(struct mthca_array *array, int index, void *value);
 353 void mthca_array_clear(struct mthca_array *array, int index);
 354 int mthca_array_init(struct mthca_array *array, int nent);
 355 void mthca_array_cleanup(struct mthca_array *array, int nent);
 356
 357 int mthca_init_uar_table(struct mthca_dev *dev);
 358 int mthca_init_pd_table(struct mthca_dev *dev);
 359 int mthca_init_mr_table(struct mthca_dev *dev);
 360 int mthca_init_eq_table(struct mthca_dev *dev);
 361 int mthca_init_cq_table(struct mthca_dev *dev);
 362 int mthca_init_qp_table(struct mthca_dev *dev);
 363 int mthca_init_av_table(struct mthca_dev *dev);
 364 int mthca_init_mcg_table(struct mthca_dev *dev);
 365
 366 void mthca_cleanup_uar_table(struct mthca_dev *dev);
 367 void mthca_cleanup_pd_table(struct mthca_dev *dev);
 368 void mthca_cleanup_mr_table(struct mthca_dev *dev);
 369 void mthca_cleanup_eq_table(struct mthca_dev *dev);
 370 void mthca_cleanup_cq_table(struct mthca_dev *dev);
 371 void mthca_cleanup_qp_table(struct mthca_dev *dev);
 372 void mthca_cleanup_av_table(struct mthca_dev *dev);
 373 void mthca_cleanup_mcg_table(struct mthca_dev *dev);
 374
 375 int mthca_register_device(struct mthca_dev *dev);
 376 void mthca_unregister_device(struct mthca_dev *dev);
 377
 378 int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
 379 void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
 380
 381 int mthca_pd_alloc(struct mthca_dev *dev, struct mthca_pd *pd);
 382 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
 383
 384 struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
 385 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
 386 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
 387                     int start_index, u64 *buffer_list, int list_len);
 388 int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
 389                    u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
 390 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
 391                            u32 access, struct mthca_mr *mr);
 392 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
 393                         u64 *buffer_list, int buffer_size_shift,
 394                         int list_len, u64 iova, u64 total_size,
 395                         u32 access, struct mthca_mr *mr);
 396 void mthca_free_mr(struct mthca_dev *dev,  struct mthca_mr *mr);
 397
 398 int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
 399                     u32 access, struct mthca_fmr *fmr);
 400 int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
 401                              int list_len, u64 iova);
 402 void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
 403 int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
 404                              int list_len, u64 iova);
 405 void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
 406 int mthca_free_fmr(struct mthca_dev *dev,  struct mthca_fmr *fmr);
 407
 408 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
 409 void mthca_unmap_eq_icm(struct mthca_dev *dev);
 410
 411 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
 412                   struct ib_wc *entry);
 413 int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
 414 int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
 415 int mthca_init_cq(struct mthca_dev *dev, int nent,
 416                   struct mthca_cq *cq);
 417 void mthca_free_cq(struct mthca_dev *dev,
 418                    struct mthca_cq *cq);
 419 void mthca_cq_event(struct mthca_dev *dev, u32 cqn);
 420 void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn);
 421
 422 void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
 423                     enum ib_event_type event_type);
 424 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
 425 int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
 426                           struct ib_send_wr **bad_wr);
 427 int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 428                              struct ib_recv_wr **bad_wr);
 429 int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
 430                           struct ib_send_wr **bad_wr);
 431 int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
 432                              struct ib_recv_wr **bad_wr);
 433 int mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
 434                        int index, int *dbd, u32 *new_wqe);
 435 int mthca_alloc_qp(struct mthca_dev *dev,
 436                    struct mthca_pd *pd,
 437                    struct mthca_cq *send_cq,
 438                    struct mthca_cq *recv_cq,
 439                    enum ib_qp_type type,
 440                    enum ib_sig_type send_policy,
 441                    struct mthca_qp *qp);
 442 int mthca_alloc_sqp(struct mthca_dev *dev,
 443                     struct mthca_pd *pd,
 444                     struct mthca_cq *send_cq,
 445                     struct mthca_cq *recv_cq,
 446                     enum ib_sig_type send_policy,
 447                     int qpn,
 448                     int port,
 449                     struct mthca_sqp *sqp);
 450 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
 451 int mthca_create_ah(struct mthca_dev *dev,
 452                     struct mthca_pd *pd,
 453                     struct ib_ah_attr *ah_attr,
 454                     struct mthca_ah *ah);
 455 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
 456 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
 457                   struct ib_ud_header *header);
 458
 459 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
 460 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
 461
 462 int mthca_process_mad(struct ib_device *ibdev,
 463                       int mad_flags,
 464                       u8 port_num,
 465                       struct ib_wc *in_wc,
 466                       struct ib_grh *in_grh,
 467                       struct ib_mad *in_mad,
 468                       struct ib_mad *out_mad);
 469 int mthca_create_agents(struct mthca_dev *dev);
 470 void mthca_free_agents(struct mthca_dev *dev);
 471
 472 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
 473 {
 474         return container_of(ibdev, struct mthca_dev, ib_dev);
 475 }
 476
 477 static inline int mthca_is_memfree(struct mthca_dev *dev)
 478 {
 479         return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
 480 }
 481
 482 #endif /* MTHCA_DEV_H */