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Pull one more egcs 1.1.2 workaround.
[linux-2.6/linux-mips.git] / sound / oss / rme96xx.c
blob9ad6e157c86b043131a6c7f715e587205e6350a4
1 /* (C) 2000 Guenter Geiger <geiger@debian.org>
2 with copy/pastes from the driver of Winfried Ritsch <ritsch@iem.kug.ac.at>
3 based on es1370.c
4
5
6
7 * 10 Jan 2001: 0.1 initial version
8 * 19 Jan 2001: 0.2 fixed bug in select()
9 * 27 Apr 2001: 0.3 more than one card usable
10 * 11 May 2001: 0.4 fixed for SMP, included into kernel source tree
11 * 17 May 2001: 0.5 draining code didn't work on new cards
12 * 18 May 2001: 0.6 remove synchronize_irq() call
13 * 10 Aug 2002: added synchronize_irq() again
14
15 TODO:
16 - test more than one card --- done
17 - check for pci IOREGION (see es1370) in rme96xx_probe ??
18 - error detection
19 - mmap interface
20 - mixer mmap interface
21 - mixer ioctl
22 - get rid of noise upon first open (why ??)
23 - allow multiple open(at least for read)
24 - allow multiple open for non overlapping regions
25 - recheck the multiple devices part (offsets of different devices, etc)
26 - do decent draining in _release --- done
27 - SMP support
28 */
29
30 #ifndef RMEVERSION
31 #define RMEVERSION "0.6"
32 #endif
33
34 #include <linux/version.h>
35 #include <linux/module.h>
36 #include <linux/string.h>
37 #include <linux/sched.h>
38 #include <linux/sound.h>
39 #include <linux/soundcard.h>
40 #include <linux/pci.h>
41 #include <linux/smp_lock.h>
42 #include <linux/delay.h>
43 #include <linux/slab.h>
44 #include <asm/dma.h>
45 #include <asm/hardirq.h>
46 #include <linux/init.h>
47 #include <linux/poll.h>
48 #include "rme96xx.h"
49
50 #define NR_DEVICE 2
51
52 static int devices = 1;
53 MODULE_PARM(devices, "1-" __MODULE_STRING(NR_DEVICE) "i");
54 MODULE_PARM_DESC(devices, "number of dsp devices allocated by the driver");
55
56
57 MODULE_AUTHOR("Guenter Geiger, geiger@debian.org");
58 MODULE_DESCRIPTION("RME9652/36 \"Hammerfall\" Driver");
59 MODULE_LICENSE("GPL");
60
61
62 #ifdef DEBUG
63 #define DBG(x) printk("RME_DEBUG:");x
64 #define COMM(x) printk("RME_COMM: " x "\n");
65 #else
66 #define DBG(x) while (0) {}
67 #define COMM(x)
68 #endif
69
70 /*--------------------------------------------------------------------------
71 Preporcessor Macros and Definitions
72 --------------------------------------------------------------------------*/
73
74 #define RME96xx_MAGIC 0x6473
75
76 /* Registers-Space in offsets from base address with 16MByte size */
77
78 #define RME96xx_IO_EXTENT 16l*1024l*1024l
79 #define RME96xx_CHANNELS_PER_CARD 26
80
81 /* Write - Register */
82
83 /* 0,4,8,12,16,20,24,28 ... hardware init (erasing fifo-pointer intern) */
84 #define RME96xx_num_of_init_regs 8
85
86 #define RME96xx_init_buffer (0/4)
87 #define RME96xx_play_buffer (32/4) /* pointer to 26x64kBit RAM from mainboard */
88 #define RME96xx_rec_buffer (36/4) /* pointer to 26x64kBit RAM from mainboard */
89 #define RME96xx_control_register (64/4) /* exact meaning see below */
90 #define RME96xx_irq_clear (96/4) /* irq acknowledge */
91 #define RME96xx_time_code (100/4) /* if used with alesis adat */
92 #define RME96xx_thru_base (128/4) /* 132...228 Thru for 26 channels */
93 #define RME96xx_thru_channels RME96xx_CHANNELS_PER_CARD
94
95 /* Read Register */
96
97 #define RME96xx_status_register 0 /* meaning see below */
98
99
100
101 /* Status Register: */
102 /* ------------------------------------------------------------------------ */
103 #define RME96xx_IRQ 0x0000001 /* IRQ is High if not reset by RMExx_irq_clear */
104 #define RME96xx_lock_2 0x0000002 /* ADAT 3-PLL: 1=locked, 0=unlocked */
105 #define RME96xx_lock_1 0x0000004 /* ADAT 2-PLL: 1=locked, 0=unlocked */
106 #define RME96xx_lock_0 0x0000008 /* ADAT 1-PLL: 1=locked, 0=unlocked */
107
108 #define RME96xx_fs48 0x0000010 /* sample rate 0 ...44.1/88.2, 1 ... 48/96 Khz */
109 #define RME96xx_wsel_rd 0x0000020 /* if Word-Clock is used and valid then 1 */
110 #define RME96xx_buf_pos1 0x0000040 /* Bit 6..15 : Position of buffer-pointer in 64Bytes-blocks */
111 #define RME96xx_buf_pos2 0x0000080 /* resolution +/- 1 64Byte/block (since 64Bytes bursts) */
112
113 #define RME96xx_buf_pos3 0x0000100 /* 10 bits = 1024 values */
114 #define RME96xx_buf_pos4 0x0000200 /* if we mask off the first 6 bits, we can take the status */
115 #define RME96xx_buf_pos5 0x0000400 /* register as sample counter in the hardware buffer */
116 #define RME96xx_buf_pos6 0x0000800
117
118 #define RME96xx_buf_pos7 0x0001000
119 #define RME96xx_buf_pos8 0x0002000
120 #define RME96xx_buf_pos9 0x0004000
121 #define RME96xx_buf_pos10 0x0008000
122
123 #define RME96xx_sync_2 0x0010000 /* if ADAT-IN3 synced to system clock */
124 #define RME96xx_sync_1 0x0020000 /* if ADAT-IN2 synced to system clock */
125 #define RME96xx_sync_0 0x0040000 /* if ADAT-IN1 synced to system clock */
126 #define RME96xx_DS_rd 0x0080000 /* 1=Double Speed, 0=Normal Speed */
127
128 #define RME96xx_tc_busy 0x0100000 /* 1=time-code copy in progress (960ms) */
129 #define RME96xx_tc_out 0x0200000 /* time-code out bit */
130 #define RME96xx_F_0 0x0400000 /* 000=64kHz, 100=88.2kHz, 011=96kHz */
131 #define RME96xx_F_1 0x0800000 /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
132
133 #define RME96xx_F_2 0x1000000 /* od external Crystal Chip if ERF=1*/
134 #define RME96xx_ERF 0x2000000 /* Error-Flag of SDPIF Receiver (1=No Lock)*/
135 #define RME96xx_buffer_id 0x4000000 /* toggles by each interrupt on rec/play */
136 #define RME96xx_tc_valid 0x8000000 /* 1 = a signal is detected on time-code input */
137
138 /* Status Register Fields */
139
140 #define RME96xx_lock (RME96xx_lock_0|RME96xx_lock_1|RME96xx_lock_2)
141 #define RME96xx_buf_pos 0x000FFC0
142 #define RME96xx_sync (RME96xx_sync_0|RME96xx_sync_1|RME96xx_sync_2)
143 #define RME96xx_F (RME96xx_F_0|RME96xx_F_1|RME96xx_F_2)
144
145
146
147 /* Control-Register: */
148 /*--------------------------------------------------------------------------------*/
149
150 #define RME96xx_start_bit 0x0001 /* start record/play */
151 #define RME96xx_latency0 0x0002 /* Bit 0 - Buffer size or latency */
152 #define RME96xx_latency1 0x0004 /* Bit 1 - Buffer size or latency */
153 #define RME96xx_latency2 0x0008 /* Bit 2 - Buffer size or latency */
154
155 #define RME96xx_Master 0x0010 /* Clock Mode Master=1,Slave/Auto=0 */
156 #define RME96xx_IE 0x0020 /* Interupt Enable */
157 #define RME96xx_freq 0x0040 /* samplerate 0=44.1/88.2, 1=48/96 kHz*/
158
159
160 #define RME96xx_DS 0x0100 /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
161 #define RME96xx_PRO 0x0200 /* spdif 0=consumer, 1=professional Mode*/
162 #define RME96xx_EMP 0x0400 /* spdif Emphasis 0=None, 1=ON */
163 #define RME96xx_Dolby 0x0800 /* spdif Non-audio bit 1=set, 0=unset */
164
165 #define RME96xx_opt_out 0x1000 /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
166 #define RME96xx_wsel 0x2000 /* use Wordclock as sync (overwrites master)*/
167 #define RME96xx_inp_0 0x4000 /* SPDIF-IN: 00=optical (ADAT1), */
168 #define RME96xx_inp_1 0x8000 /* 01=koaxial (Cinch), 10=Internal CDROM*/
169
170 #define RME96xx_SyncRef0 0x10000 /* preferred sync-source in autosync */
171 #define RME96xx_SyncRef1 0x20000 /* 00=ADAT1,01=ADAT2,10=ADAT3,11=SPDIF */
172
173
174 #define RME96xx_ctrl_init (RME96xx_latency0 |\
175 RME96xx_Master |\
176 RME96xx_inp_1)
177
178
179
180 /* Control register fields and shortcuts */
181
182 #define RME96xx_latency (RME96xx_latency0|RME96xx_latency1|RME96xx_latency2)
183 #define RME96xx_inp (RME96xx_inp_0|RME96xx_inp_1)
184 #define RME96xx_SyncRef (RME96xx_SyncRef0|RME96xx_SyncRef1)
185 /* latency = 512Bytes * 2^n, where n is made from Bit3 ... Bit0 */
186
187 #define RME96xx_SET_LATENCY(x) (((x)&0x7)<<1)
188 #define RME96xx_GET_LATENCY(x) (((x)>>1)&0x7)
189 #define RME96xx_SET_inp(x) (((x)&0x3)<<14)
190 #define RME96xx_GET_inp(x) (((x)>>14)&0x3)
191 #define RME96xx_SET_SyncRef(x) (((x)&0x3)<<17)
192 #define RME96xx_GET_SyncRef(x) (((x)>>17)&0x3)
193
194
195 /* buffer sizes */
196 #define RME96xx_BYTES_PER_SAMPLE 4 /* sizeof(u32) */
197 #define RME_16K 16*1024
198
199 #define RME96xx_DMA_MAX_SAMPLES (RME_16K)
200 #define RME96xx_DMA_MAX_SIZE (RME_16K * RME96xx_BYTES_PER_SAMPLE)
201 #define RME96xx_DMA_MAX_SIZE_ALL (RME96xx_DMA_MAX_SIZE * RME96xx_CHANNELS_PER_CARD)
202
203 #define RME96xx_NUM_OF_FRAGMENTS 2
204 #define RME96xx_FRAGMENT_MAX_SIZE (RME96xx_DMA_MAX_SIZE/2)
205 #define RME96xx_FRAGMENT_MAX_SAMPLES (RME96xx_DMA_MAX_SAMPLES/2)
206 #define RME96xx_MAX_LATENCY 7 /* 16k samples */
207
208
209 #define RME96xx_MAX_DEVS 4 /* we provide some OSS stereodevs */
210
211 #define RME_MESS "rme96xx:"
212 /*------------------------------------------------------------------------
213 Types, struct and function declarations
214 ------------------------------------------------------------------------*/
215
216
217 /* --------------------------------------------------------------------- */
218
219 static const char invalid_magic[] = KERN_CRIT RME_MESS" invalid magic value\n";
220
221 #define VALIDATE_STATE(s) \
222 ({ \
223 if (!(s) || (s)->magic != RME96xx_MAGIC) { \
224 printk(invalid_magic); \
225 return -ENXIO; \
226 } \
227 })
228
229 /* --------------------------------------------------------------------- */
230
231
232 static struct file_operations rme96xx_audio_fops;
233 static struct file_operations rme96xx_mixer_fops;
234 static int numcards;
235
236 typedef int32_t raw_sample_t;
237
238 typedef struct _rme96xx_info {
239
240 /* hardware settings */
241 int magic;
242 struct pci_dev * pcidev; /* pci_dev structure */
243 unsigned long *iobase;
244 unsigned int irq;
245
246 /* list of rme96xx devices */
247 struct list_head devs;
248
249 spinlock_t lock;
250
251 u32 *recbuf; /* memory for rec buffer */
252 u32 *playbuf; /* memory for play buffer */
253
254 u32 control_register;
255
256 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
257
258 int open_count;
259
260
261 int rate;
262 int latency;
263 unsigned int fragsize;
264 int started;
265
266 int hwptr; /* can be negativ because of pci burst offset */
267 unsigned int hwbufid; /* set by interrupt, buffer which is written/read now */
268
269 struct dmabuf {
270
271 unsigned int format;
272 int formatshift;
273 int inchannels; /* number of channels for device */
274 int outchannels; /* number of channels for device */
275 int mono; /* if true, we play mono on 2 channels */
276 int inoffset; /* which channel is considered the first one */
277 int outoffset;
278
279 /* state */
280 int opened; /* open() made */
281 int started; /* first write/read */
282 int mmapped; /* mmap */
283 int open_mode;
284
285 struct _rme96xx_info *s;
286
287 /* pointer to read/write position in buffer */
288 unsigned readptr;
289 unsigned writeptr;
290
291 unsigned error; /* over/underruns cleared on sync again */
292
293 /* waiting and locking */
294 wait_queue_head_t wait;
295 struct semaphore open_sem;
296 wait_queue_head_t open_wait;
297
298 } dma[RME96xx_MAX_DEVS];
299
300 int dspnum[RME96xx_MAX_DEVS]; /* register with sound subsystem */
301 int mixer; /* register with sound subsystem */
302 } rme96xx_info;
303
304
305 /* fiddling with the card (first level hardware control) */
306
307 inline void rme96xx_set_ctrl(rme96xx_info* s,int mask)
308 {
309
310 s->control_register|=mask;
311 writel(s->control_register,s->iobase + RME96xx_control_register);
312
313 }
314
315 inline void rme96xx_unset_ctrl(rme96xx_info* s,int mask)
316 {
317
318 s->control_register&=(~mask);
319 writel(s->control_register,s->iobase + RME96xx_control_register);
320
321 }
322
323
324
325 /* the hwbuf in the status register seems to have some jitter, to get rid of
326 it, we first only let the numbers grow, to be on the secure side we
327 subtract a certain amount RME96xx_BURSTBYTES from the resulting number */
328
329 /* the function returns the hardware pointer in bytes */
330 #define RME96xx_BURSTBYTES -64 /* bytes by which hwptr could be off */
331
332 inline int rme96xx_gethwptr(rme96xx_info* s,int exact)
333 {
334 long flags;
335 if (exact) {
336 unsigned int hwp;
337 /* the hwptr seems to be rather unreliable :(, so we don't use it */
338 spin_lock_irqsave(&s->lock,flags);
339
340 hwp = readl(s->iobase + RME96xx_status_register) & 0xffc0;
341 s->hwptr = (hwp < s->hwptr) ? s->hwptr : hwp;
342 // s->hwptr = hwp;
343
344 spin_unlock_irqrestore(&s->lock,flags);
345 return (s->hwptr+RME96xx_BURSTBYTES) & ((s->fragsize<<1)-1);
346 }
347 return (s->hwbufid ? s->fragsize : 0);
348 }
349
350 inline void rme96xx_setlatency(rme96xx_info* s,int l)
351 {
352 s->latency = l;
353 s->fragsize = 1<<(8+l);
354 rme96xx_unset_ctrl(s,RME96xx_latency);
355 rme96xx_set_ctrl(s,RME96xx_SET_LATENCY(l));
356 }
357
358
359 static void rme96xx_clearbufs(struct dmabuf* dma)
360 {
361 int i,j;
362 unsigned long flags;
363
364 /* clear dmabufs */
365 for(i=0;i<devices;i++) {
366 for (j=0;j<dma->outchannels + dma->mono;j++)
367 memset(&dma->s->playbuf[(dma->outoffset + j)*RME96xx_DMA_MAX_SAMPLES],
368 0, RME96xx_DMA_MAX_SIZE);
369 }
370 spin_lock_irqsave(&dma->s->lock,flags);
371 dma->writeptr = 0;
372 dma->readptr = 0;
373 spin_unlock_irqrestore(&dma->s->lock,flags);
374 }
375
376 static int rme96xx_startcard(rme96xx_info *s,int stop)
377 {
378 int i;
379 long flags;
380
381 COMM ("startcard");
382 if(s->control_register & RME96xx_IE){
383 /* disable interrupt first */
384
385 rme96xx_unset_ctrl( s,RME96xx_start_bit );
386 udelay(10);
387 rme96xx_unset_ctrl( s,RME96xx_IE);
388 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
389 s->started = 0;
390 spin_unlock_irqrestore(&s->lock,flags);
391 if (stop) {
392 COMM("Sound card stopped");
393 return 1;
394 }
395 }
396 COMM ("interupt disabled");
397 /* first initialize all pointers on card */
398 for(i=0;i<RME96xx_num_of_init_regs;i++){
399 writel(0,s->iobase + i);
400 udelay(10); /* ?? */
401 }
402 COMM ("regs cleaned");
403
404 spin_lock_irqsave(&s->lock,flags); /* timing is critical */
405 udelay(10);
406 s->started = 1;
407 s->hwptr = 0;
408 spin_unlock_irqrestore(&s->lock,flags);
409
410 rme96xx_set_ctrl( s, RME96xx_IE | RME96xx_start_bit);
411
412
413 COMM("Sound card started");
414
415 return 1;
416 }
417
418
419 inline int rme96xx_getospace(struct dmabuf * dma, unsigned int hwp)
420 {
421 int cnt;
422 int swptr;
423 unsigned long flags;
424
425 spin_lock_irqsave(&dma->s->lock,flags);
426 swptr = dma->writeptr;
427 cnt = (hwp - swptr);
428
429 if (cnt < 0) {
430 cnt = ((dma->s->fragsize<<1) - swptr);
431 }
432 spin_unlock_irqrestore(&dma->s->lock,flags);
433 return cnt;
434 }
435
436 inline int rme96xx_getispace(struct dmabuf * dma, unsigned int hwp)
437 {
438 int cnt;
439 int swptr;
440 unsigned long flags;
441
442 spin_lock_irqsave(&dma->s->lock,flags);
443 swptr = dma->readptr;
444 cnt = (hwp - swptr);
445
446 if (cnt < 0) {
447 cnt = ((dma->s->fragsize<<1) - swptr);
448 }
449 spin_unlock_irqrestore(&dma->s->lock,flags);
450 return cnt;
451 }
452
453
454 inline int rme96xx_copyfromuser(struct dmabuf* dma,const char* buffer,int count,int hop)
455 {
456 int swptr = dma->writeptr;
457 switch (dma->format) {
458 case AFMT_S32_BLOCKED:
459 {
460 char* buf = (char*)buffer;
461 int cnt = count/dma->outchannels;
462 int i;
463 for (i=0;i < dma->outchannels;i++) {
464 char* hwbuf =(char*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
465 hwbuf+=swptr;
466
467 if (copy_from_user(hwbuf,buf, cnt))
468 return -1;
469 buf+=hop;
470 }
471 swptr+=cnt;
472 break;
473 }
474 case AFMT_S16_LE:
475 {
476 int i,j;
477 int cnt = count/dma->outchannels;
478 for (i=0;i < dma->outchannels + dma->mono;i++) {
479 short* sbuf = (short*)buffer + i*(!dma->mono);
480 short* hwbuf =(short*) &dma->s->playbuf[(dma->outoffset + i)*RME96xx_DMA_MAX_SAMPLES];
481 hwbuf+=(swptr>>1);
482 for (j=0;j<(cnt>>1);j++) {
483 hwbuf++; /* skip the low 16 bits */
484 __get_user(*hwbuf++,sbuf++);
485 sbuf+=(dma->outchannels-1);
486 }
487 }
488 swptr += (cnt<<1);
489 break;
490 }
491 default:
492 printk(RME_MESS" unsupported format\n");
493 return -1;
494 } /* switch */
495
496 swptr&=((dma->s->fragsize<<1) -1);
497 dma->writeptr = swptr;
498
499 return 0;
500 }
501
502 /* The count argument is the number of bytes */
503 inline int rme96xx_copytouser(struct dmabuf* dma,const char* buffer,int count,int hop)
504 {
505 int swptr = dma->readptr;
506 switch (dma->format) {
507 case AFMT_S32_BLOCKED:
508 {
509 char* buf = (char*)buffer;
510 int cnt = count/dma->inchannels;
511 int i;
512
513 for (i=0;i < dma->inchannels;i++) {
514 char* hwbuf =(char*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
515 hwbuf+=swptr;
516
517 if (copy_to_user(buf,hwbuf,cnt))
518 return -1;
519 buf+=hop;
520 }
521 swptr+=cnt;
522 break;
523 }
524 case AFMT_S16_LE:
525 {
526 int i,j;
527 int cnt = count/dma->inchannels;
528 for (i=0;i < dma->inchannels;i++) {
529 short* sbuf = (short*)buffer + i;
530 short* hwbuf =(short*) &dma->s->recbuf[(dma->inoffset + i)*RME96xx_DMA_MAX_SAMPLES];
531 hwbuf+=(swptr>>1);
532 for (j=0;j<(cnt>>1);j++) {
533 hwbuf++;
534 __put_user(*hwbuf++,sbuf++);
535 sbuf+=(dma->inchannels-1);
536 }
537 }
538 swptr += (cnt<<1);
539 break;
540 }
541 default:
542 printk(RME_MESS" unsupported format\n");
543 return -1;
544 } /* switch */
545
546 swptr&=((dma->s->fragsize<<1) -1);
547 dma->readptr = swptr;
548 return 0;
549 }
550
551
552 static void rme96xx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
553 {
554 int i;
555 rme96xx_info *s = (rme96xx_info *)dev_id;
556 struct dmabuf *db;
557 u32 status;
558 unsigned long flags;
559
560 status = readl(s->iobase + RME96xx_status_register);
561 if (!(status & RME96xx_IRQ)) {
562 return;
563 }
564
565 spin_lock_irqsave(&s->lock,flags);
566 writel(0,s->iobase + RME96xx_irq_clear);
567
568 s->hwbufid = (status & RME96xx_buffer_id)>>26;
569 if ((status & 0xffc0) <= 256) s->hwptr = 0;
570 for(i=0;i<devices;i++)
571 {
572 db = &(s->dma[i]);
573 if(db->started > 0)
574 wake_up(&(db->wait));
575 }
576 spin_unlock_irqrestore(&s->lock,flags);
577 }
578
579
580
581 /*----------------------------------------------------------------------------
582 PCI detection and module initialization stuff
583 ----------------------------------------------------------------------------*/
584
585 void* busmaster_malloc(int size) {
586 int pg; /* 2 s exponent of memory size */
587 char *buf;
588
589 DBG(printk("kernel malloc pages ..\n"));
590
591 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
592
593 buf = (char *) __get_free_pages(GFP_KERNEL | GFP_DMA, pg);
594
595 if (buf) {
596 struct page* page, *last_page;
597
598 page = virt_to_page(buf);
599 last_page = virt_to_page(buf + (1 << pg));
600 DBG(printk("setting reserved bit\n"));
601 while (page < last_page) {
602 SetPageReserved(page);
603 page++;
604 }
605 return buf;
606 }
607 DBG(printk("allocated %ld",(long)buf));
608 return NULL;
609 }
610
611 void busmaster_free(void* ptr,int size) {
612 int pg;
613 struct page* page, *last_page;
614
615 if (ptr == NULL)
616 return;
617
618 for (pg = 0; PAGE_SIZE * (1 << pg) < size; pg++);
619
620 page = virt_to_page(ptr);
621 last_page = page + (1 << pg);
622 while (page < last_page) {
623 ClearPageReserved(page);
624 page++;
625 }
626 DBG(printk("freeing pages\n"));
627 free_pages((unsigned long) ptr, pg);
628 DBG(printk("done\n"));
629 }
630
631 /* initialize those parts of the info structure which are not pci detectable resources */
632
633 static int rme96xx_dmabuf_init(rme96xx_info * s,struct dmabuf* dma,int ioffset,int ooffset) {
634
635 init_MUTEX(&dma->open_sem);
636 init_waitqueue_head(&dma->open_wait);
637 init_waitqueue_head(&dma->wait);
638 dma->s = s;
639 dma->error = 0;
640
641 dma->format = AFMT_S32_BLOCKED;
642 dma->formatshift = 0;
643 dma->inchannels = dma->outchannels = 1;
644 dma->inoffset = ioffset;
645 dma->outoffset = ooffset;
646
647 dma->opened=0;
648 dma->started=0;
649 dma->mmapped=0;
650 dma->open_mode=0;
651 dma->mono=0;
652
653 rme96xx_clearbufs(dma);
654 return 0;
655 }
656
657
658 int rme96xx_init(rme96xx_info* s)
659 {
660 int i;
661 DBG(printk(__FUNCTION__"\n"));
662 numcards++;
663
664 s->magic = RME96xx_MAGIC;
665
666 spin_lock_init(&s->lock);
667
668 COMM ("setup busmaster memory")
669 s->recbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
670 s->playbuf = busmaster_malloc(RME96xx_DMA_MAX_SIZE_ALL);
671
672 if (!s->recbuf || !s->playbuf) {
673 printk(KERN_ERR RME_MESS" Unable to allocate busmaster memory\n");
674 return -ENODEV;
675 }
676
677 COMM ("setting rec and playbuffers")
678
679 writel((u32) virt_to_bus(s->recbuf),s->iobase + RME96xx_rec_buffer);
680 writel((u32) virt_to_bus(s->playbuf),s->iobase + RME96xx_play_buffer);
681
682 COMM ("initializing control register")
683 rme96xx_unset_ctrl(s,0xffffffff);
684 rme96xx_set_ctrl(s,RME96xx_ctrl_init);
685
686
687 COMM ("setup devices")
688 for (i=0;i < devices;i++) {
689 struct dmabuf * dma = &s->dma[i];
690 rme96xx_dmabuf_init(s,dma,2*i,2*i);
691 }
692
693 s->started = 0;
694 rme96xx_setlatency(s,7);
695
696 printk(KERN_INFO RME_MESS" card %d initialized\n",numcards);
697 return 0;
698 }
699
700
701 /* open uses this to figure out which device was opened .. this seems to be
702 unnecessary complex */
703
704 static LIST_HEAD(devs);
705
706 static int __devinit rme96xx_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
707 {
708 int i;
709 rme96xx_info *s;
710
711 DBG(printk(__FUNCTION__"\n"));
712
713 if (pcidev->irq == 0)
714 return -1;
715 if (!pci_dma_supported(pcidev, 0xffffffff)) {
716 printk(KERN_WARNING RME_MESS" architecture does not support 32bit PCI busmaster DMA\n");
717 return -1;
718 }
719 if (!(s = kmalloc(sizeof(rme96xx_info), GFP_KERNEL))) {
720 printk(KERN_WARNING RME_MESS" out of memory\n");
721 return -1;
722 }
723 memset(s, 0, sizeof(rme96xx_info));
724
725 s->pcidev = pcidev;
726 s->iobase = ioremap(pci_resource_start(pcidev, 0),RME96xx_IO_EXTENT);
727 s->irq = pcidev->irq;
728
729 DBG(printk("remapped iobase: %lx irq %d\n",(long)s->iobase,s->irq));
730
731 if (pci_enable_device(pcidev))
732 goto err_irq;
733 if (request_irq(s->irq, rme96xx_interrupt, SA_SHIRQ, "es1370", s)) {
734 printk(KERN_ERR RME_MESS" irq %u in use\n", s->irq);
735 goto err_irq;
736 }
737
738 /* initialize the card */
739
740 i = 0;
741 if (rme96xx_init(s) < 0) {
742 printk(KERN_ERR RME_MESS" initialization failed\n");
743 goto err_devices;
744 }
745 for (i=0;i<devices;i++) {
746 if ((s->dspnum[i] = register_sound_dsp(&rme96xx_audio_fops, -1)) < 0)
747 goto err_devices;
748 }
749
750 if ((s->mixer = register_sound_mixer(&rme96xx_mixer_fops, -1)) < 0)
751 goto err_devices;
752
753 pci_set_drvdata(pcidev, s);
754 pcidev->dma_mask = 0xffffffff; /* ????? */
755 /* put it into driver list */
756 list_add_tail(&s->devs, &devs);
757
758 DBG(printk("initialization successful\n"));
759 return 0;
760
761 /* error handler */
762 err_devices:
763 while (i--)
764 unregister_sound_dsp(s->dspnum[i]);
765 free_irq(s->irq,s);
766 err_irq:
767 kfree(s);
768 return -1;
769 }
770
771
772 static void __devinit rme96xx_remove(struct pci_dev *dev)
773 {
774 int i;
775 rme96xx_info *s = pci_get_drvdata(dev);
776
777 if (!s) {
778 printk(KERN_ERR"device structure not valid\n");
779 return ;
780 }
781
782 if (s->started) rme96xx_startcard(s,0);
783
784 i = devices;
785 while (i) {
786 i--;
787 unregister_sound_dsp(s->dspnum[i]);
788 }
789
790 unregister_sound_mixer(s->mixer);
791 synchronize_irq(s->irq);
792 free_irq(s->irq,s);
793 busmaster_free(s->recbuf,RME96xx_DMA_MAX_SIZE_ALL);
794 busmaster_free(s->playbuf,RME96xx_DMA_MAX_SIZE_ALL);
795 kfree(s);
796 pci_set_drvdata(dev, NULL);
797 }
798
799
800 #ifndef PCI_VENDOR_ID_RME
801 #define PCI_VENDOR_ID_RME 0x10ee
802 #endif
803 #ifndef PCI_DEVICE_ID_RME9652
804 #define PCI_DEVICE_ID_RME9652 0x3fc4
805 #endif
806 #ifndef PCI_ANY_ID
807 #define PCI_ANY_ID 0
808 #endif
809
810 static struct pci_device_id id_table[] __devinitdata = {
811 { PCI_VENDOR_ID_RME, PCI_DEVICE_ID_RME9652, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
812 { 0, }
813 };
814
815 MODULE_DEVICE_TABLE(pci, id_table);
816
817 static struct pci_driver rme96xx_driver = {
818 name: "rme96xx",
819 id_table: id_table,
820 probe: rme96xx_probe,
821 remove: rme96xx_remove
822 };
823
824 static int __init init_rme96xx(void)
825 {
826
827 if (!pci_present()) /* No PCI bus in this machine! */
828 return -ENODEV;
829 printk(KERN_INFO RME_MESS" version "RMEVERSION" time " __TIME__ " " __DATE__ "\n");
830 printk(KERN_INFO RME_MESS" reserving %d dsp device(s)\n",devices);
831 numcards = 0;
832 return pci_module_init(&rme96xx_driver);
833 }
834
835 static void __exit cleanup_rme96xx(void)
836 {
837 printk(KERN_INFO RME_MESS" unloading\n");
838 pci_unregister_driver(&rme96xx_driver);
839 }
840
841 module_init(init_rme96xx);
842 module_exit(cleanup_rme96xx);
843
844
845
846
847
848 /*--------------------------------------------------------------------------
849 Implementation of file operations
850 ---------------------------------------------------------------------------*/
851
852 #define RME96xx_FMT (AFMT_S16_LE|AFMT_U8|AFMT_S32_BLOCKED)
853
854
855 static int rme96xx_ioctl(struct inode *in, struct file *file,
856 unsigned int cmd, unsigned long arg)
857 {
858
859
860 struct dmabuf * dma = (struct dmabuf *)file->private_data;
861 rme96xx_info *s = dma->s;
862 unsigned long flags;
863 audio_buf_info abinfo;
864 count_info cinfo;
865 int count;
866 int val = 0;
867
868 VALIDATE_STATE(s);
869
870 DBG(printk("ioctl %ud\n",cmd));
871
872 switch (cmd) {
873 case OSS_GETVERSION:
874 return put_user(SOUND_VERSION, (int *)arg);
875
876 case SNDCTL_DSP_SYNC:
877 #if 0
878 if (file->f_mode & FMODE_WRITE)
879 return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
880 #endif
881 return 0;
882
883 case SNDCTL_DSP_SETDUPLEX:
884 return 0;
885
886 case SNDCTL_DSP_GETCAPS:
887 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
888
889 case SNDCTL_DSP_RESET:
890 // rme96xx_clearbufs(dma);
891 return 0;
892
893 case SNDCTL_DSP_SPEED:
894 if (get_user(val, (int *)arg))
895 return -EFAULT;
896 if (val >= 0) {
897 /* generally it's not a problem if we change the speed
898 if (dma->open_mode & (~file->f_mode) & (FMODE_READ|FMODE_WRITE))
899 return -EINVAL;
900 */
901 spin_lock_irqsave(&s->lock, flags);
902
903 switch (val) {
904 case 44100:
905 case 88200:
906 rme96xx_unset_ctrl(s,RME96xx_freq);
907 break;
908 case 48000:
909 case 96000:
910 rme96xx_set_ctrl(s,RME96xx_freq);
911 break;
912 default:
913 rme96xx_unset_ctrl(s,RME96xx_freq);
914 val = 44100;
915 }
916 if (val > 50000)
917 rme96xx_set_ctrl(s,RME96xx_DS);
918 else
919 rme96xx_unset_ctrl(s,RME96xx_DS);
920 s->rate = val;
921 spin_unlock_irqrestore(&s->lock, flags);
922 }
923 DBG(printk("speed set to %d\n",val));
924 return put_user(val, (int *)arg);
925
926 case SNDCTL_DSP_STEREO: /* this plays a mono file on two channels */
927 if (get_user(val, (int *)arg))
928 return -EFAULT;
929
930 if (!val) {
931 DBG(printk("setting to mono\n"));
932 dma->mono=1;
933 dma->inchannels = 1;
934 dma->outchannels = 1;
935 }
936 else {
937 DBG(printk("setting to stereo\n"));
938 dma->mono = 0;
939 dma->inchannels = 2;
940 dma->outchannels = 2;
941 }
942 return 0;
943 case SNDCTL_DSP_CHANNELS:
944 /* remember to check for resonable offset/channel pairs here */
945 if (get_user(val, (int *)arg))
946 return -EFAULT;
947
948 if (file->f_mode & FMODE_WRITE) {
949 if (val > 0 && (dma->outoffset + val) <= RME96xx_CHANNELS_PER_CARD)
950 dma->outchannels = val;
951 else
952 dma->outchannels = val = 2;
953 DBG(printk("setting to outchannels %d\n",val));
954 }
955 if (file->f_mode & FMODE_READ) {
956 if (val > 0 && (dma->inoffset + val) <= RME96xx_CHANNELS_PER_CARD)
957 dma->inchannels = val;
958 else
959 dma->inchannels = val = 2;
960 DBG(printk("setting to inchannels %d\n",val));
961 }
962
963 dma->mono=0;
964
965 return put_user(val, (int *)arg);
966
967 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
968 return put_user(RME96xx_FMT, (int *)arg);
969
970 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
971 DBG(printk("setting to format %x\n",val));
972 if (get_user(val, (int *)arg))
973 return -EFAULT;
974 if (val != AFMT_QUERY) {
975 if (val & RME96xx_FMT)
976 dma->format = val;
977 switch (dma->format) {
978 case AFMT_S16_LE:
979 dma->formatshift=1;
980 break;
981 case AFMT_S32_BLOCKED:
982 dma->formatshift=0;
983 break;
984 }
985 }
986 return put_user(dma->format, (int *)arg);
987
988 case SNDCTL_DSP_POST:
989 return 0;
990
991 case SNDCTL_DSP_GETTRIGGER:
992 val = 0;
993 #if 0
994 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
995 val |= PCM_ENABLE_INPUT;
996 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
997 val |= PCM_ENABLE_OUTPUT;
998 #endif
999 return put_user(val, (int *)arg);
1000
1001 case SNDCTL_DSP_SETTRIGGER:
1002 if (get_user(val, (int *)arg))
1003 return -EFAULT;
1004 #if 0
1005 if (file->f_mode & FMODE_READ) {
1006 if (val & PCM_ENABLE_INPUT) {
1007 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1008 return ret;
1009 start_adc(s);
1010 } else
1011 stop_adc(s);
1012 }
1013 if (file->f_mode & FMODE_WRITE) {
1014 if (val & PCM_ENABLE_OUTPUT) {
1015 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1016 return ret;
1017 start_dac2(s);
1018 } else
1019 stop_dac2(s);
1020 }
1021 #endif
1022 return 0;
1023
1024 case SNDCTL_DSP_GETOSPACE:
1025 if (!(file->f_mode & FMODE_WRITE))
1026 return -EINVAL;
1027
1028 val = rme96xx_gethwptr(dma->s,0);
1029
1030
1031 count = rme96xx_getospace(dma,val);
1032 if (!s->started) count = s->fragsize*2;
1033 abinfo.fragsize =(s->fragsize*dma->outchannels)>>dma->formatshift;
1034 abinfo.bytes = (count*dma->outchannels)>>dma->formatshift;
1035 abinfo.fragstotal = 2;
1036 abinfo.fragments = (count > s->fragsize);
1037
1038 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1039
1040 case SNDCTL_DSP_GETISPACE:
1041 if (!(file->f_mode & FMODE_READ))
1042 return -EINVAL;
1043
1044 val = rme96xx_gethwptr(dma->s,0);
1045
1046 count = rme96xx_getispace(dma,val);
1047
1048 abinfo.fragsize = (s->fragsize*dma->inchannels)>>dma->formatshift;
1049 abinfo.bytes = (count*dma->inchannels)>>dma->formatshift;;
1050 abinfo.fragstotal = 2;
1051 abinfo.fragments = count > s->fragsize;
1052 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1053
1054 case SNDCTL_DSP_NONBLOCK:
1055 file->f_flags |= O_NONBLOCK;
1056 return 0;
1057
1058 case SNDCTL_DSP_GETODELAY: /* What shold this exactly do ? ,
1059 ATM it is just abinfo.bytes */
1060 if (!(file->f_mode & FMODE_WRITE))
1061 return -EINVAL;
1062
1063 val = rme96xx_gethwptr(dma->s,0);
1064 count = val - dma->readptr;
1065 if (count < 0)
1066 count += s->fragsize<<1;
1067
1068 return put_user(count, (int *)arg);
1069
1070
1071 /* check out how to use mmaped mode (can only be blocked !!!) */
1072 case SNDCTL_DSP_GETIPTR:
1073 if (!(file->f_mode & FMODE_READ))
1074 return -EINVAL;
1075 val = rme96xx_gethwptr(dma->s,0);
1076 spin_lock_irqsave(&s->lock,flags);
1077 cinfo.bytes = s->fragsize<<1;;
1078 count = val - dma->readptr;
1079 if (count < 0)
1080 count += s->fragsize<<1;
1081
1082 cinfo.blocks = (count > s->fragsize);
1083 cinfo.ptr = val;
1084 if (dma->mmapped)
1085 dma->readptr &= s->fragsize<<1;
1086 spin_unlock_irqrestore(&s->lock,flags);
1087
1088 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
1089 return -EFAULT;
1090 return 0;
1091
1092 case SNDCTL_DSP_GETOPTR:
1093 if (!(file->f_mode & FMODE_READ))
1094 return -EINVAL;
1095 val = rme96xx_gethwptr(dma->s,0);
1096 spin_lock_irqsave(&s->lock,flags);
1097 cinfo.bytes = s->fragsize<<1;;
1098 count = val - dma->writeptr;
1099 if (count < 0)
1100 count += s->fragsize<<1;
1101
1102 cinfo.blocks = (count > s->fragsize);
1103 cinfo.ptr = val;
1104 if (dma->mmapped)
1105 dma->writeptr &= s->fragsize<<1;
1106 spin_unlock_irqrestore(&s->lock,flags);
1107 if (copy_to_user((void *)arg, &cinfo, sizeof(cinfo)))
1108 return -EFAULT;
1109 return 0;
1110 case SNDCTL_DSP_GETBLKSIZE:
1111 return put_user(s->fragsize, (int *)arg);
1112
1113 case SNDCTL_DSP_SETFRAGMENT:
1114 if (get_user(val, (int *)arg))
1115 return -EFAULT;
1116 val&=0xffff;
1117 val -= 7;
1118 if (val < 0) val = 0;
1119 if (val > 7) val = 7;
1120 rme96xx_setlatency(s,val);
1121 return 0;
1122
1123 case SNDCTL_DSP_SUBDIVIDE:
1124 #if 0
1125 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1126 (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1127 return -EINVAL;
1128 if (get_user(val, (int *)arg))
1129 return -EFAULT;
1130 if (val != 1 && val != 2 && val != 4)
1131 return -EINVAL;
1132 if (file->f_mode & FMODE_READ)
1133 s->dma_adc.subdivision = val;
1134 if (file->f_mode & FMODE_WRITE)
1135 s->dma_dac2.subdivision = val;
1136 #endif
1137 return 0;
1138
1139 case SOUND_PCM_READ_RATE:
1140 return put_user(s->rate, (int *)arg);
1141
1142 case SOUND_PCM_READ_CHANNELS:
1143 return put_user(dma->outchannels, (int *)arg);
1144
1145 case SOUND_PCM_READ_BITS:
1146 switch (dma->format) {
1147 case AFMT_S32_BLOCKED:
1148 val = 32;
1149 break;
1150 case AFMT_S16_LE:
1151 val = 16;
1152 break;
1153 }
1154 return put_user(val, (int *)arg);
1155
1156 case SOUND_PCM_WRITE_FILTER:
1157 case SNDCTL_DSP_SETSYNCRO:
1158 case SOUND_PCM_READ_FILTER:
1159 return -EINVAL;
1160
1161 }
1162
1163
1164 return -ENODEV;
1165 }
1166
1167
1168
1169 static int rme96xx_open(struct inode *in, struct file *f)
1170 {
1171 int minor = minor(in->i_rdev);
1172 struct list_head *list;
1173 int devnum = ((minor-3)/16) % devices; /* default = 0 */
1174 rme96xx_info *s;
1175 struct dmabuf* dma;
1176 DECLARE_WAITQUEUE(wait, current);
1177
1178 DBG(printk("device num %d open\n",devnum));
1179
1180 /* ??? */
1181 for (list = devs.next; ; list = list->next) {
1182 if (list == &devs)
1183 return -ENODEV;
1184 s = list_entry(list, rme96xx_info, devs);
1185 if (!((s->dspnum[devnum] ^ minor) & ~0xf))
1186 break;
1187 }
1188 VALIDATE_STATE(s);
1189 /* ??? */
1190
1191 dma = &s->dma[devnum];
1192 f->private_data = dma;
1193 /* wait for device to become free */
1194 down(&s->dma[devnum].open_sem);
1195 while (dma->open_mode & f->f_mode) {
1196 if (f->f_flags & O_NONBLOCK) {
1197 up(&dma->open_sem);
1198 return -EBUSY;
1199 }
1200 add_wait_queue(&dma->open_wait, &wait);
1201 __set_current_state(TASK_INTERRUPTIBLE);
1202 up(&dma->open_sem);
1203 schedule();
1204 remove_wait_queue(&dma->open_wait, &wait);
1205 set_current_state(TASK_RUNNING);
1206 if (signal_pending(current))
1207 return -ERESTARTSYS;
1208 down(&dma->open_sem);
1209 }
1210
1211 COMM ("hardware open")
1212
1213 if (!s->dma[devnum].opened) rme96xx_dmabuf_init(dma->s,dma,dma->inoffset,dma->outoffset);
1214
1215 s->dma[devnum].open_mode |= (f->f_mode & (FMODE_READ | FMODE_WRITE));
1216 s->dma[devnum].opened = 1;
1217 up(&s->dma[devnum].open_sem);
1218
1219 DBG(printk("device num %d open finished\n",devnum));
1220 return 0;
1221 }
1222
1223 static int rme96xx_release(struct inode *in, struct file *file)
1224 {
1225 struct dmabuf * dma = (struct dmabuf*) file->private_data;
1226 int hwp;
1227 DBG(printk(__FUNCTION__"\n"));
1228
1229 COMM ("draining")
1230 if (dma->open_mode & FMODE_WRITE) {
1231 #if 0 /* Why doesn't this work with some cards ?? */
1232 hwp = rme96xx_gethwptr(dma->s,0);
1233 while (rme96xx_getospace(dma,hwp)) {
1234 interruptible_sleep_on(&(dma->wait));
1235 hwp = rme96xx_gethwptr(dma->s,0);
1236 }
1237 #endif
1238 rme96xx_clearbufs(dma);
1239 }
1240
1241 dma->open_mode &= (~file->f_mode) & (FMODE_READ|FMODE_WRITE);
1242
1243 if (!(dma->open_mode & (FMODE_READ|FMODE_WRITE))) {
1244 dma->opened = 0;
1245 if (dma->s->started) rme96xx_startcard(dma->s,1);
1246 }
1247
1248 wake_up(&dma->open_wait);
1249 up(&dma->open_sem);
1250
1251 return 0;
1252 }
1253
1254
1255 static ssize_t rme96xx_write(struct file *file, const char *buffer,
1256 size_t count, loff_t *ppos)
1257 {
1258 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1259 ssize_t ret = 0;
1260 int cnt; /* number of bytes from "buffer" that will/can be used */
1261 int hop = count/dma->outchannels;
1262 int hwp;
1263 int exact = (file->f_flags & O_NONBLOCK);
1264
1265
1266 if(dma == NULL || (dma->s) == NULL)
1267 return -ENXIO;
1268
1269 if (ppos != &file->f_pos)
1270 return -ESPIPE;
1271
1272 if (dma->mmapped || !dma->opened)
1273 return -ENXIO;
1274
1275 if (!access_ok(VERIFY_READ, buffer, count))
1276 return -EFAULT;
1277
1278 if (! (dma->open_mode & FMODE_WRITE))
1279 return -ENXIO;
1280
1281 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1282 hwp = rme96xx_gethwptr(dma->s,0);
1283
1284 if(!(dma->started)){
1285 COMM ("first write")
1286
1287 dma->readptr = hwp;
1288 dma->writeptr = hwp;
1289 dma->started = 1;
1290 COMM ("first write done")
1291 }
1292
1293 while (count > 0) {
1294 cnt = rme96xx_getospace(dma,hwp);
1295 cnt>>=dma->formatshift;
1296 cnt*=dma->outchannels;
1297 if (cnt > count)
1298 cnt = count;
1299
1300 if (cnt != 0) {
1301 if (rme96xx_copyfromuser(dma,buffer,cnt,hop))
1302 return ret ? ret : -EFAULT;
1303 count -= cnt;
1304 buffer += cnt;
1305 ret += cnt;
1306 if (count == 0) return ret;
1307 }
1308 if (file->f_flags & O_NONBLOCK)
1309 return ret ? ret : -EAGAIN;
1310
1311 if ((hwp - dma->writeptr) <= 0) {
1312 interruptible_sleep_on(&(dma->wait));
1313
1314 if (signal_pending(current))
1315 return ret ? ret : -ERESTARTSYS;
1316 }
1317
1318 hwp = rme96xx_gethwptr(dma->s,exact);
1319
1320 }; /* count > 0 */
1321
1322 return ret;
1323 }
1324
1325 static ssize_t rme96xx_read(struct file *file, char *buffer,size_t count, loff_t *ppos)
1326 {
1327 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1328 ssize_t ret = 0;
1329 int cnt;
1330 int hop = count/dma->inchannels;
1331 int hwp;
1332 int exact = (file->f_flags & O_NONBLOCK);
1333
1334
1335 if(dma == NULL || (dma->s) == NULL)
1336 return -ENXIO;
1337
1338 if (ppos != &file->f_pos)
1339 return -ESPIPE;
1340
1341 if (dma->mmapped || !dma->opened)
1342 return -ENXIO;
1343
1344 if (!access_ok(VERIFY_WRITE, buffer, count))
1345 return -EFAULT;
1346
1347 if (! (dma->open_mode & FMODE_READ))
1348 return -ENXIO;
1349
1350 if (count > ((dma->s->fragsize*dma->inchannels)>>dma->formatshift))
1351 return -EFAULT;
1352
1353 if (!dma->s->started) rme96xx_startcard(dma->s,exact);
1354 hwp = rme96xx_gethwptr(dma->s,0);
1355
1356 if(!(dma->started)){
1357 COMM ("first read")
1358
1359 dma->writeptr = hwp;
1360 dma->readptr = hwp;
1361 dma->started = 1;
1362 }
1363
1364 while (count > 0) {
1365 cnt = rme96xx_getispace(dma,hwp);
1366 cnt>>=dma->formatshift;
1367 cnt*=dma->inchannels;
1368
1369 if (cnt > count)
1370 cnt = count;
1371
1372 if (cnt != 0) {
1373
1374 if (rme96xx_copytouser(dma,buffer,cnt,hop))
1375 return ret ? ret : -EFAULT;
1376
1377 count -= cnt;
1378 buffer += cnt;
1379 ret += cnt;
1380 if (count == 0) return ret;
1381 }
1382 if (file->f_flags & O_NONBLOCK)
1383 return ret ? ret : -EAGAIN;
1384
1385 if ((hwp - dma->readptr) <= 0) {
1386 interruptible_sleep_on(&(dma->wait));
1387
1388 if (signal_pending(current))
1389 return ret ? ret : -ERESTARTSYS;
1390 }
1391 hwp = rme96xx_gethwptr(dma->s,exact);
1392
1393 }; /* count > 0 */
1394
1395 return ret;
1396 }
1397
1398 static int rm96xx_mmap(struct file *file, struct vm_area_struct *vma) {
1399 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1400 rme96xx_info* s = dma->s;
1401 unsigned long size;
1402
1403 VALIDATE_STATE(s);
1404 lock_kernel();
1405
1406 if (vma->vm_pgoff != 0) {
1407 unlock_kernel();
1408 return -EINVAL;
1409 }
1410 size = vma->vm_end - vma->vm_start;
1411 if (size > RME96xx_DMA_MAX_SIZE) {
1412 unlock_kernel();
1413 return -EINVAL;
1414 }
1415
1416
1417 if (vma->vm_flags & VM_WRITE) {
1418 if (!s->started) rme96xx_startcard(s,1);
1419
1420 if (remap_page_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->outoffset*RME96xx_DMA_MAX_SIZE), size, vma->vm_page_prot)) {
1421 unlock_kernel();
1422 return -EAGAIN;
1423 }
1424 }
1425 else if (vma->vm_flags & VM_READ) {
1426 if (!s->started) rme96xx_startcard(s,1);
1427 if (remap_page_range(vma, vma->vm_start, virt_to_phys(s->playbuf + dma->inoffset*RME96xx_DMA_MAX_SIZE), size, vma->vm_page_prot)) {
1428 unlock_kernel();
1429 return -EAGAIN;
1430 }
1431 } else {
1432 unlock_kernel();
1433 return -EINVAL;
1434 }
1435
1436
1437 /* this is the mapping */
1438
1439 dma->mmapped = 1;
1440 unlock_kernel();
1441 return 0;
1442 }
1443
1444 static unsigned int rme96xx_poll(struct file *file, struct poll_table_struct *wait)
1445 {
1446 struct dmabuf *dma = (struct dmabuf *)file->private_data;
1447 rme96xx_info* s = dma->s;
1448 unsigned int mask = 0;
1449 unsigned int hwp,cnt;
1450
1451 DBG(printk("rme96xx poll_wait ...\n"));
1452 VALIDATE_STATE(s);
1453
1454 if (!s->started) {
1455 mask |= POLLOUT | POLLWRNORM;
1456 }
1457 poll_wait(file, &dma->wait, wait);
1458
1459 hwp = rme96xx_gethwptr(dma->s,0);
1460
1461 DBG(printk("rme96xx poll: ..cnt %d > %d\n",cnt,s->fragsize));
1462
1463 cnt = rme96xx_getispace(dma,hwp);
1464
1465 if (file->f_mode & FMODE_READ)
1466 if (cnt > 0)
1467 mask |= POLLIN | POLLRDNORM;
1468
1469
1470
1471 cnt = rme96xx_getospace(dma,hwp);
1472
1473 if (file->f_mode & FMODE_WRITE)
1474 if (cnt > 0)
1475 mask |= POLLOUT | POLLWRNORM;
1476
1477
1478 // printk("rme96xx poll_wait ...%d > %d\n",rme96xx_getospace(dma,hwp),rme96xx_getispace(dma,hwp));
1479
1480 return mask;
1481 }
1482
1483
1484 static struct file_operations rme96xx_audio_fops = {
1485 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
1486 owner: THIS_MODULE,
1487 #endif
1488 read: rme96xx_read,
1489 write: rme96xx_write,
1490 poll: rme96xx_poll,
1491 ioctl: rme96xx_ioctl,
1492 mmap: rm96xx_mmap,
1493 open: rme96xx_open,
1494 release: rme96xx_release
1495 };
1496
1497 static int rme96xx_mixer_open(struct inode *inode, struct file *file)
1498 {
1499 int minor = minor(inode->i_rdev);
1500 struct list_head *list;
1501 rme96xx_info *s;
1502
1503 COMM ("mixer open");
1504
1505 for (list = devs.next; ; list = list->next) {
1506 if (list == &devs)
1507 return -ENODEV;
1508 s = list_entry(list, rme96xx_info, devs);
1509 if (s->mixer== minor)
1510 break;
1511 }
1512 VALIDATE_STATE(s);
1513 file->private_data = s;
1514
1515 COMM ("mixer opened")
1516 return 0;
1517 }
1518
1519 static int rme96xx_mixer_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1520 {
1521 rme96xx_info *s = (rme96xx_info *)file->private_data;
1522 u32 status;
1523
1524 status = readl(s->iobase + RME96xx_status_register);
1525
1526 VALIDATE_STATE(s);
1527 if (cmd == SOUND_MIXER_PRIVATE1) {
1528 rme_mixer mixer;
1529 if (copy_from_user(&mixer,(void*)arg,sizeof(mixer)))
1530 return -EFAULT;
1531
1532 if (file->f_mode & FMODE_WRITE) {
1533 s->dma[mixer.devnr].outoffset = mixer.o_offset;
1534 s->dma[mixer.devnr].inoffset = mixer.i_offset;
1535 }
1536
1537 mixer.o_offset = s->dma[mixer.devnr].outoffset;
1538 mixer.i_offset = s->dma[mixer.devnr].inoffset;
1539
1540 return copy_to_user((void *)arg, &mixer, sizeof(mixer)) ? -EFAULT : 0;
1541 }
1542 if (cmd == SOUND_MIXER_PRIVATE2) {
1543 return put_user(status, (int *)arg);
1544 }
1545 if (cmd == SOUND_MIXER_PRIVATE3) {
1546 u32 control;
1547 if (copy_from_user(&control,(void*)arg,sizeof(control)))
1548 return -EFAULT;
1549 if (file->f_mode & FMODE_WRITE) {
1550 s->control_register = control;
1551 writel(control,s->iobase + RME96xx_control_register);
1552 }
1553
1554 return put_user(s->control_register, (int *)arg);
1555 }
1556 return -1;
1557 }
1558
1559
1560
1561 static int rme96xx_mixer_release(struct inode *inode, struct file *file)
1562 {
1563 return 0;
1564 }
1565
1566 static /*const*/ struct file_operations rme96xx_mixer_fops = {
1567 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
1568 owner: THIS_MODULE,
1569 #endif
1570 ioctl: rme96xx_mixer_ioctl,
1571 open: rme96xx_mixer_open,
1572 release: rme96xx_mixer_release,
1573 };
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