Fix IP22 timer calibration.
[linux-2.6/linux-mips.git] / include / asm-mips64 / asmmacro.h
blob316dc481c898e5590179180c00ee8d11017f8330
1 /*
2 * asmmacro.h: Assembler macros to make things easier to read.
4 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
5 * Copyright (C) 1998, 1999 Ralf Baechle
6 * Copyright (C) 1999 Silicon Graphics, Inc.
7 */
8 #ifndef _ASM_ASMMACRO_H
9 #define _ASM_ASMMACRO_H
11 #include <linux/config.h>
12 #include <asm/offset.h>
14 #ifdef CONFIG_CPU_SB1
15 #define FPU_ENABLE_HAZARD \
16 .set push; \
17 .set noreorder; \
18 .set mips2; \
19 SSNOP; \
20 bnezl $0, .+4; \
21 SSNOP; \
22 .set pop
23 #else
24 #define FPU_ENABLE_HAZARD
25 #endif
27 .macro fpu_save_16even thread tmp
28 cfc1 \tmp, fcr31
29 sdc1 $f2, (THREAD_FPU + 0x010)(\thread)
30 sdc1 $f4, (THREAD_FPU + 0x020)(\thread)
31 sdc1 $f6, (THREAD_FPU + 0x030)(\thread)
32 sdc1 $f8, (THREAD_FPU + 0x040)(\thread)
33 sdc1 $f10, (THREAD_FPU + 0x050)(\thread)
34 sdc1 $f12, (THREAD_FPU + 0x060)(\thread)
35 sdc1 $f14, (THREAD_FPU + 0x070)(\thread)
36 sdc1 $f16, (THREAD_FPU + 0x080)(\thread)
37 sdc1 $f18, (THREAD_FPU + 0x090)(\thread)
38 sdc1 $f20, (THREAD_FPU + 0x0a0)(\thread)
39 sdc1 $f22, (THREAD_FPU + 0x0b0)(\thread)
40 sdc1 $f24, (THREAD_FPU + 0x0c0)(\thread)
41 sdc1 $f26, (THREAD_FPU + 0x0d0)(\thread)
42 sdc1 $f28, (THREAD_FPU + 0x0e0)(\thread)
43 sdc1 $f30, (THREAD_FPU + 0x0f0)(\thread)
44 sw \tmp, (THREAD_FPU + 0x100)(\thread)
45 .endm
47 .macro fpu_save_16odd thread
48 sdc1 $f1, (THREAD_FPU + 0x08)(\thread)
49 sdc1 $f3, (THREAD_FPU + 0x18)(\thread)
50 sdc1 $f5, (THREAD_FPU + 0x28)(\thread)
51 sdc1 $f7, (THREAD_FPU + 0x38)(\thread)
52 sdc1 $f9, (THREAD_FPU + 0x48)(\thread)
53 sdc1 $f11, (THREAD_FPU + 0x58)(\thread)
54 sdc1 $f13, (THREAD_FPU + 0x68)(\thread)
55 sdc1 $f15, (THREAD_FPU + 0x78)(\thread)
56 sdc1 $f17, (THREAD_FPU + 0x88)(\thread)
57 sdc1 $f19, (THREAD_FPU + 0x98)(\thread)
58 sdc1 $f21, (THREAD_FPU + 0xa8)(\thread)
59 sdc1 $f23, (THREAD_FPU + 0xb8)(\thread)
60 sdc1 $f25, (THREAD_FPU + 0xc8)(\thread)
61 sdc1 $f27, (THREAD_FPU + 0xd8)(\thread)
62 sdc1 $f29, (THREAD_FPU + 0xe8)(\thread)
63 sdc1 $f31, (THREAD_FPU + 0xf8)(\thread)
64 .endm
66 .macro fpu_save thread tmp
67 cfc1 \tmp, fcr31
68 swc1 $f0, (THREAD_FPU + 0x000)(\thread)
69 swc1 $f1, (THREAD_FPU + 0x008)(\thread)
70 swc1 $f2, (THREAD_FPU + 0x010)(\thread)
71 swc1 $f3, (THREAD_FPU + 0x018)(\thread)
72 swc1 $f4, (THREAD_FPU + 0x020)(\thread)
73 swc1 $f5, (THREAD_FPU + 0x028)(\thread)
74 swc1 $f6, (THREAD_FPU + 0x030)(\thread)
75 swc1 $f7, (THREAD_FPU + 0x038)(\thread)
76 swc1 $f8, (THREAD_FPU + 0x040)(\thread)
77 swc1 $f9, (THREAD_FPU + 0x048)(\thread)
78 swc1 $f10, (THREAD_FPU + 0x050)(\thread)
79 swc1 $f11, (THREAD_FPU + 0x058)(\thread)
80 swc1 $f12, (THREAD_FPU + 0x060)(\thread)
81 swc1 $f13, (THREAD_FPU + 0x068)(\thread)
82 swc1 $f14, (THREAD_FPU + 0x070)(\thread)
83 swc1 $f15, (THREAD_FPU + 0x078)(\thread)
84 swc1 $f16, (THREAD_FPU + 0x080)(\thread)
85 swc1 $f17, (THREAD_FPU + 0x088)(\thread)
86 swc1 $f18, (THREAD_FPU + 0x090)(\thread)
87 swc1 $f19, (THREAD_FPU + 0x098)(\thread)
88 swc1 $f20, (THREAD_FPU + 0x0a0)(\thread)
89 swc1 $f21, (THREAD_FPU + 0x0a8)(\thread)
90 swc1 $f22, (THREAD_FPU + 0x0b0)(\thread)
91 swc1 $f23, (THREAD_FPU + 0x0b8)(\thread)
92 swc1 $f24, (THREAD_FPU + 0x0c0)(\thread)
93 swc1 $f25, (THREAD_FPU + 0x0c8)(\thread)
94 swc1 $f26, (THREAD_FPU + 0x0d0)(\thread)
95 swc1 $f27, (THREAD_FPU + 0x0d8)(\thread)
96 swc1 $f28, (THREAD_FPU + 0x0e0)(\thread)
97 swc1 $f29, (THREAD_FPU + 0x0e8)(\thread)
98 swc1 $f30, (THREAD_FPU + 0x0f0)(\thread)
99 swc1 $f31, (THREAD_FPU + 0x0f8)(\thread)
100 sw \tmp, (THREAD_FPU + 0x100)(\thread)
101 .endm
103 .macro fpu_restore_16even thread tmp
104 lw \tmp, (THREAD_FPU + 0x100)(\thread)
105 ldc1 $f2, (THREAD_FPU + 0x010)(\thread)
106 ldc1 $f4, (THREAD_FPU + 0x020)(\thread)
107 ldc1 $f6, (THREAD_FPU + 0x030)(\thread)
108 ldc1 $f8, (THREAD_FPU + 0x040)(\thread)
109 ldc1 $f10, (THREAD_FPU + 0x050)(\thread)
110 ldc1 $f12, (THREAD_FPU + 0x060)(\thread)
111 ldc1 $f14, (THREAD_FPU + 0x070)(\thread)
112 ldc1 $f16, (THREAD_FPU + 0x080)(\thread)
113 ldc1 $f18, (THREAD_FPU + 0x090)(\thread)
114 ldc1 $f20, (THREAD_FPU + 0x0a0)(\thread)
115 ldc1 $f22, (THREAD_FPU + 0x0b0)(\thread)
116 ldc1 $f24, (THREAD_FPU + 0x0c0)(\thread)
117 ldc1 $f26, (THREAD_FPU + 0x0d0)(\thread)
118 ldc1 $f28, (THREAD_FPU + 0x0e0)(\thread)
119 ldc1 $f30, (THREAD_FPU + 0x0f0)(\thread)
120 ctc1 \tmp, fcr31
121 .endm
123 .macro fpu_restore_16odd thread
124 ldc1 $f1, (THREAD_FPU + 0x08)(\thread)
125 ldc1 $f3, (THREAD_FPU + 0x18)(\thread)
126 ldc1 $f5, (THREAD_FPU + 0x28)(\thread)
127 ldc1 $f7, (THREAD_FPU + 0x38)(\thread)
128 ldc1 $f9, (THREAD_FPU + 0x48)(\thread)
129 ldc1 $f11, (THREAD_FPU + 0x58)(\thread)
130 ldc1 $f13, (THREAD_FPU + 0x68)(\thread)
131 ldc1 $f15, (THREAD_FPU + 0x78)(\thread)
132 ldc1 $f17, (THREAD_FPU + 0x88)(\thread)
133 ldc1 $f19, (THREAD_FPU + 0x98)(\thread)
134 ldc1 $f21, (THREAD_FPU + 0xa8)(\thread)
135 ldc1 $f23, (THREAD_FPU + 0xb8)(\thread)
136 ldc1 $f25, (THREAD_FPU + 0xc8)(\thread)
137 ldc1 $f27, (THREAD_FPU + 0xd8)(\thread)
138 ldc1 $f29, (THREAD_FPU + 0xe8)(\thread)
139 ldc1 $f31, (THREAD_FPU + 0xf8)(\thread)
140 .endm
142 .macro fpu_restore thread tmp
143 lw \tmp, (THREAD_FPU + 0x100)(\thread)
144 lwc1 $f0, (THREAD_FPU + 0x000)(\thread)
145 lwc1 $f1, (THREAD_FPU + 0x008)(\thread)
146 lwc1 $f2, (THREAD_FPU + 0x010)(\thread)
147 lwc1 $f3, (THREAD_FPU + 0x018)(\thread)
148 lwc1 $f4, (THREAD_FPU + 0x020)(\thread)
149 lwc1 $f5, (THREAD_FPU + 0x028)(\thread)
150 lwc1 $f6, (THREAD_FPU + 0x030)(\thread)
151 lwc1 $f7, (THREAD_FPU + 0x038)(\thread)
152 lwc1 $f8, (THREAD_FPU + 0x040)(\thread)
153 lwc1 $f9, (THREAD_FPU + 0x048)(\thread)
154 lwc1 $f10, (THREAD_FPU + 0x050)(\thread)
155 lwc1 $f11, (THREAD_FPU + 0x058)(\thread)
156 lwc1 $f12, (THREAD_FPU + 0x060)(\thread)
157 lwc1 $f13, (THREAD_FPU + 0x068)(\thread)
158 lwc1 $f14, (THREAD_FPU + 0x070)(\thread)
159 lwc1 $f15, (THREAD_FPU + 0x078)(\thread)
160 lwc1 $f16, (THREAD_FPU + 0x080)(\thread)
161 lwc1 $f17, (THREAD_FPU + 0x088)(\thread)
162 lwc1 $f18, (THREAD_FPU + 0x090)(\thread)
163 lwc1 $f19, (THREAD_FPU + 0x098)(\thread)
164 lwc1 $f20, (THREAD_FPU + 0x0a0)(\thread)
165 lwc1 $f21, (THREAD_FPU + 0x0a8)(\thread)
166 lwc1 $f22, (THREAD_FPU + 0x0b0)(\thread)
167 lwc1 $f23, (THREAD_FPU + 0x0b8)(\thread)
168 lwc1 $f24, (THREAD_FPU + 0x0c0)(\thread)
169 lwc1 $f25, (THREAD_FPU + 0x0c8)(\thread)
170 lwc1 $f26, (THREAD_FPU + 0x0d0)(\thread)
171 lwc1 $f27, (THREAD_FPU + 0x0d8)(\thread)
172 lwc1 $f28, (THREAD_FPU + 0x0e0)(\thread)
173 lwc1 $f29, (THREAD_FPU + 0x0e8)(\thread)
174 lwc1 $f30, (THREAD_FPU + 0x0f0)(\thread)
175 lwc1 $f31, (THREAD_FPU + 0x0f8)(\thread)
176 ctc1 \tmp, fcr31
177 .endm
179 .macro cpu_save_nonscratch thread
180 sd s0, THREAD_REG16(\thread)
181 sd s1, THREAD_REG17(\thread)
182 sd s2, THREAD_REG18(\thread)
183 sd s3, THREAD_REG19(\thread)
184 sd s4, THREAD_REG20(\thread)
185 sd s5, THREAD_REG21(\thread)
186 sd s6, THREAD_REG22(\thread)
187 sd s7, THREAD_REG23(\thread)
188 sd sp, THREAD_REG29(\thread)
189 sd fp, THREAD_REG30(\thread)
190 .endm
192 .macro cpu_restore_nonscratch thread
193 ld s0, THREAD_REG16(\thread)
194 ld s1, THREAD_REG17(\thread)
195 ld s2, THREAD_REG18(\thread)
196 ld s3, THREAD_REG19(\thread)
197 ld s4, THREAD_REG20(\thread)
198 ld s5, THREAD_REG21(\thread)
199 ld s6, THREAD_REG22(\thread)
200 ld s7, THREAD_REG23(\thread)
201 ld sp, THREAD_REG29(\thread)
202 ld fp, THREAD_REG30(\thread)
203 ld ra, THREAD_REG31(\thread)
204 .endm
206 #endif /* !(_ASM_ASMMACRO_H) */