drivers/isdn/hisax/nj_u.c

   1 /* $Id: nj_u.c,v 2.8.6.6 2001/09/23 22:24:50 kai Exp $
   2  *
   3  * This software may be used and distributed according to the terms
   4  * of the GNU General Public License, incorporated herein by reference.
   5  *
   6  */
   7
   8 #include <linux/config.h>
   9 #include <linux/init.h>
  10 #include "hisax.h"
  11 #include "icc.h"
  12 #include "isdnl1.h"
  13 #include <linux/pci.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/ppp_defs.h>
  16 #include "netjet.h"
  17
  18 const char *NETjet_U_revision = "$Revision: 2.8.6.6 $";
  19
  20 static irqreturn_t
  21 nj_u_interrupt(int intno, void *dev_id, struct pt_regs *regs)
  22 {
  23         struct IsdnCardState *cs = dev_id;
  24         u8 val, sval;
  25
  26         spin_lock(&cs->lock);
  27         if (!((sval = bytein(cs->hw.njet.base + NETJET_IRQSTAT1)) &
  28                 NETJET_ISACIRQ)) {
  29                 val = NETjet_ReadIC(cs, ICC_ISTA);
  30                 if (cs->debug & L1_DEB_ISAC)
  31                         debugl1(cs, "tiger: i1 %x %x", sval, val);
  32                 if (val) {
  33                         icc_interrupt(cs, val);
  34                         NETjet_WriteIC(cs, ICC_MASK, 0xFF);
  35                         NETjet_WriteIC(cs, ICC_MASK, 0x0);
  36                 }
  37         }
  38         /* start new code 13/07/00 GE */
  39         /* set bits in sval to indicate which page is free */
  40         if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
  41                 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
  42                 /* the 2nd write page is free */
  43                 sval = 0x08;
  44         else    /* the 1st write page is free */
  45                 sval = 0x04;
  46         if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
  47                 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
  48                 /* the 2nd read page is free */
  49                 sval = sval | 0x02;
  50         else    /* the 1st read page is free */
  51                 sval = sval | 0x01;
  52         if (sval != cs->hw.njet.last_is0) /* we have a DMA interrupt */
  53         {
  54                 cs->hw.njet.irqstat0 = sval;
  55                 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
  56                         (cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
  57                         /* we have a read dma int */
  58                         read_tiger(cs);
  59                 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
  60                         (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
  61                         /* we have a write dma int */
  62                         write_tiger(cs);
  63                 /* end new code 13/07/00 GE */
  64         }
  65 /*      if (!testcnt--) {
  66                 cs->hw.njet.dmactrl = 0;
  67                 byteout(cs->hw.njet.base + NETJET_DMACTRL,
  68                         cs->hw.njet.dmactrl);
  69                 byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0);
  70         }
  71 */
  72         spin_unlock(&cs->lock);
  73         return IRQ_HANDLED;
  74 }
  75
  76 static int
  77 nj_u_reset(struct IsdnCardState *cs)
  78 {
  79         cs->hw.njet.ctrl_reg = 0xff;  /* Reset On */
  80         byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
  81         set_current_state(TASK_UNINTERRUPTIBLE);
  82         schedule_timeout((10*HZ)/1000); /* Timeout 10ms */
  83         cs->hw.njet.ctrl_reg = 0x40;  /* Reset Off and status read clear */
  84         /* now edge triggered for TJ320 GE 13/07/00 */
  85         byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
  86         set_current_state(TASK_UNINTERRUPTIBLE);
  87         schedule_timeout((10*HZ)/1000); /* Timeout 10ms */
  88
  89         cs->hw.njet.auxd = 0xC0;
  90         cs->hw.njet.dmactrl = 0;
  91         byteout(cs->hw.njet.auxa, 0);
  92         byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
  93         byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
  94         byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
  95         return 0;
  96 }
  97
  98 static void
  99 nj_u_init(struct IsdnCardState *cs)
 100 {
 101         inittiger(cs);
 102         initicc(cs);
 103         /* Reenable all IRQ */
 104         NETjet_WriteIC(cs, ICC_MASK, 0);
 105 }
 106
 107 static struct card_ops nj_u_ops = {
 108         .init     = nj_u_init,
 109         .reset    = nj_u_reset,
 110         .release  = netjet_release,
 111         .irq_func = nj_u_interrupt,
 112 };
 113
 114 static int __init
 115 nj_u_probe(struct IsdnCardState *cs, struct pci_dev *pdev)
 116 {
 117         if (pci_enable_device(pdev))
 118                 goto err;
 119
 120         pci_set_master(pdev);
 121
 122         cs->irq = pdev->irq;
 123         cs->irq_flags |= SA_SHIRQ;
 124         cs->hw.njet.pdev = pdev;
 125         cs->hw.njet.base = pci_resource_start(pdev, 0);
 126         if (!request_io(&cs->rs, cs->hw.njet.base, 0x100, "netspider-u isdn"))
 127                 goto err;
 128
 129         cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
 130         cs->hw.njet.isac = cs->hw.njet.base | NETJET_ISAC_OFF;
 131
 132         cs->hw.njet.ctrl_reg = 0xff;  /* Reset On */
 133         byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
 134
 135         set_current_state(TASK_UNINTERRUPTIBLE);
 136         schedule_timeout((10*HZ)/1000); /* Timeout 10ms */
 137
 138         cs->hw.njet.ctrl_reg = 0x00;  /* Reset Off and status read clear */
 139         byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
 140
 141         set_current_state(TASK_UNINTERRUPTIBLE);
 142         schedule_timeout((10*HZ)/1000); /* Timeout 10ms */
 143
 144         cs->hw.njet.auxd = 0xC0;
 145         cs->hw.njet.dmactrl = 0;
 146
 147         byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
 148         byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
 149         byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
 150
 151         switch ((NETjet_ReadIC(cs, ICC_RBCH) >> 5) & 3) {
 152         case 3:
 153                 break;
 154         case 0:
 155                 printk(KERN_WARNING "NETspider-U: NETjet-S PCI card found\n" );
 156                 goto err;
 157         default:
 158                 printk(KERN_WARNING "NETspider-U: No PCI card found\n" );
 159                 goto err;
 160         }
 161         printk(KERN_INFO "NETspider-U: PCI card configured at %#lx IRQ %d\n",
 162                cs->hw.njet.base, cs->irq);
 163
 164         nj_u_reset(cs);
 165         cs->card_ops = &nj_u_ops;
 166         icc_setup(cs, &netjet_dc_ops);
 167         return 0;
 168  err:
 169         hisax_release_resources(cs);
 170         return -EBUSY;
 171 }
 172
 173 static struct pci_dev *dev_netjet __initdata = NULL;
 174
 175 int __init
 176 setup_netjet_u(struct IsdnCard *card)
 177 {
 178         char tmp[64];
 179 #ifdef __BIG_ENDIAN
 180 #error "not running on big endian machines now"
 181 #endif
 182         strcpy(tmp, NETjet_U_revision);
 183         printk(KERN_INFO "HiSax: Traverse Tech. NETspider-U driver Rev. %s\n",
 184                HiSax_getrev(tmp));
 185
 186         dev_netjet = pci_find_device(PCI_VENDOR_ID_TIGERJET,
 187                                      PCI_DEVICE_ID_TIGERJET_300, dev_netjet);
 188         if (dev_netjet) {
 189                 if (nj_u_probe(card->cs, dev_netjet))
 190                         return 1;
 191                 return 0;
 192         }
 193         printk(KERN_WARNING "NETspider-U: No PCI card found\n");
 194         return 0;
 195 }