Hopefully get the Kconfig PCI stuff right, finally.
[linux-2.6/linux-mips.git] / drivers / isdn / hisax / bkm_a8.c
blob1d8b2c0beac508ea3b67a93859b7b9514cf49819
1 /* $Id: bkm_a8.c,v 1.14.6.7 2001/09/23 22:24:46 kai Exp $
3 * low level stuff for Scitel Quadro (4*S0, passive)
5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
7 *
8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference.
13 #include <linux/config.h>
14 #include <linux/init.h>
15 #include "hisax.h"
16 #include "isac.h"
17 #include "ipac.h"
18 #include "hscx.h"
19 #include "isdnl1.h"
20 #include <linux/pci.h>
21 #include "bkm_ax.h"
23 #define ATTEMPT_PCI_REMAPPING /* Required for PLX rev 1 */
25 extern const char *CardType[];
26 static spinlock_t bkm_a8_lock = SPIN_LOCK_UNLOCKED;
27 const char sct_quadro_revision[] = "$Revision: 1.14.6.7 $";
29 static const char *sct_quadro_subtypes[] =
31 "",
32 "#1",
33 "#2",
34 "#3",
35 "#4"
39 #define wordout(addr,val) outw(val,addr)
40 #define wordin(addr) inw(addr)
42 static inline u8
43 ipac_read(struct IsdnCardState *cs, u8 off)
45 u8 ret;
46 unsigned long flags;
48 spin_lock_irqsave(&bkm_a8_lock, flags);
49 wordout(cs->hw.ax.base, off);
50 ret = wordin(cs->hw.ax.data_adr) & 0xFF;
51 spin_unlock_irqrestore(&bkm_a8_lock, flags);
52 return ret;
55 static inline void
56 ipac_write(struct IsdnCardState *cs, u8 off, u8 data)
58 unsigned long flags;
60 spin_lock_irqsave(&bkm_a8_lock, flags);
61 wordout(cs->hw.ax.base, off);
62 wordout(cs->hw.ax.data_adr, data);
63 spin_unlock_irqrestore(&bkm_a8_lock, flags);
66 static inline void
67 ipac_readfifo(struct IsdnCardState *cs, u8 off, u8 *data, int size)
69 int i;
71 wordout(cs->hw.ax.base, off);
72 for (i = 0; i < size; i++)
73 data[i] = wordin(cs->hw.ax.data_adr) & 0xFF;
76 static inline void
77 ipac_writefifo(struct IsdnCardState *cs, u8 off, u8 *data, int size)
79 int i;
81 wordout(cs->hw.ax.base, off);
82 for (i = 0; i < size; i++)
83 wordout(cs->hw.ax.data_adr, data[i]);
86 /* This will generate ipac_dc_ops and ipac_bc_ops using the functions
87 * above */
89 BUILD_IPAC_OPS(ipac);
91 /* Set the specific ipac to active */
92 static void
93 set_ipac_active(struct IsdnCardState *cs, u_int active)
95 /* set irq mask */
96 ipac_write(cs, IPAC_MASK, active ? 0xc0 : 0xff);
99 static void
100 enable_bkm_int(struct IsdnCardState *cs, unsigned bEnable)
102 if (bEnable)
103 wordout(cs->hw.ax.plx_adr + 0x4C, (wordin(cs->hw.ax.plx_adr + 0x4C) | 0x41));
104 else
105 wordout(cs->hw.ax.plx_adr + 0x4C, (wordin(cs->hw.ax.plx_adr + 0x4C) & ~0x41));
108 static void
109 reset_bkm(struct IsdnCardState *cs)
111 if (cs->subtyp == SCT_1) {
112 wordout(cs->hw.ax.plx_adr + 0x50, (wordin(cs->hw.ax.plx_adr + 0x50) & ~4));
113 set_current_state(TASK_UNINTERRUPTIBLE);
114 schedule_timeout((10 * HZ) / 1000);
115 /* Remove the soft reset */
116 wordout(cs->hw.ax.plx_adr + 0x50, (wordin(cs->hw.ax.plx_adr + 0x50) | 4));
117 set_current_state(TASK_UNINTERRUPTIBLE);
118 schedule_timeout((10 * HZ) / 1000);
122 static void
123 bkm_a8_init(struct IsdnCardState *cs)
125 cs->debug |= L1_DEB_IPAC;
126 set_ipac_active(cs, 1);
127 ipac_init(cs);
128 /* Enable ints */
129 enable_bkm_int(cs, 1);
132 static int
133 bkm_a8_reset(struct IsdnCardState *cs)
135 /* Disable ints */
136 set_ipac_active(cs, 0);
137 enable_bkm_int(cs, 0);
138 reset_bkm(cs);
139 return 0;
142 static void
143 bkm_a8_release(struct IsdnCardState *cs)
145 set_ipac_active(cs, 0);
146 enable_bkm_int(cs, 0);
147 hisax_release_resources(cs);
150 static struct card_ops bkm_a8_ops = {
151 .init = bkm_a8_init,
152 .reset = bkm_a8_reset,
153 .release = bkm_a8_release,
154 .irq_func = ipac_irq,
157 static struct pci_dev *dev_a8 __initdata = NULL;
158 static u16 sub_vendor_id __initdata = 0;
159 static u16 sub_sys_id __initdata = 0;
160 static u8 pci_irq __initdata = 0;
162 int __init
163 setup_sct_quadro(struct IsdnCard *card)
165 struct IsdnCardState *cs = card->cs;
166 char tmp[64];
167 u8 pci_rev_id;
168 u_int found = 0;
169 u_int pci_ioaddr1, pci_ioaddr2, pci_ioaddr3, pci_ioaddr4, pci_ioaddr5;
171 strcpy(tmp, sct_quadro_revision);
172 printk(KERN_INFO "HiSax: T-Berkom driver Rev. %s\n", HiSax_getrev(tmp));
173 /* Identify subtype by para[0] */
174 if (card->para[0] >= SCT_1 && card->para[0] <= SCT_4)
175 cs->subtyp = card->para[0];
176 else {
177 printk(KERN_WARNING "HiSax: %s: Invalid subcontroller in configuration, default to 1\n",
178 CardType[card->typ]);
179 return (0);
181 if ((cs->subtyp != SCT_1) && ((sub_sys_id != PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) ||
182 (sub_vendor_id != PCI_VENDOR_ID_BERKOM)))
183 return (0);
184 if (cs->subtyp == SCT_1) {
185 while ((dev_a8 = pci_find_device(PCI_VENDOR_ID_PLX,
186 PCI_DEVICE_ID_PLX_9050, dev_a8))) {
188 sub_vendor_id = dev_a8->subsystem_vendor;
189 sub_sys_id = dev_a8->subsystem_device;
190 if ((sub_sys_id == PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) &&
191 (sub_vendor_id == PCI_VENDOR_ID_BERKOM)) {
192 if (pci_enable_device(dev_a8))
193 return(0);
194 pci_ioaddr1 = pci_resource_start(dev_a8, 1);
195 pci_irq = dev_a8->irq;
196 found = 1;
197 break;
200 if (!found) {
201 printk(KERN_WARNING "HiSax: %s (%s): Card not found\n",
202 CardType[card->typ],
203 sct_quadro_subtypes[cs->subtyp]);
204 return (0);
206 #ifdef ATTEMPT_PCI_REMAPPING
207 /* HACK: PLX revision 1 bug: PLX address bit 7 must not be set */
208 pci_read_config_byte(dev_a8, PCI_REVISION_ID, &pci_rev_id);
209 if ((pci_ioaddr1 & 0x80) && (pci_rev_id == 1)) {
210 printk(KERN_WARNING "HiSax: %s (%s): PLX rev 1, remapping required!\n",
211 CardType[card->typ],
212 sct_quadro_subtypes[cs->subtyp]);
213 /* Restart PCI negotiation */
214 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, (u_int) - 1);
215 /* Move up by 0x80 byte */
216 pci_ioaddr1 += 0x80;
217 pci_ioaddr1 &= PCI_BASE_ADDRESS_IO_MASK;
218 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, pci_ioaddr1);
219 dev_a8->resource[ 1].start = pci_ioaddr1;
221 #endif /* End HACK */
223 if (!pci_irq) { /* IRQ range check ?? */
224 printk(KERN_WARNING "HiSax: %s (%s): No IRQ\n",
225 CardType[card->typ],
226 sct_quadro_subtypes[cs->subtyp]);
227 return (0);
229 pci_read_config_dword(dev_a8, PCI_BASE_ADDRESS_1, &pci_ioaddr1);
230 pci_read_config_dword(dev_a8, PCI_BASE_ADDRESS_2, &pci_ioaddr2);
231 pci_read_config_dword(dev_a8, PCI_BASE_ADDRESS_3, &pci_ioaddr3);
232 pci_read_config_dword(dev_a8, PCI_BASE_ADDRESS_4, &pci_ioaddr4);
233 pci_read_config_dword(dev_a8, PCI_BASE_ADDRESS_5, &pci_ioaddr5);
234 if (!pci_ioaddr1 || !pci_ioaddr2 || !pci_ioaddr3 || !pci_ioaddr4 || !pci_ioaddr5) {
235 printk(KERN_WARNING "HiSax: %s (%s): No IO base address(es)\n",
236 CardType[card->typ],
237 sct_quadro_subtypes[cs->subtyp]);
238 return (0);
240 pci_ioaddr1 &= PCI_BASE_ADDRESS_IO_MASK;
241 pci_ioaddr2 &= PCI_BASE_ADDRESS_IO_MASK;
242 pci_ioaddr3 &= PCI_BASE_ADDRESS_IO_MASK;
243 pci_ioaddr4 &= PCI_BASE_ADDRESS_IO_MASK;
244 pci_ioaddr5 &= PCI_BASE_ADDRESS_IO_MASK;
245 /* Take over */
246 cs->irq = pci_irq;
247 cs->irq_flags |= SA_SHIRQ;
248 /* pci_ioaddr1 is unique to all subdevices */
249 /* pci_ioaddr2 is for the fourth subdevice only */
250 /* pci_ioaddr3 is for the third subdevice only */
251 /* pci_ioaddr4 is for the second subdevice only */
252 /* pci_ioaddr5 is for the first subdevice only */
253 cs->hw.ax.plx_adr = pci_ioaddr1;
254 /* Enter all ipac_base addresses */
255 switch(cs->subtyp) {
256 case 1:
257 cs->hw.ax.base = pci_ioaddr5 + 0x00;
258 if (!request_io(&cs->rs, pci_ioaddr1, 128, "scitel"))
259 goto err;
260 if (!request_io(&cs->rs, pci_ioaddr5, 64, "scitel"))
261 goto err;
262 break;
263 case 2:
264 cs->hw.ax.base = pci_ioaddr4 + 0x08;
265 if (!request_io(&cs->rs, pci_ioaddr4, 64, "scitel"))
266 goto err;
267 break;
268 case 3:
269 cs->hw.ax.base = pci_ioaddr3 + 0x10;
270 if (!request_io(&cs->rs, pci_ioaddr3, 64, "scitel"))
271 goto err;
272 break;
273 case 4:
274 cs->hw.ax.base = pci_ioaddr2 + 0x20;
275 if (!request_io(&cs->rs, pci_ioaddr2, 64, "scitel"))
276 goto err;
277 break;
279 cs->hw.ax.data_adr = cs->hw.ax.base + 4;
280 ipac_write(cs, IPAC_MASK, 0xFF);
282 printk(KERN_INFO "HiSax: %s (%s) configured at 0x%.4lX, 0x%.4lX, 0x%.4lX and IRQ %d\n",
283 CardType[card->typ],
284 sct_quadro_subtypes[cs->subtyp],
285 cs->hw.ax.plx_adr,
286 cs->hw.ax.base,
287 cs->hw.ax.data_adr,
288 cs->irq);
290 cs->card_ops = &bkm_a8_ops;
291 if (ipac_setup(cs, &ipac_dc_ops, &ipac_bc_ops))
292 goto err;
294 return 1;
295 err:
296 hisax_release_resources(cs);
297 return 0;