include/asm-mips64/asm.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
   7  * Copyright (C) 1999 by Silicon Graphics, Inc.
   8  * Copyright (C) 2001 MIPS Technologies, Inc.
   9  * Copyright (C) 2002  Maciej W. Rozycki
  10  *
  11  * Some useful macros for MIPS assembler code
  12  *
  13  * Some of the routines below contain useless nops that will be optimized
  14  * away by gas in -O mode. These nops are however required to fill delay
  15  * slots in noreorder mode.
  16  */
  17 #ifndef __ASM_ASM_H
  18 #define __ASM_ASM_H
  19
  20 #include <asm/sgidefs.h>
  21
  22 /*
  23  * PIC specific declarations
  24  * Not used for the kernel but here seems to be the right place.
  25  */
  26 #ifdef __PIC__
  27 #define CPRESTORE(register)                             \
  28                 .cprestore register
  29 #define CPADD(register)                                 \
  30                 .cpadd  register
  31 #define CPLOAD(register)                                \
  32                 .cpload register
  33 #else
  34 #define CPRESTORE(register)
  35 #define CPADD(register)
  36 #define CPLOAD(register)
  37 #endif
  38
  39 /*
  40  * LEAF - declare leaf routine
  41  */
  42 #define LEAF(symbol)                                    \
  43                 .globl  symbol;                         \
  44                 .align  2;                              \
  45                 .type   symbol,@function;               \
  46                 .ent    symbol,0;                       \
  47 symbol:         .frame  sp,0,ra
  48
  49 /*
  50  * NESTED - declare nested routine entry point
  51  */
  52 #define NESTED(symbol, framesize, rpc)                  \
  53                 .globl  symbol;                         \
  54                 .align  2;                              \
  55                 .type   symbol,@function;               \
  56                 .ent    symbol,0;                       \
  57 symbol:         .frame  sp, framesize, rpc
  58
  59 /*
  60  * END - mark end of function
  61  */
  62 #define END(function)                                   \
  63                 .end    function;                       \
  64                 .size   function,.-function
  65
  66 /*
  67  * EXPORT - export definition of symbol
  68  */
  69 #define EXPORT(symbol)                                  \
  70                 .globl  symbol;                         \
  71 symbol:
  72
  73 /*
  74  * FEXPORT - export definition of a function symbol
  75  */
  76 #define FEXPORT(symbol)                                 \
  77                 .globl  symbol;                         \
  78                 .type   symbol,@function;               \
  79 symbol:
  80
  81 /*
  82  * ABS - export absolute symbol
  83  */
  84 #define ABS(symbol,value)                               \
  85                 .globl  symbol;                         \
  86 symbol          =       value
  87
  88 #define PANIC(msg)                                      \
  89                 .set    push;                           \
  90                 .set    reorder;                        \
  91                 PTR_LA  a0,8f;                          \
  92                 jal     panic;                          \
  93 9:              b       9b;                             \
  94                 .set    pop;                            \
  95                 TEXT(msg)
  96
  97 /*
  98  * Print formatted string
  99  */
 100 #define PRINT(string)                                   \
 101                 .set    push;                           \
 102                 .set    reorder;                        \
 103                 PTR_LA  a0,8f;                          \
 104                 jal     printk;                         \
 105                 .set    pop;                            \
 106                 TEXT(string)
 107
 108 #define TEXT(msg)                                       \
 109                 .pushsection .data;                     \
 110 8:              .asciiz msg;                            \
 111                 .popsection;
 112
 113 /*
 114  * Build text tables
 115  */
 116 #define TTABLE(string)                                  \
 117                 .pushsection .text;                     \
 118                 .word   1f;                             \
 119                 .popsection                             \
 120                 .pushsection .data;                     \
 121 1:              .asciiz string;                         \
 122                 .popsection
 123
 124 /*
 125  * MIPS IV pref instruction.
 126  * Use with .set noreorder only!
 127  *
 128  * MIPS IV implementations are free to treat this as a nop.  The R5000
 129  * is one of them.  So we should have an option not to use this instruction.
 130  */
 131 #ifdef CONFIG_CPU_HAS_PREFETCH
 132
 133 #define PREF(hint,addr)                                 \
 134                 pref    hint,addr
 135
 136 #define PREFX(hint,addr)                                \
 137                 prefx   hint,addr
 138
 139 #else /* !CONFIG_CPU_HAS_PREFETCH */
 140
 141 #define PREF(hint,addr)
 142 #define PREFX(hint,addr)
 143
 144 #endif /* !CONFIG_CPU_HAS_PREFETCH */
 145
 146 /*
 147  * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
 148  */
 149 #if (_MIPS_ISA == _MIPS_ISA_MIPS1)
 150 #define MOVN(rd,rs,rt)                                  \
 151                 .set    push;                           \
 152                 .set    reorder;                        \
 153                 beqz    rt,9f;                          \
 154                 move    rd,rs;                          \
 155                 .set    pop;                            \
 156 9:
 157 #define MOVZ(rd,rs,rt)                                  \
 158                 .set    push;                           \
 159                 .set    reorder;                        \
 160                 bnez    rt,9f;                          \
 161                 move    rd,rs;                          \
 162                 .set    pop;                            \
 163 9:
 164 #endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */
 165 #if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3)
 166 #define MOVN(rd,rs,rt)                                  \
 167                 .set    push;                           \
 168                 .set    noreorder;                      \
 169                 bnezl   rt,9f;                          \
 170                  move   rd,rs;                          \
 171                 .set    pop;                            \
 172 9:
 173 #define MOVZ(rd,rs,rt)                                  \
 174                 .set    push;                           \
 175                 .set    noreorder;                      \
 176                 beqzl   rt,9f;                          \
 177                  move   rd,rs;                          \
 178                 .set    pop;                            \
 179 9:
 180 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
 181 #if (_MIPS_ISA == _MIPS_ISA_MIPS4 ) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
 182     (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 183 #define MOVN(rd,rs,rt)                                  \
 184                 movn    rd,rs,rt
 185 #define MOVZ(rd,rs,rt)                                  \
 186                 movz    rd,rs,rt
 187 #endif /* MIPS IV, MIPS V, MIPS32 or MIPS64 */
 188
 189 /*
 190  * Stack alignment
 191  */
 192 #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
 193     (_MIPS_ISA == _MIPS_ISA_MIPS32)
 194 #define ALSZ    7
 195 #define ALMASK  ~7
 196 #endif
 197 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
 198     (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 199 #define ALSZ    15
 200 #define ALMASK  ~15
 201 #endif
 202
 203 /*
 204  * Macros to handle different pointer/register sizes for 32/64-bit code
 205  */
 206
 207 /*
 208  * Size of a register
 209  */
 210 #ifdef __mips64
 211 #define SZREG   8
 212 #else
 213 #define SZREG   4
 214 #endif
 215
 216 /*
 217  * Use the following macros in assemblercode to load/store registers,
 218  * pointers etc.
 219  */
 220 #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
 221     (_MIPS_ISA == _MIPS_ISA_MIPS32)
 222 #define REG_S           sw
 223 #define REG_L           lw
 224 #define REG_SUBU        subu
 225 #define REG_ADDU        addu
 226 #endif
 227 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
 228     (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 229 #define REG_S           sd
 230 #define REG_L           ld
 231 #define REG_SUBU        dsubu
 232 #define REG_ADDU        daddu
 233 #endif
 234
 235 /*
 236  * How to add/sub/load/store/shift C int variables.
 237  */
 238 #if (_MIPS_SZINT == 32)
 239 #define INT_ADD         add
 240 #define INT_ADDU        addu
 241 #define INT_ADDI        addi
 242 #define INT_ADDIU       addiu
 243 #define INT_SUB         sub
 244 #define INT_SUBU        subu
 245 #define INT_L           lw
 246 #define INT_S           sw
 247 #define INT_SLL         sll
 248 #define INT_SLLV        sllv
 249 #define INT_SRL         srl
 250 #define INT_SRLV        srlv
 251 #define INT_SRA         sra
 252 #define INT_SRAV        srav
 253 #endif
 254
 255 #if (_MIPS_SZINT == 64)
 256 #define INT_ADD         dadd
 257 #define INT_ADDU        daddu
 258 #define INT_ADDI        daddi
 259 #define INT_ADDIU       daddiu
 260 #define INT_SUB         dsub
 261 #define INT_SUBU        dsubu
 262 #define INT_L           ld
 263 #define INT_S           sd
 264 #define INT_SLL         dsll
 265 #define INT_SLLV        dsllv
 266 #define INT_SRL         dsrl
 267 #define INT_SRLV        dsrlv
 268 #define INT_SRA         dsra
 269 #define INT_SRAV        dsrav
 270 #endif
 271
 272 /*
 273  * How to add/sub/load/store/shift C long variables.
 274  */
 275 #if (_MIPS_SZLONG == 32)
 276 #define LONG_ADD        add
 277 #define LONG_ADDU       addu
 278 #define LONG_ADDI       addi
 279 #define LONG_ADDIU      addiu
 280 #define LONG_SUB        sub
 281 #define LONG_SUBU       subu
 282 #define LONG_L          lw
 283 #define LONG_S          sw
 284 #define LONG_SLL        sll
 285 #define LONG_SLLV       sllv
 286 #define LONG_SRL        srl
 287 #define LONG_SRLV       srlv
 288 #define LONG_SRA        sra
 289 #define LONG_SRAV       srav
 290
 291 #define LONG            .word
 292 #define LONGSIZE        4
 293 #define LONGLOG         2
 294 #endif
 295
 296 #if (_MIPS_SZLONG == 64)
 297 #define LONG_ADD        dadd
 298 #define LONG_ADDU       daddu
 299 #define LONG_ADDI       daddi
 300 #define LONG_ADDIU      daddiu
 301 #define LONG_SUB        dsub
 302 #define LONG_SUBU       dsubu
 303 #define LONG_L          ld
 304 #define LONG_S          sd
 305 #define LONG_SLL        dsll
 306 #define LONG_SLLV       dsllv
 307 #define LONG_SRL        dsrl
 308 #define LONG_SRLV       dsrlv
 309 #define LONG_SRA        dsra
 310 #define LONG_SRAV       dsrav
 311
 312 #define LONG            .dword
 313 #define LONGSIZE        8
 314 #define LONGLOG         3
 315 #endif
 316
 317 /*
 318  * How to add/sub/load/store/shift pointers.
 319  */
 320 #if (_MIPS_SZPTR == 32)
 321 #define PTR_ADD         add
 322 #define PTR_ADDU        addu
 323 #define PTR_ADDI        addi
 324 #define PTR_ADDIU       addiu
 325 #define PTR_SUB         sub
 326 #define PTR_SUBU        subu
 327 #define PTR_L           lw
 328 #define PTR_S           sw
 329 #define PTR_LA          la
 330 #define PTR_SLL         sll
 331 #define PTR_SLLV        sllv
 332 #define PTR_SRL         srl
 333 #define PTR_SRLV        srlv
 334 #define PTR_SRA         sra
 335 #define PTR_SRAV        srav
 336
 337 #define PTR_SCALESHIFT  2
 338
 339 #define PTR             .word
 340 #define PTRSIZE         4
 341 #define PTRLOG          2
 342 #endif
 343
 344 #if (_MIPS_SZPTR == 64)
 345 #define PTR_ADD         dadd
 346 #define PTR_ADDU        daddu
 347 #define PTR_ADDI        daddi
 348 #define PTR_ADDIU       daddiu
 349 #define PTR_SUB         dsub
 350 #define PTR_SUBU        dsubu
 351 #define PTR_L           ld
 352 #define PTR_S           sd
 353 #define PTR_LA          dla
 354 #define PTR_SLL         dsll
 355 #define PTR_SLLV        dsllv
 356 #define PTR_SRL         dsrl
 357 #define PTR_SRLV        dsrlv
 358 #define PTR_SRA         dsra
 359 #define PTR_SRAV        dsrav
 360
 361 #define PTR_SCALESHIFT  3
 362
 363 #define PTR             .dword
 364 #define PTRSIZE         8
 365 #define PTRLOG          3
 366 #endif
 367
 368 /*
 369  * Some cp0 registers were extended to 64bit for MIPS III.
 370  */
 371 #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
 372     (_MIPS_ISA == _MIPS_ISA_MIPS32)
 373 #define MFC0            mfc0
 374 #define MTC0            mtc0
 375 #endif
 376 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
 377     (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
 378 #define MFC0            dmfc0
 379 #define MTC0            dmtc0
 380 #endif
 381
 382 #define SSNOP           sll zero,zero,1
 383
 384 #endif /* __ASM_ASM_H */