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Merge with Linux 2.5.72.
[linux-2.6/linux-mips.git] / include / asm-ia64 / sn / sn1 / hubni.h
blob6bfc241fac8ff3d6b03d4131fb43b41ccfbf6f37
1 /* $Id$
2 *
3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
5 * for more details.
6 *
7 * Copyright (C) 1992 - 1997, 2000-2001 Silicon Graphics, Inc. All rights reserved.
8 */
9 #ifndef _ASM_IA64_SN_SN1_HUBNI_H
10 #define _ASM_IA64_SN_SN1_HUBNI_H
11
12
13 /************************************************************************
14 * *
15 * WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! *
16 * *
17 * This file is created by an automated script. Any (minimal) changes *
18 * made manually to this file should be made with care. *
19 * *
20 * MAKE ALL ADDITIONS TO THE END OF THIS FILE *
21 * *
22 ************************************************************************/
23
24 #define NI_PORT_STATUS 0x00680000 /* LLP Status */
25
26
27
28 #define NI_PORT_RESET 0x00680008 /*
29 * Reset the Network
30 * Interface
31 */
32
33
34
35 #define NI_RESET_ENABLE 0x00680010 /* Warm Reset Enable */
36
37
38
39 #define NI_DIAG_PARMS 0x00680018 /*
40 * Diagnostic
41 * Parameters
42 */
43
44
45
46 #define NI_CHANNEL_CONTROL 0x00680020 /*
47 * Virtual channel
48 * control
49 */
50
51
52
53 #define NI_CHANNEL_TEST 0x00680028 /* LLP Test Control. */
54
55
56
57 #define NI_PORT_PARMS 0x00680030 /* LLP Parameters */
58
59
60
61 #define NI_CHANNEL_AGE 0x00680038 /*
62 * Network age
63 * injection control
64 */
65
66
67
68 #define NI_PORT_ERRORS 0x00680100 /* Errors */
69
70
71
72 #define NI_PORT_HEADER_A 0x00680108 /*
73 * Error Header first
74 * half
75 */
76
77
78
79 #define NI_PORT_HEADER_B 0x00680110 /*
80 * Error Header second
81 * half
82 */
83
84
85
86 #define NI_PORT_SIDEBAND 0x00680118 /* Error Sideband */
87
88
89
90 #define NI_PORT_ERROR_CLEAR 0x00680120 /*
91 * Clear the Error
92 * bits
93 */
94
95
96
97 #define NI_LOCAL_TABLE_0 0x00681000 /*
98 * Base of Local
99 * Mapping Table 0-127
100 */
101
102
103
104 #define NI_LOCAL_TABLE_1 0x00681008 /*
105 * Base of Local
106 * Mapping Table 0-127
107 */
108
109
110
111 #define NI_LOCAL_TABLE_2 0x00681010 /*
112 * Base of Local
113 * Mapping Table 0-127
114 */
115
116
117
118 #define NI_LOCAL_TABLE_3 0x00681018 /*
119 * Base of Local
120 * Mapping Table 0-127
121 */
122
123
124
125 #define NI_LOCAL_TABLE_4 0x00681020 /*
126 * Base of Local
127 * Mapping Table 0-127
128 */
129
130
131
132 #define NI_LOCAL_TABLE_5 0x00681028 /*
133 * Base of Local
134 * Mapping Table 0-127
135 */
136
137
138
139 #define NI_LOCAL_TABLE_6 0x00681030 /*
140 * Base of Local
141 * Mapping Table 0-127
142 */
143
144
145
146 #define NI_LOCAL_TABLE_7 0x00681038 /*
147 * Base of Local
148 * Mapping Table 0-127
149 */
150
151
152
153 #define NI_LOCAL_TABLE_8 0x00681040 /*
154 * Base of Local
155 * Mapping Table 0-127
156 */
157
158
159
160 #define NI_LOCAL_TABLE_9 0x00681048 /*
161 * Base of Local
162 * Mapping Table 0-127
163 */
164
165
166
167 #define NI_LOCAL_TABLE_10 0x00681050 /*
168 * Base of Local
169 * Mapping Table 0-127
170 */
171
172
173
174 #define NI_LOCAL_TABLE_11 0x00681058 /*
175 * Base of Local
176 * Mapping Table 0-127
177 */
178
179
180
181 #define NI_LOCAL_TABLE_12 0x00681060 /*
182 * Base of Local
183 * Mapping Table 0-127
184 */
185
186
187
188 #define NI_LOCAL_TABLE_13 0x00681068 /*
189 * Base of Local
190 * Mapping Table 0-127
191 */
192
193
194
195 #define NI_LOCAL_TABLE_14 0x00681070 /*
196 * Base of Local
197 * Mapping Table 0-127
198 */
199
200
201
202 #define NI_LOCAL_TABLE_15 0x00681078 /*
203 * Base of Local
204 * Mapping Table 0-127
205 */
206
207
208
209 #define NI_LOCAL_TABLE_16 0x00681080 /*
210 * Base of Local
211 * Mapping Table 0-127
212 */
213
214
215
216 #define NI_LOCAL_TABLE_17 0x00681088 /*
217 * Base of Local
218 * Mapping Table 0-127
219 */
220
221
222
223 #define NI_LOCAL_TABLE_18 0x00681090 /*
224 * Base of Local
225 * Mapping Table 0-127
226 */
227
228
229
230 #define NI_LOCAL_TABLE_19 0x00681098 /*
231 * Base of Local
232 * Mapping Table 0-127
233 */
234
235
236
237 #define NI_LOCAL_TABLE_20 0x006810A0 /*
238 * Base of Local
239 * Mapping Table 0-127
240 */
241
242
243
244 #define NI_LOCAL_TABLE_21 0x006810A8 /*
245 * Base of Local
246 * Mapping Table 0-127
247 */
248
249
250
251 #define NI_LOCAL_TABLE_22 0x006810B0 /*
252 * Base of Local
253 * Mapping Table 0-127
254 */
255
256
257
258 #define NI_LOCAL_TABLE_23 0x006810B8 /*
259 * Base of Local
260 * Mapping Table 0-127
261 */
262
263
264
265 #define NI_LOCAL_TABLE_24 0x006810C0 /*
266 * Base of Local
267 * Mapping Table 0-127
268 */
269
270
271
272 #define NI_LOCAL_TABLE_25 0x006810C8 /*
273 * Base of Local
274 * Mapping Table 0-127
275 */
276
277
278
279 #define NI_LOCAL_TABLE_26 0x006810D0 /*
280 * Base of Local
281 * Mapping Table 0-127
282 */
283
284
285
286 #define NI_LOCAL_TABLE_27 0x006810D8 /*
287 * Base of Local
288 * Mapping Table 0-127
289 */
290
291
292
293 #define NI_LOCAL_TABLE_28 0x006810E0 /*
294 * Base of Local
295 * Mapping Table 0-127
296 */
297
298
299
300 #define NI_LOCAL_TABLE_29 0x006810E8 /*
301 * Base of Local
302 * Mapping Table 0-127
303 */
304
305
306
307 #define NI_LOCAL_TABLE_30 0x006810F0 /*
308 * Base of Local
309 * Mapping Table 0-127
310 */
311
312
313
314 #define NI_LOCAL_TABLE_31 0x006810F8 /*
315 * Base of Local
316 * Mapping Table 0-127
317 */
318
319
320
321 #define NI_LOCAL_TABLE_32 0x00681100 /*
322 * Base of Local
323 * Mapping Table 0-127
324 */
325
326
327
328 #define NI_LOCAL_TABLE_33 0x00681108 /*
329 * Base of Local
330 * Mapping Table 0-127
331 */
332
333
334
335 #define NI_LOCAL_TABLE_34 0x00681110 /*
336 * Base of Local
337 * Mapping Table 0-127
338 */
339
340
341
342 #define NI_LOCAL_TABLE_35 0x00681118 /*
343 * Base of Local
344 * Mapping Table 0-127
345 */
346
347
348
349 #define NI_LOCAL_TABLE_36 0x00681120 /*
350 * Base of Local
351 * Mapping Table 0-127
352 */
353
354
355
356 #define NI_LOCAL_TABLE_37 0x00681128 /*
357 * Base of Local
358 * Mapping Table 0-127
359 */
360
361
362
363 #define NI_LOCAL_TABLE_38 0x00681130 /*
364 * Base of Local
365 * Mapping Table 0-127
366 */
367
368
369
370 #define NI_LOCAL_TABLE_39 0x00681138 /*
371 * Base of Local
372 * Mapping Table 0-127
373 */
374
375
376
377 #define NI_LOCAL_TABLE_40 0x00681140 /*
378 * Base of Local
379 * Mapping Table 0-127
380 */
381
382
383
384 #define NI_LOCAL_TABLE_41 0x00681148 /*
385 * Base of Local
386 * Mapping Table 0-127
387 */
388
389
390
391 #define NI_LOCAL_TABLE_42 0x00681150 /*
392 * Base of Local
393 * Mapping Table 0-127
394 */
395
396
397
398 #define NI_LOCAL_TABLE_43 0x00681158 /*
399 * Base of Local
400 * Mapping Table 0-127
401 */
402
403
404
405 #define NI_LOCAL_TABLE_44 0x00681160 /*
406 * Base of Local
407 * Mapping Table 0-127
408 */
409
410
411
412 #define NI_LOCAL_TABLE_45 0x00681168 /*
413 * Base of Local
414 * Mapping Table 0-127
415 */
416
417
418
419 #define NI_LOCAL_TABLE_46 0x00681170 /*
420 * Base of Local
421 * Mapping Table 0-127
422 */
423
424
425
426 #define NI_LOCAL_TABLE_47 0x00681178 /*
427 * Base of Local
428 * Mapping Table 0-127
429 */
430
431
432
433 #define NI_LOCAL_TABLE_48 0x00681180 /*
434 * Base of Local
435 * Mapping Table 0-127
436 */
437
438
439
440 #define NI_LOCAL_TABLE_49 0x00681188 /*
441 * Base of Local
442 * Mapping Table 0-127
443 */
444
445
446
447 #define NI_LOCAL_TABLE_50 0x00681190 /*
448 * Base of Local
449 * Mapping Table 0-127
450 */
451
452
453
454 #define NI_LOCAL_TABLE_51 0x00681198 /*
455 * Base of Local
456 * Mapping Table 0-127
457 */
458
459
460
461 #define NI_LOCAL_TABLE_52 0x006811A0 /*
462 * Base of Local
463 * Mapping Table 0-127
464 */
465
466
467
468 #define NI_LOCAL_TABLE_53 0x006811A8 /*
469 * Base of Local
470 * Mapping Table 0-127
471 */
472
473
474
475 #define NI_LOCAL_TABLE_54 0x006811B0 /*
476 * Base of Local
477 * Mapping Table 0-127
478 */
479
480
481
482 #define NI_LOCAL_TABLE_55 0x006811B8 /*
483 * Base of Local
484 * Mapping Table 0-127
485 */
486
487
488
489 #define NI_LOCAL_TABLE_56 0x006811C0 /*
490 * Base of Local
491 * Mapping Table 0-127
492 */
493
494
495
496 #define NI_LOCAL_TABLE_57 0x006811C8 /*
497 * Base of Local
498 * Mapping Table 0-127
499 */
500
501
502
503 #define NI_LOCAL_TABLE_58 0x006811D0 /*
504 * Base of Local
505 * Mapping Table 0-127
506 */
507
508
509
510 #define NI_LOCAL_TABLE_59 0x006811D8 /*
511 * Base of Local
512 * Mapping Table 0-127
513 */
514
515
516
517 #define NI_LOCAL_TABLE_60 0x006811E0 /*
518 * Base of Local
519 * Mapping Table 0-127
520 */
521
522
523
524 #define NI_LOCAL_TABLE_61 0x006811E8 /*
525 * Base of Local
526 * Mapping Table 0-127
527 */
528
529
530
531 #define NI_LOCAL_TABLE_62 0x006811F0 /*
532 * Base of Local
533 * Mapping Table 0-127
534 */
535
536
537
538 #define NI_LOCAL_TABLE_63 0x006811F8 /*
539 * Base of Local
540 * Mapping Table 0-127
541 */
542
543
544
545 #define NI_LOCAL_TABLE_64 0x00681200 /*
546 * Base of Local
547 * Mapping Table 0-127
548 */
549
550
551
552 #define NI_LOCAL_TABLE_65 0x00681208 /*
553 * Base of Local
554 * Mapping Table 0-127
555 */
556
557
558
559 #define NI_LOCAL_TABLE_66 0x00681210 /*
560 * Base of Local
561 * Mapping Table 0-127
562 */
563
564
565
566 #define NI_LOCAL_TABLE_67 0x00681218 /*
567 * Base of Local
568 * Mapping Table 0-127
569 */
570
571
572
573 #define NI_LOCAL_TABLE_68 0x00681220 /*
574 * Base of Local
575 * Mapping Table 0-127
576 */
577
578
579
580 #define NI_LOCAL_TABLE_69 0x00681228 /*
581 * Base of Local
582 * Mapping Table 0-127
583 */
584
585
586
587 #define NI_LOCAL_TABLE_70 0x00681230 /*
588 * Base of Local
589 * Mapping Table 0-127
590 */
591
592
593
594 #define NI_LOCAL_TABLE_71 0x00681238 /*
595 * Base of Local
596 * Mapping Table 0-127
597 */
598
599
600
601 #define NI_LOCAL_TABLE_72 0x00681240 /*
602 * Base of Local
603 * Mapping Table 0-127
604 */
605
606
607
608 #define NI_LOCAL_TABLE_73 0x00681248 /*
609 * Base of Local
610 * Mapping Table 0-127
611 */
612
613
614
615 #define NI_LOCAL_TABLE_74 0x00681250 /*
616 * Base of Local
617 * Mapping Table 0-127
618 */
619
620
621
622 #define NI_LOCAL_TABLE_75 0x00681258 /*
623 * Base of Local
624 * Mapping Table 0-127
625 */
626
627
628
629 #define NI_LOCAL_TABLE_76 0x00681260 /*
630 * Base of Local
631 * Mapping Table 0-127
632 */
633
634
635
636 #define NI_LOCAL_TABLE_77 0x00681268 /*
637 * Base of Local
638 * Mapping Table 0-127
639 */
640
641
642
643 #define NI_LOCAL_TABLE_78 0x00681270 /*
644 * Base of Local
645 * Mapping Table 0-127
646 */
647
648
649
650 #define NI_LOCAL_TABLE_79 0x00681278 /*
651 * Base of Local
652 * Mapping Table 0-127
653 */
654
655
656
657 #define NI_LOCAL_TABLE_80 0x00681280 /*
658 * Base of Local
659 * Mapping Table 0-127
660 */
661
662
663
664 #define NI_LOCAL_TABLE_81 0x00681288 /*
665 * Base of Local
666 * Mapping Table 0-127
667 */
668
669
670
671 #define NI_LOCAL_TABLE_82 0x00681290 /*
672 * Base of Local
673 * Mapping Table 0-127
674 */
675
676
677
678 #define NI_LOCAL_TABLE_83 0x00681298 /*
679 * Base of Local
680 * Mapping Table 0-127
681 */
682
683
684
685 #define NI_LOCAL_TABLE_84 0x006812A0 /*
686 * Base of Local
687 * Mapping Table 0-127
688 */
689
690
691
692 #define NI_LOCAL_TABLE_85 0x006812A8 /*
693 * Base of Local
694 * Mapping Table 0-127
695 */
696
697
698
699 #define NI_LOCAL_TABLE_86 0x006812B0 /*
700 * Base of Local
701 * Mapping Table 0-127
702 */
703
704
705
706 #define NI_LOCAL_TABLE_87 0x006812B8 /*
707 * Base of Local
708 * Mapping Table 0-127
709 */
710
711
712
713 #define NI_LOCAL_TABLE_88 0x006812C0 /*
714 * Base of Local
715 * Mapping Table 0-127
716 */
717
718
719
720 #define NI_LOCAL_TABLE_89 0x006812C8 /*
721 * Base of Local
722 * Mapping Table 0-127
723 */
724
725
726
727 #define NI_LOCAL_TABLE_90 0x006812D0 /*
728 * Base of Local
729 * Mapping Table 0-127
730 */
731
732
733
734 #define NI_LOCAL_TABLE_91 0x006812D8 /*
735 * Base of Local
736 * Mapping Table 0-127
737 */
738
739
740
741 #define NI_LOCAL_TABLE_92 0x006812E0 /*
742 * Base of Local
743 * Mapping Table 0-127
744 */
745
746
747
748 #define NI_LOCAL_TABLE_93 0x006812E8 /*
749 * Base of Local
750 * Mapping Table 0-127
751 */
752
753
754
755 #define NI_LOCAL_TABLE_94 0x006812F0 /*
756 * Base of Local
757 * Mapping Table 0-127
758 */
759
760
761
762 #define NI_LOCAL_TABLE_95 0x006812F8 /*
763 * Base of Local
764 * Mapping Table 0-127
765 */
766
767
768
769 #define NI_LOCAL_TABLE_96 0x00681300 /*
770 * Base of Local
771 * Mapping Table 0-127
772 */
773
774
775
776 #define NI_LOCAL_TABLE_97 0x00681308 /*
777 * Base of Local
778 * Mapping Table 0-127
779 */
780
781
782
783 #define NI_LOCAL_TABLE_98 0x00681310 /*
784 * Base of Local
785 * Mapping Table 0-127
786 */
787
788
789
790 #define NI_LOCAL_TABLE_99 0x00681318 /*
791 * Base of Local
792 * Mapping Table 0-127
793 */
794
795
796
797 #define NI_LOCAL_TABLE_100 0x00681320 /*
798 * Base of Local
799 * Mapping Table 0-127
800 */
801
802
803
804 #define NI_LOCAL_TABLE_101 0x00681328 /*
805 * Base of Local
806 * Mapping Table 0-127
807 */
808
809
810
811 #define NI_LOCAL_TABLE_102 0x00681330 /*
812 * Base of Local
813 * Mapping Table 0-127
814 */
815
816
817
818 #define NI_LOCAL_TABLE_103 0x00681338 /*
819 * Base of Local
820 * Mapping Table 0-127
821 */
822
823
824
825 #define NI_LOCAL_TABLE_104 0x00681340 /*
826 * Base of Local
827 * Mapping Table 0-127
828 */
829
830
831
832 #define NI_LOCAL_TABLE_105 0x00681348 /*
833 * Base of Local
834 * Mapping Table 0-127
835 */
836
837
838
839 #define NI_LOCAL_TABLE_106 0x00681350 /*
840 * Base of Local
841 * Mapping Table 0-127
842 */
843
844
845
846 #define NI_LOCAL_TABLE_107 0x00681358 /*
847 * Base of Local
848 * Mapping Table 0-127
849 */
850
851
852
853 #define NI_LOCAL_TABLE_108 0x00681360 /*
854 * Base of Local
855 * Mapping Table 0-127
856 */
857
858
859
860 #define NI_LOCAL_TABLE_109 0x00681368 /*
861 * Base of Local
862 * Mapping Table 0-127
863 */
864
865
866
867 #define NI_LOCAL_TABLE_110 0x00681370 /*
868 * Base of Local
869 * Mapping Table 0-127
870 */
871
872
873
874 #define NI_LOCAL_TABLE_111 0x00681378 /*
875 * Base of Local
876 * Mapping Table 0-127
877 */
878
879
880
881 #define NI_LOCAL_TABLE_112 0x00681380 /*
882 * Base of Local
883 * Mapping Table 0-127
884 */
885
886
887
888 #define NI_LOCAL_TABLE_113 0x00681388 /*
889 * Base of Local
890 * Mapping Table 0-127
891 */
892
893
894
895 #define NI_LOCAL_TABLE_114 0x00681390 /*
896 * Base of Local
897 * Mapping Table 0-127
898 */
899
900
901
902 #define NI_LOCAL_TABLE_115 0x00681398 /*
903 * Base of Local
904 * Mapping Table 0-127
905 */
906
907
908
909 #define NI_LOCAL_TABLE_116 0x006813A0 /*
910 * Base of Local
911 * Mapping Table 0-127
912 */
913
914
915
916 #define NI_LOCAL_TABLE_117 0x006813A8 /*
917 * Base of Local
918 * Mapping Table 0-127
919 */
920
921
922
923 #define NI_LOCAL_TABLE_118 0x006813B0 /*
924 * Base of Local
925 * Mapping Table 0-127
926 */
927
928
929
930 #define NI_LOCAL_TABLE_119 0x006813B8 /*
931 * Base of Local
932 * Mapping Table 0-127
933 */
934
935
936
937 #define NI_LOCAL_TABLE_120 0x006813C0 /*
938 * Base of Local
939 * Mapping Table 0-127
940 */
941
942
943
944 #define NI_LOCAL_TABLE_121 0x006813C8 /*
945 * Base of Local
946 * Mapping Table 0-127
947 */
948
949
950
951 #define NI_LOCAL_TABLE_122 0x006813D0 /*
952 * Base of Local
953 * Mapping Table 0-127
954 */
955
956
957
958 #define NI_LOCAL_TABLE_123 0x006813D8 /*
959 * Base of Local
960 * Mapping Table 0-127
961 */
962
963
964
965 #define NI_LOCAL_TABLE_124 0x006813E0 /*
966 * Base of Local
967 * Mapping Table 0-127
968 */
969
970
971
972 #define NI_LOCAL_TABLE_125 0x006813E8 /*
973 * Base of Local
974 * Mapping Table 0-127
975 */
976
977
978
979 #define NI_LOCAL_TABLE_126 0x006813F0 /*
980 * Base of Local
981 * Mapping Table 0-127
982 */
983
984
985
986 #define NI_LOCAL_TABLE_127 0x006813F8 /*
987 * Base of Local
988 * Mapping Table 0-127
989 */
990
991
992
993 #define NI_GLOBAL_TABLE 0x00682000 /*
994 * Base of Global
995 * Mapping Table
996 */
997
998
999
1000
1001
1002 #ifndef __ASSEMBLY__
1003
1004 /************************************************************************
1005 * *
1006 * This register describes the LLP status. *
1007 * *
1008 ************************************************************************/
1009
1010
1011
1012
1013 #ifdef LITTLE_ENDIAN
1014
1015 typedef union ni_port_status_u {
1016 bdrkreg_t ni_port_status_regval;
1017 struct {
1018 bdrkreg_t ps_port_status : 2;
1019 bdrkreg_t ps_remote_power : 1;
1020 bdrkreg_t ps_rsvd : 61;
1021 } ni_port_status_fld_s;
1022 } ni_port_status_u_t;
1023
1024 #else
1025
1026 typedef union ni_port_status_u {
1027 bdrkreg_t ni_port_status_regval;
1028 struct {
1029 bdrkreg_t ps_rsvd : 61;
1030 bdrkreg_t ps_remote_power : 1;
1031 bdrkreg_t ps_port_status : 2;
1032 } ni_port_status_fld_s;
1033 } ni_port_status_u_t;
1034
1035 #endif
1036
1037
1038
1039
1040 /************************************************************************
1041 * *
1042 * Writing this register issues a reset to the network interface. *
1043 * *
1044 ************************************************************************/
1045
1046
1047
1048
1049 #ifdef LITTLE_ENDIAN
1050
1051 typedef union ni_port_reset_u {
1052 bdrkreg_t ni_port_reset_regval;
1053 struct {
1054 bdrkreg_t pr_link_reset_out : 1;
1055 bdrkreg_t pr_port_reset : 1;
1056 bdrkreg_t pr_local_reset : 1;
1057 bdrkreg_t pr_rsvd : 61;
1058 } ni_port_reset_fld_s;
1059 } ni_port_reset_u_t;
1060
1061 #else
1062
1063 typedef union ni_port_reset_u {
1064 bdrkreg_t ni_port_reset_regval;
1065 struct {
1066 bdrkreg_t pr_rsvd : 61;
1067 bdrkreg_t pr_local_reset : 1;
1068 bdrkreg_t pr_port_reset : 1;
1069 bdrkreg_t pr_link_reset_out : 1;
1070 } ni_port_reset_fld_s;
1071 } ni_port_reset_u_t;
1072
1073 #endif
1074
1075
1076
1077 /************************************************************************
1078 * *
1079 * This register contains the warm reset enable bit. *
1080 * *
1081 ************************************************************************/
1082
1083
1084
1085
1086 #ifdef LITTLE_ENDIAN
1087
1088 typedef union ni_reset_enable_u {
1089 bdrkreg_t ni_reset_enable_regval;
1090 struct {
1091 bdrkreg_t re_reset_ok : 1;
1092 bdrkreg_t re_rsvd : 63;
1093 } ni_reset_enable_fld_s;
1094 } ni_reset_enable_u_t;
1095
1096 #else
1097
1098 typedef union ni_reset_enable_u {
1099 bdrkreg_t ni_reset_enable_regval;
1100 struct {
1101 bdrkreg_t re_rsvd : 63;
1102 bdrkreg_t re_reset_ok : 1;
1103 } ni_reset_enable_fld_s;
1104 } ni_reset_enable_u_t;
1105
1106 #endif
1107
1108
1109
1110
1111 /************************************************************************
1112 * *
1113 * This register contains parameters for diagnostics. *
1114 * *
1115 ************************************************************************/
1116
1117
1118
1119
1120 #ifdef LITTLE_ENDIAN
1121
1122 typedef union ni_diag_parms_u {
1123 bdrkreg_t ni_diag_parms_regval;
1124 struct {
1125 bdrkreg_t dp_send_data_error : 1;
1126 bdrkreg_t dp_port_disable : 1;
1127 bdrkreg_t dp_send_err_off : 1;
1128 bdrkreg_t dp_rsvd : 61;
1129 } ni_diag_parms_fld_s;
1130 } ni_diag_parms_u_t;
1131
1132 #else
1133
1134 typedef union ni_diag_parms_u {
1135 bdrkreg_t ni_diag_parms_regval;
1136 struct {
1137 bdrkreg_t dp_rsvd : 61;
1138 bdrkreg_t dp_send_err_off : 1;
1139 bdrkreg_t dp_port_disable : 1;
1140 bdrkreg_t dp_send_data_error : 1;
1141 } ni_diag_parms_fld_s;
1142 } ni_diag_parms_u_t;
1143
1144 #endif
1145
1146
1147
1148
1149 /************************************************************************
1150 * *
1151 * This register contains the virtual channel selection control for *
1152 * outgoing messages from the Bedrock. *
1153 * *
1154 ************************************************************************/
1155
1156
1157
1158
1159 #ifdef LITTLE_ENDIAN
1160
1161 typedef union ni_channel_control_u {
1162 bdrkreg_t ni_channel_control_regval;
1163 struct {
1164 bdrkreg_t cc_vch_one_request : 1;
1165 bdrkreg_t cc_vch_two_request : 1;
1166 bdrkreg_t cc_vch_nine_request : 1;
1167 bdrkreg_t cc_vch_vector_request : 1;
1168 bdrkreg_t cc_vch_one_reply : 1;
1169 bdrkreg_t cc_vch_two_reply : 1;
1170 bdrkreg_t cc_vch_nine_reply : 1;
1171 bdrkreg_t cc_vch_vector_reply : 1;
1172 bdrkreg_t cc_send_vch_sel : 1;
1173 bdrkreg_t cc_rsvd : 55;
1174 } ni_channel_control_fld_s;
1175 } ni_channel_control_u_t;
1176
1177 #else
1178
1179 typedef union ni_channel_control_u {
1180 bdrkreg_t ni_channel_control_regval;
1181 struct {
1182 bdrkreg_t cc_rsvd : 55;
1183 bdrkreg_t cc_send_vch_sel : 1;
1184 bdrkreg_t cc_vch_vector_reply : 1;
1185 bdrkreg_t cc_vch_nine_reply : 1;
1186 bdrkreg_t cc_vch_two_reply : 1;
1187 bdrkreg_t cc_vch_one_reply : 1;
1188 bdrkreg_t cc_vch_vector_request : 1;
1189 bdrkreg_t cc_vch_nine_request : 1;
1190 bdrkreg_t cc_vch_two_request : 1;
1191 bdrkreg_t cc_vch_one_request : 1;
1192 } ni_channel_control_fld_s;
1193 } ni_channel_control_u_t;
1194
1195 #endif
1196
1197
1198
1199
1200 /************************************************************************
1201 * *
1202 * This register allows access to the LLP test logic. *
1203 * *
1204 ************************************************************************/
1205
1206
1207
1208
1209 #ifdef LITTLE_ENDIAN
1210
1211 typedef union ni_channel_test_u {
1212 bdrkreg_t ni_channel_test_regval;
1213 struct {
1214 bdrkreg_t ct_testseed : 20;
1215 bdrkreg_t ct_testmask : 8;
1216 bdrkreg_t ct_testdata : 20;
1217 bdrkreg_t ct_testvalid : 1;
1218 bdrkreg_t ct_testcberr : 1;
1219 bdrkreg_t ct_testflit : 3;
1220 bdrkreg_t ct_testclear : 1;
1221 bdrkreg_t ct_testerrcapture : 1;
1222 bdrkreg_t ct_rsvd : 9;
1223 } ni_channel_test_fld_s;
1224 } ni_channel_test_u_t;
1225
1226 #else
1227
1228 typedef union ni_channel_test_u {
1229 bdrkreg_t ni_channel_test_regval;
1230 struct {
1231 bdrkreg_t ct_rsvd : 9;
1232 bdrkreg_t ct_testerrcapture : 1;
1233 bdrkreg_t ct_testclear : 1;
1234 bdrkreg_t ct_testflit : 3;
1235 bdrkreg_t ct_testcberr : 1;
1236 bdrkreg_t ct_testvalid : 1;
1237 bdrkreg_t ct_testdata : 20;
1238 bdrkreg_t ct_testmask : 8;
1239 bdrkreg_t ct_testseed : 20;
1240 } ni_channel_test_fld_s;
1241 } ni_channel_test_u_t;
1242
1243 #endif
1244
1245
1246
1247
1248 /************************************************************************
1249 * *
1250 * This register contains LLP port parameters and enables for the *
1251 * capture of header data. *
1252 * *
1253 ************************************************************************/
1254
1255
1256
1257
1258 #ifdef LITTLE_ENDIAN
1259
1260 typedef union ni_port_parms_u {
1261 bdrkreg_t ni_port_parms_regval;
1262 struct {
1263 bdrkreg_t pp_max_burst : 10;
1264 bdrkreg_t pp_null_timeout : 6;
1265 bdrkreg_t pp_max_retry : 10;
1266 bdrkreg_t pp_d_avail_sel : 2;
1267 bdrkreg_t pp_rsvd_1 : 1;
1268 bdrkreg_t pp_first_err_enable : 1;
1269 bdrkreg_t pp_squash_err_enable : 1;
1270 bdrkreg_t pp_vch_err_enable : 4;
1271 bdrkreg_t pp_rsvd : 29;
1272 } ni_port_parms_fld_s;
1273 } ni_port_parms_u_t;
1274
1275 #else
1276
1277 typedef union ni_port_parms_u {
1278 bdrkreg_t ni_port_parms_regval;
1279 struct {
1280 bdrkreg_t pp_rsvd : 29;
1281 bdrkreg_t pp_vch_err_enable : 4;
1282 bdrkreg_t pp_squash_err_enable : 1;
1283 bdrkreg_t pp_first_err_enable : 1;
1284 bdrkreg_t pp_rsvd_1 : 1;
1285 bdrkreg_t pp_d_avail_sel : 2;
1286 bdrkreg_t pp_max_retry : 10;
1287 bdrkreg_t pp_null_timeout : 6;
1288 bdrkreg_t pp_max_burst : 10;
1289 } ni_port_parms_fld_s;
1290 } ni_port_parms_u_t;
1291
1292 #endif
1293
1294
1295
1296
1297 /************************************************************************
1298 * *
1299 * This register contains the age at which request and reply packets *
1300 * are injected into the network. This feature allows replies to be *
1301 * given a higher fixed priority than requests, which can be *
1302 * important in some network saturation situations. *
1303 * *
1304 ************************************************************************/
1305
1306
1307
1308
1309 #ifdef LITTLE_ENDIAN
1310
1311 typedef union ni_channel_age_u {
1312 bdrkreg_t ni_channel_age_regval;
1313 struct {
1314 bdrkreg_t ca_request_inject_age : 8;
1315 bdrkreg_t ca_reply_inject_age : 8;
1316 bdrkreg_t ca_rsvd : 48;
1317 } ni_channel_age_fld_s;
1318 } ni_channel_age_u_t;
1319
1320 #else
1321
1322 typedef union ni_channel_age_u {
1323 bdrkreg_t ni_channel_age_regval;
1324 struct {
1325 bdrkreg_t ca_rsvd : 48;
1326 bdrkreg_t ca_reply_inject_age : 8;
1327 bdrkreg_t ca_request_inject_age : 8;
1328 } ni_channel_age_fld_s;
1329 } ni_channel_age_u_t;
1330
1331 #endif
1332
1333
1334
1335
1336 /************************************************************************
1337 * *
1338 * This register contains latched LLP port and problematic message *
1339 * errors. The contents are the same information as the *
1340 * NI_PORT_ERROR_CLEAR register, but, in this register read accesses *
1341 * are non-destructive. Bits [52:24] assert the NI interrupt. *
1342 * *
1343 ************************************************************************/
1344
1345
1346
1347
1348 #ifdef LITTLE_ENDIAN
1349
1350 typedef union ni_port_errors_u {
1351 bdrkreg_t ni_port_errors_regval;
1352 struct {
1353 bdrkreg_t pe_sn_error_count : 8;
1354 bdrkreg_t pe_cb_error_count : 8;
1355 bdrkreg_t pe_retry_count : 8;
1356 bdrkreg_t pe_tail_timeout : 4;
1357 bdrkreg_t pe_fifo_overflow : 4;
1358 bdrkreg_t pe_external_short : 4;
1359 bdrkreg_t pe_external_long : 4;
1360 bdrkreg_t pe_external_bad_header : 4;
1361 bdrkreg_t pe_internal_short : 4;
1362 bdrkreg_t pe_internal_long : 4;
1363 bdrkreg_t pe_link_reset_in : 1;
1364 bdrkreg_t pe_rsvd : 11;
1365 } ni_port_errors_fld_s;
1366 } ni_port_errors_u_t;
1367
1368 #else
1369
1370 typedef union ni_port_errors_u {
1371 bdrkreg_t ni_port_errors_regval;
1372 struct {
1373 bdrkreg_t pe_rsvd : 11;
1374 bdrkreg_t pe_link_reset_in : 1;
1375 bdrkreg_t pe_internal_long : 4;
1376 bdrkreg_t pe_internal_short : 4;
1377 bdrkreg_t pe_external_bad_header : 4;
1378 bdrkreg_t pe_external_long : 4;
1379 bdrkreg_t pe_external_short : 4;
1380 bdrkreg_t pe_fifo_overflow : 4;
1381 bdrkreg_t pe_tail_timeout : 4;
1382 bdrkreg_t pe_retry_count : 8;
1383 bdrkreg_t pe_cb_error_count : 8;
1384 bdrkreg_t pe_sn_error_count : 8;
1385 } ni_port_errors_fld_s;
1386 } ni_port_errors_u_t;
1387
1388 #endif
1389
1390
1391
1392
1393 /************************************************************************
1394 * *
1395 * This register provides the sideband data associated with the *
1396 * NI_PORT_HEADER registers and also additional data for error *
1397 * processing. This register is not cleared on reset. *
1398 * *
1399 ************************************************************************/
1400
1401
1402
1403
1404 #ifdef LITTLE_ENDIAN
1405
1406 typedef union ni_port_sideband_u {
1407 bdrkreg_t ni_port_sideband_regval;
1408 struct {
1409 bdrkreg_t ps_sideband : 8;
1410 bdrkreg_t ps_bad_dest : 1;
1411 bdrkreg_t ps_bad_prexsel : 1;
1412 bdrkreg_t ps_rcv_error : 1;
1413 bdrkreg_t ps_bad_message : 1;
1414 bdrkreg_t ps_squash : 1;
1415 bdrkreg_t ps_sn_status : 1;
1416 bdrkreg_t ps_cb_status : 1;
1417 bdrkreg_t ps_send_error : 1;
1418 bdrkreg_t ps_vch_active : 4;
1419 bdrkreg_t ps_rsvd : 44;
1420 } ni_port_sideband_fld_s;
1421 } ni_port_sideband_u_t;
1422
1423 #else
1424
1425 typedef union ni_port_sideband_u {
1426 bdrkreg_t ni_port_sideband_regval;
1427 struct {
1428 bdrkreg_t ps_rsvd : 44;
1429 bdrkreg_t ps_vch_active : 4;
1430 bdrkreg_t ps_send_error : 1;
1431 bdrkreg_t ps_cb_status : 1;
1432 bdrkreg_t ps_sn_status : 1;
1433 bdrkreg_t ps_squash : 1;
1434 bdrkreg_t ps_bad_message : 1;
1435 bdrkreg_t ps_rcv_error : 1;
1436 bdrkreg_t ps_bad_prexsel : 1;
1437 bdrkreg_t ps_bad_dest : 1;
1438 bdrkreg_t ps_sideband : 8;
1439 } ni_port_sideband_fld_s;
1440 } ni_port_sideband_u_t;
1441
1442 #endif
1443
1444
1445
1446
1447 /************************************************************************
1448 * *
1449 * This register contains latched LLP port and problematic message *
1450 * errors. The contents are the same information as the *
1451 * NI_PORT_ERROR_CLEAR register, but, in this register read accesses *
1452 * are non-destructive. Bits [52:24] assert the NI interrupt. *
1453 * *
1454 ************************************************************************/
1455
1456
1457
1458
1459 #ifdef LITTLE_ENDIAN
1460
1461 typedef union ni_port_error_clear_u {
1462 bdrkreg_t ni_port_error_clear_regval;
1463 struct {
1464 bdrkreg_t pec_sn_error_count : 8;
1465 bdrkreg_t pec_cb_error_count : 8;
1466 bdrkreg_t pec_retry_count : 8;
1467 bdrkreg_t pec_tail_timeout : 4;
1468 bdrkreg_t pec_fifo_overflow : 4;
1469 bdrkreg_t pec_external_short : 4;
1470 bdrkreg_t pec_external_long : 4;
1471 bdrkreg_t pec_external_bad_header : 4;
1472 bdrkreg_t pec_internal_short : 4;
1473 bdrkreg_t pec_internal_long : 4;
1474 bdrkreg_t pec_link_reset_in : 1;
1475 bdrkreg_t pec_rsvd : 11;
1476 } ni_port_error_clear_fld_s;
1477 } ni_port_error_clear_u_t;
1478
1479 #else
1480
1481 typedef union ni_port_error_clear_u {
1482 bdrkreg_t ni_port_error_clear_regval;
1483 struct {
1484 bdrkreg_t pec_rsvd : 11;
1485 bdrkreg_t pec_link_reset_in : 1;
1486 bdrkreg_t pec_internal_long : 4;
1487 bdrkreg_t pec_internal_short : 4;
1488 bdrkreg_t pec_external_bad_header : 4;
1489 bdrkreg_t pec_external_long : 4;
1490 bdrkreg_t pec_external_short : 4;
1491 bdrkreg_t pec_fifo_overflow : 4;
1492 bdrkreg_t pec_tail_timeout : 4;
1493 bdrkreg_t pec_retry_count : 8;
1494 bdrkreg_t pec_cb_error_count : 8;
1495 bdrkreg_t pec_sn_error_count : 8;
1496 } ni_port_error_clear_fld_s;
1497 } ni_port_error_clear_u_t;
1498
1499 #endif
1500
1501
1502
1503
1504 /************************************************************************
1505 * *
1506 * Lookup table for the next hop's exit port. The table entry *
1507 * selection is based on the 7-bit LocalCube routing destination. *
1508 * *
1509 ************************************************************************/
1510
1511
1512
1513
1514 #ifdef LITTLE_ENDIAN
1515
1516 typedef union ni_local_table_0_u {
1517 bdrkreg_t ni_local_table_0_regval;
1518 struct {
1519 bdrkreg_t lt0_next_exit_port : 4;
1520 bdrkreg_t lt0_next_vch_lsb : 1;
1521 bdrkreg_t lt0_rsvd : 59;
1522 } ni_local_table_0_fld_s;
1523 } ni_local_table_0_u_t;
1524
1525 #else
1526
1527 typedef union ni_local_table_0_u {
1528 bdrkreg_t ni_local_table_0_regval;
1529 struct {
1530 bdrkreg_t lt0_rsvd : 59;
1531 bdrkreg_t lt0_next_vch_lsb : 1;
1532 bdrkreg_t lt0_next_exit_port : 4;
1533 } ni_local_table_0_fld_s;
1534 } ni_local_table_0_u_t;
1535
1536 #endif
1537
1538
1539
1540
1541 /************************************************************************
1542 * *
1543 * Lookup table for the next hop's exit port. The table entry *
1544 * selection is based on the 7-bit LocalCube routing destination. *
1545 * *
1546 ************************************************************************/
1547
1548
1549
1550
1551 #ifdef LITTLE_ENDIAN
1552
1553 typedef union ni_local_table_127_u {
1554 bdrkreg_t ni_local_table_127_regval;
1555 struct {
1556 bdrkreg_t lt1_next_exit_port : 4;
1557 bdrkreg_t lt1_next_vch_lsb : 1;
1558 bdrkreg_t lt1_rsvd : 59;
1559 } ni_local_table_127_fld_s;
1560 } ni_local_table_127_u_t;
1561
1562 #else
1563
1564 typedef union ni_local_table_127_u {
1565 bdrkreg_t ni_local_table_127_regval;
1566 struct {
1567 bdrkreg_t lt1_rsvd : 59;
1568 bdrkreg_t lt1_next_vch_lsb : 1;
1569 bdrkreg_t lt1_next_exit_port : 4;
1570 } ni_local_table_127_fld_s;
1571 } ni_local_table_127_u_t;
1572
1573 #endif
1574
1575
1576
1577
1578 /************************************************************************
1579 * *
1580 * Lookup table for the next hop's exit port. The table entry *
1581 * selection is based on the 1-bit MetaCube routing destination. *
1582 * *
1583 ************************************************************************/
1584
1585
1586
1587
1588 #ifdef LITTLE_ENDIAN
1589
1590 typedef union ni_global_table_u {
1591 bdrkreg_t ni_global_table_regval;
1592 struct {
1593 bdrkreg_t gt_next_exit_port : 4;
1594 bdrkreg_t gt_next_vch_lsb : 1;
1595 bdrkreg_t gt_rsvd : 59;
1596 } ni_global_table_fld_s;
1597 } ni_global_table_u_t;
1598
1599 #else
1600
1601 typedef union ni_global_table_u {
1602 bdrkreg_t ni_global_table_regval;
1603 struct {
1604 bdrkreg_t gt_rsvd : 59;
1605 bdrkreg_t gt_next_vch_lsb : 1;
1606 bdrkreg_t gt_next_exit_port : 4;
1607 } ni_global_table_fld_s;
1608 } ni_global_table_u_t;
1609
1610 #endif
1611
1612
1613
1614
1615
1616
1617 #endif /* __ASSEMBLY__ */
1618
1619 /************************************************************************
1620 * *
1621 * The following defines which were not formed into structures are *
1622 * probably indentical to another register, and the name of the *
1623 * register is provided against each of these registers. This *
1624 * information needs to be checked carefully *
1625 * *
1626 * NI_LOCAL_TABLE_1 NI_LOCAL_TABLE_0 *
1627 * NI_LOCAL_TABLE_2 NI_LOCAL_TABLE_0 *
1628 * NI_LOCAL_TABLE_3 NI_LOCAL_TABLE_0 *
1629 * NI_LOCAL_TABLE_4 NI_LOCAL_TABLE_0 *
1630 * NI_LOCAL_TABLE_5 NI_LOCAL_TABLE_0 *
1631 * NI_LOCAL_TABLE_6 NI_LOCAL_TABLE_0 *
1632 * NI_LOCAL_TABLE_7 NI_LOCAL_TABLE_0 *
1633 * NI_LOCAL_TABLE_8 NI_LOCAL_TABLE_0 *
1634 * NI_LOCAL_TABLE_9 NI_LOCAL_TABLE_0 *
1635 * NI_LOCAL_TABLE_10 NI_LOCAL_TABLE_0 *
1636 * NI_LOCAL_TABLE_11 NI_LOCAL_TABLE_0 *
1637 * NI_LOCAL_TABLE_12 NI_LOCAL_TABLE_0 *
1638 * NI_LOCAL_TABLE_13 NI_LOCAL_TABLE_0 *
1639 * NI_LOCAL_TABLE_14 NI_LOCAL_TABLE_0 *
1640 * NI_LOCAL_TABLE_15 NI_LOCAL_TABLE_0 *
1641 * NI_LOCAL_TABLE_16 NI_LOCAL_TABLE_0 *
1642 * NI_LOCAL_TABLE_17 NI_LOCAL_TABLE_0 *
1643 * NI_LOCAL_TABLE_18 NI_LOCAL_TABLE_0 *
1644 * NI_LOCAL_TABLE_19 NI_LOCAL_TABLE_0 *
1645 * NI_LOCAL_TABLE_20 NI_LOCAL_TABLE_0 *
1646 * NI_LOCAL_TABLE_21 NI_LOCAL_TABLE_0 *
1647 * NI_LOCAL_TABLE_22 NI_LOCAL_TABLE_0 *
1648 * NI_LOCAL_TABLE_23 NI_LOCAL_TABLE_0 *
1649 * NI_LOCAL_TABLE_24 NI_LOCAL_TABLE_0 *
1650 * NI_LOCAL_TABLE_25 NI_LOCAL_TABLE_0 *
1651 * NI_LOCAL_TABLE_26 NI_LOCAL_TABLE_0 *
1652 * NI_LOCAL_TABLE_27 NI_LOCAL_TABLE_0 *
1653 * NI_LOCAL_TABLE_28 NI_LOCAL_TABLE_0 *
1654 * NI_LOCAL_TABLE_29 NI_LOCAL_TABLE_0 *
1655 * NI_LOCAL_TABLE_30 NI_LOCAL_TABLE_0 *
1656 * NI_LOCAL_TABLE_31 NI_LOCAL_TABLE_0 *
1657 * NI_LOCAL_TABLE_32 NI_LOCAL_TABLE_0 *
1658 * NI_LOCAL_TABLE_33 NI_LOCAL_TABLE_0 *
1659 * NI_LOCAL_TABLE_34 NI_LOCAL_TABLE_0 *
1660 * NI_LOCAL_TABLE_35 NI_LOCAL_TABLE_0 *
1661 * NI_LOCAL_TABLE_36 NI_LOCAL_TABLE_0 *
1662 * NI_LOCAL_TABLE_37 NI_LOCAL_TABLE_0 *
1663 * NI_LOCAL_TABLE_38 NI_LOCAL_TABLE_0 *
1664 * NI_LOCAL_TABLE_39 NI_LOCAL_TABLE_0 *
1665 * NI_LOCAL_TABLE_40 NI_LOCAL_TABLE_0 *
1666 * NI_LOCAL_TABLE_41 NI_LOCAL_TABLE_0 *
1667 * NI_LOCAL_TABLE_42 NI_LOCAL_TABLE_0 *
1668 * NI_LOCAL_TABLE_43 NI_LOCAL_TABLE_0 *
1669 * NI_LOCAL_TABLE_44 NI_LOCAL_TABLE_0 *
1670 * NI_LOCAL_TABLE_45 NI_LOCAL_TABLE_0 *
1671 * NI_LOCAL_TABLE_46 NI_LOCAL_TABLE_0 *
1672 * NI_LOCAL_TABLE_47 NI_LOCAL_TABLE_0 *
1673 * NI_LOCAL_TABLE_48 NI_LOCAL_TABLE_0 *
1674 * NI_LOCAL_TABLE_49 NI_LOCAL_TABLE_0 *
1675 * NI_LOCAL_TABLE_50 NI_LOCAL_TABLE_0 *
1676 * NI_LOCAL_TABLE_51 NI_LOCAL_TABLE_0 *
1677 * NI_LOCAL_TABLE_52 NI_LOCAL_TABLE_0 *
1678 * NI_LOCAL_TABLE_53 NI_LOCAL_TABLE_0 *
1679 * NI_LOCAL_TABLE_54 NI_LOCAL_TABLE_0 *
1680 * NI_LOCAL_TABLE_55 NI_LOCAL_TABLE_0 *
1681 * NI_LOCAL_TABLE_56 NI_LOCAL_TABLE_0 *
1682 * NI_LOCAL_TABLE_57 NI_LOCAL_TABLE_0 *
1683 * NI_LOCAL_TABLE_58 NI_LOCAL_TABLE_0 *
1684 * NI_LOCAL_TABLE_59 NI_LOCAL_TABLE_0 *
1685 * NI_LOCAL_TABLE_60 NI_LOCAL_TABLE_0 *
1686 * NI_LOCAL_TABLE_61 NI_LOCAL_TABLE_0 *
1687 * NI_LOCAL_TABLE_62 NI_LOCAL_TABLE_0 *
1688 * NI_LOCAL_TABLE_63 NI_LOCAL_TABLE_0 *
1689 * NI_LOCAL_TABLE_64 NI_LOCAL_TABLE_0 *
1690 * NI_LOCAL_TABLE_65 NI_LOCAL_TABLE_0 *
1691 * NI_LOCAL_TABLE_66 NI_LOCAL_TABLE_0 *
1692 * NI_LOCAL_TABLE_67 NI_LOCAL_TABLE_0 *
1693 * NI_LOCAL_TABLE_68 NI_LOCAL_TABLE_0 *
1694 * NI_LOCAL_TABLE_69 NI_LOCAL_TABLE_0 *
1695 * NI_LOCAL_TABLE_70 NI_LOCAL_TABLE_0 *
1696 * NI_LOCAL_TABLE_71 NI_LOCAL_TABLE_0 *
1697 * NI_LOCAL_TABLE_72 NI_LOCAL_TABLE_0 *
1698 * NI_LOCAL_TABLE_73 NI_LOCAL_TABLE_0 *
1699 * NI_LOCAL_TABLE_74 NI_LOCAL_TABLE_0 *
1700 * NI_LOCAL_TABLE_75 NI_LOCAL_TABLE_0 *
1701 * NI_LOCAL_TABLE_76 NI_LOCAL_TABLE_0 *
1702 * NI_LOCAL_TABLE_77 NI_LOCAL_TABLE_0 *
1703 * NI_LOCAL_TABLE_78 NI_LOCAL_TABLE_0 *
1704 * NI_LOCAL_TABLE_79 NI_LOCAL_TABLE_0 *
1705 * NI_LOCAL_TABLE_80 NI_LOCAL_TABLE_0 *
1706 * NI_LOCAL_TABLE_81 NI_LOCAL_TABLE_0 *
1707 * NI_LOCAL_TABLE_82 NI_LOCAL_TABLE_0 *
1708 * NI_LOCAL_TABLE_83 NI_LOCAL_TABLE_0 *
1709 * NI_LOCAL_TABLE_84 NI_LOCAL_TABLE_0 *
1710 * NI_LOCAL_TABLE_85 NI_LOCAL_TABLE_0 *
1711 * NI_LOCAL_TABLE_86 NI_LOCAL_TABLE_0 *
1712 * NI_LOCAL_TABLE_87 NI_LOCAL_TABLE_0 *
1713 * NI_LOCAL_TABLE_88 NI_LOCAL_TABLE_0 *
1714 * NI_LOCAL_TABLE_89 NI_LOCAL_TABLE_0 *
1715 * NI_LOCAL_TABLE_90 NI_LOCAL_TABLE_0 *
1716 * NI_LOCAL_TABLE_91 NI_LOCAL_TABLE_0 *
1717 * NI_LOCAL_TABLE_92 NI_LOCAL_TABLE_0 *
1718 * NI_LOCAL_TABLE_93 NI_LOCAL_TABLE_0 *
1719 * NI_LOCAL_TABLE_94 NI_LOCAL_TABLE_0 *
1720 * NI_LOCAL_TABLE_95 NI_LOCAL_TABLE_0 *
1721 * NI_LOCAL_TABLE_96 NI_LOCAL_TABLE_0 *
1722 * NI_LOCAL_TABLE_97 NI_LOCAL_TABLE_0 *
1723 * NI_LOCAL_TABLE_98 NI_LOCAL_TABLE_0 *
1724 * NI_LOCAL_TABLE_99 NI_LOCAL_TABLE_0 *
1725 * NI_LOCAL_TABLE_100 NI_LOCAL_TABLE_0 *
1726 * NI_LOCAL_TABLE_101 NI_LOCAL_TABLE_0 *
1727 * NI_LOCAL_TABLE_102 NI_LOCAL_TABLE_0 *
1728 * NI_LOCAL_TABLE_103 NI_LOCAL_TABLE_0 *
1729 * NI_LOCAL_TABLE_104 NI_LOCAL_TABLE_0 *
1730 * NI_LOCAL_TABLE_105 NI_LOCAL_TABLE_0 *
1731 * NI_LOCAL_TABLE_106 NI_LOCAL_TABLE_0 *
1732 * NI_LOCAL_TABLE_107 NI_LOCAL_TABLE_0 *
1733 * NI_LOCAL_TABLE_108 NI_LOCAL_TABLE_0 *
1734 * NI_LOCAL_TABLE_109 NI_LOCAL_TABLE_0 *
1735 * NI_LOCAL_TABLE_110 NI_LOCAL_TABLE_0 *
1736 * NI_LOCAL_TABLE_111 NI_LOCAL_TABLE_0 *
1737 * NI_LOCAL_TABLE_112 NI_LOCAL_TABLE_0 *
1738 * NI_LOCAL_TABLE_113 NI_LOCAL_TABLE_0 *
1739 * NI_LOCAL_TABLE_114 NI_LOCAL_TABLE_0 *
1740 * NI_LOCAL_TABLE_115 NI_LOCAL_TABLE_0 *
1741 * NI_LOCAL_TABLE_116 NI_LOCAL_TABLE_0 *
1742 * NI_LOCAL_TABLE_117 NI_LOCAL_TABLE_0 *
1743 * NI_LOCAL_TABLE_118 NI_LOCAL_TABLE_0 *
1744 * NI_LOCAL_TABLE_119 NI_LOCAL_TABLE_0 *
1745 * NI_LOCAL_TABLE_120 NI_LOCAL_TABLE_0 *
1746 * NI_LOCAL_TABLE_121 NI_LOCAL_TABLE_0 *
1747 * NI_LOCAL_TABLE_122 NI_LOCAL_TABLE_0 *
1748 * NI_LOCAL_TABLE_123 NI_LOCAL_TABLE_0 *
1749 * NI_LOCAL_TABLE_124 NI_LOCAL_TABLE_0 *
1750 * NI_LOCAL_TABLE_125 NI_LOCAL_TABLE_0 *
1751 * NI_LOCAL_TABLE_126 NI_LOCAL_TABLE_0 *
1752 * *
1753 ************************************************************************/
1754
1755
1756 /************************************************************************
1757 * *
1758 * The following defines were not formed into structures *
1759 * *
1760 * This could be because the document did not contain details of the *
1761 * register, or because the automated script did not recognize the *
1762 * register details in the documentation. If these register need *
1763 * structure definition, please create them manually *
1764 * *
1765 * NI_PORT_HEADER_A 0x680108 *
1766 * NI_PORT_HEADER_B 0x680110 *
1767 * *
1768 ************************************************************************/
1769
1770
1771 /************************************************************************
1772 * *
1773 * MAKE ALL ADDITIONS AFTER THIS LINE *
1774 * *
1775 ************************************************************************/
1776
1777
1778
1779
1780
1781 #endif /* _ASM_IA64_SN_SN1_HUBNI_H */
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