2 * Setup pointers to hardware dependent routines.
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
12 #include <linux/interrupt.h>
13 #include <linux/pci.h>
14 #include <linux/init.h>
16 #include <linux/serial.h>
17 #include <linux/serial_core.h>
19 #include <asm/bootinfo.h>
23 #include <asm/processor.h>
24 #include <asm/reboot.h>
25 #include <asm/gt64120.h>
27 #include <asm/mach-cobalt/cobalt.h>
29 extern void cobalt_machine_restart(char *command
);
30 extern void cobalt_machine_halt(void);
31 extern void cobalt_machine_power_off(void);
32 extern void cobalt_early_console(void);
36 const char *get_system_type(void)
38 switch (cobalt_board_id
) {
39 case COBALT_BRD_ID_QUBE1
:
41 case COBALT_BRD_ID_RAQ1
:
43 case COBALT_BRD_ID_QUBE2
:
44 return "Cobalt Qube2";
45 case COBALT_BRD_ID_RAQ2
:
51 void __init
plat_timer_setup(struct irqaction
*irq
)
53 /* Load timer value for HZ (TCLK is 50MHz) */
54 GT_WRITE(GT_TC0_OFS
, 50*1000*1000 / HZ
);
57 GT_WRITE(GT_TC_CONTROL_OFS
, GT_TC_CONTROL_ENTC0_MSK
| GT_TC_CONTROL_SELTC0_MSK
);
59 /* Register interrupt */
60 setup_irq(COBALT_GALILEO_IRQ
, irq
);
62 /* Enable interrupt */
63 GT_WRITE(GT_INTRMASK_OFS
, GT_INTR_T0EXP_MSK
| GT_READ(GT_INTRMASK_OFS
));
66 extern struct pci_ops gt64111_pci_ops
;
68 static struct resource cobalt_mem_resource
= {
69 .start
= GT_DEF_PCI0_MEM0_BASE
,
70 .end
= GT_DEF_PCI0_MEM0_BASE
+ GT_DEF_PCI0_MEM0_SIZE
- 1,
72 .flags
= IORESOURCE_MEM
75 static struct resource cobalt_io_resource
= {
79 .flags
= IORESOURCE_IO
82 static struct resource cobalt_io_resources
[] = {
87 .flags
= IORESOURCE_BUSY
92 .flags
= IORESOURCE_BUSY
97 .flags
= IORESOURCE_BUSY
101 .name
= "dma page reg",
102 .flags
= IORESOURCE_BUSY
107 .flags
= IORESOURCE_BUSY
111 #define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
113 static struct pci_controller cobalt_pci_controller
= {
114 .pci_ops
= >64111_pci_ops
,
115 .mem_resource
= &cobalt_mem_resource
,
117 .io_resource
= &cobalt_io_resource
,
118 .io_offset
= 0 - GT_DEF_PCI0_IO_BASE
,
121 void __init
plat_mem_setup(void)
123 static struct uart_port uart
;
124 unsigned int devfn
= PCI_DEVFN(COBALT_PCICONF_VIA
, 0);
127 _machine_restart
= cobalt_machine_restart
;
128 _machine_halt
= cobalt_machine_halt
;
129 pm_power_off
= cobalt_machine_power_off
;
131 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE
));
133 /* I/O port resource must include LCD/buttons */
134 ioport_resource
.end
= 0x0fffffff;
136 /* request I/O space for devices used on all i[345]86 PCs */
137 for (i
= 0; i
< COBALT_IO_RESOURCES
; i
++)
138 request_resource(&ioport_resource
, cobalt_io_resources
+ i
);
140 /* Read the cobalt id register out of the PCI config space */
141 PCI_CFG_SET(devfn
, (VIA_COBALT_BRD_ID_REG
& ~0x3));
142 cobalt_board_id
= GT_READ(GT_PCI0_CFGDATA_OFS
);
143 cobalt_board_id
>>= ((VIA_COBALT_BRD_ID_REG
& 3) * 8);
144 cobalt_board_id
= VIA_COBALT_BRD_REG_to_ID(cobalt_board_id
);
146 printk("Cobalt board ID: %d\n", cobalt_board_id
);
149 register_pci_controller(&cobalt_pci_controller
);
152 if (cobalt_board_id
> COBALT_BRD_ID_RAQ1
) {
153 #ifdef CONFIG_EARLY_PRINTK
154 cobalt_early_console();
157 #ifdef CONFIG_SERIAL_8250
159 uart
.type
= PORT_UNKNOWN
;
160 uart
.uartclk
= 18432000;
161 uart
.irq
= COBALT_SERIAL_IRQ
;
162 uart
.flags
= UPF_IOREMAP
| UPF_BOOT_AUTOCONF
|
164 uart
.iotype
= UPIO_MEM
;
165 uart
.mapbase
= 0x1c800000;
167 early_serial_setup(&uart
);
173 * Prom init. We read our one and only communication with the firmware.
174 * Grab the amount of installed memory.
175 * Better boot loaders (CoLo) pass a command line too :-)
178 void __init
prom_init(void)
180 int narg
, indx
, posn
, nchr
;
184 mips_machgroup
= MACH_GROUP_COBALT
;
186 memsz
= fw_arg0
& 0x7fff0000;
187 narg
= fw_arg0
& 0x0000ffff;
190 arcs_cmdline
[0] = '\0';
191 argv
= (char **) fw_arg1
;
193 for (indx
= 1; indx
< narg
; ++indx
) {
194 nchr
= strlen(argv
[indx
]);
195 if (posn
+ 1 + nchr
+ 1 > sizeof(arcs_cmdline
))
198 arcs_cmdline
[posn
++] = ' ';
199 strcpy(arcs_cmdline
+ posn
, argv
[indx
]);
204 add_memory_region(0x0, memsz
, BOOT_MEM_RAM
);
207 void __init
prom_free_prom_memory(void)