arch/ppc/platforms/mcpn765.h

   1 /*
   2  * arch/ppc/platforms/mcpn765.h
   3  *
   4  * Definitions for Motorola MCG MCPN765 cPCI Board.
   5  *
   6  * Author: Mark A. Greer
   7  *         mgreer@mvista.com
   8  *
   9  * 2001 (c) MontaVista, Software, Inc.  This file is licensed under
  10  * the terms of the GNU General Public License version 2.1.  This program
  11  * is licensed "as is" without any warranty of any kind, whether express
  12  * or implied.
  13  */
  14
  15 /*
  16  * From Processor to PCI:
  17  *   PCI Mem Space: 0x80000000 - 0xc0000000 -> 0x80000000 - 0xc0000000 (1 GB)
  18  *   PCI I/O Space: 0xfd800000 - 0xfe000000 -> 0x00000000 - 0x00800000 (8 MB)
  19  *      Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
  20  *   MPIC in PCI Mem Space: 0xfe800000 - 0xfe830000 (not all used by MPIC)
  21  *
  22  * From PCI to Processor:
  23  *   System Memory: 0x00000000 -> 0x00000000
  24  */
  25
  26 #ifndef __PPC_PLATFORMS_MCPN765_H
  27 #define __PPC_PLATFORMS_MCPN765_H
  28
  29 /* PCI Memory space mapping info */
  30 #define MCPN765_PCI_MEM_SIZE            0x40000000U
  31 #define MCPN765_PROC_PCI_MEM_START      0x80000000U
  32 #define MCPN765_PROC_PCI_MEM_END        (MCPN765_PROC_PCI_MEM_START +   \
  33                                          MCPN765_PCI_MEM_SIZE - 1)
  34 #define MCPN765_PCI_MEM_START           0x80000000U
  35 #define MCPN765_PCI_MEM_END             (MCPN765_PCI_MEM_START +        \
  36                                          MCPN765_PCI_MEM_SIZE - 1)
  37
  38 /* PCI I/O space mapping info */
  39 #define MCPN765_PCI_IO_SIZE             0x00800000U
  40 #define MCPN765_PROC_PCI_IO_START       0xfd800000U
  41 #define MCPN765_PROC_PCI_IO_END         (MCPN765_PROC_PCI_IO_START +    \
  42                                          MCPN765_PCI_IO_SIZE - 1)
  43 #define MCPN765_PCI_IO_START            0x00000000U
  44 #define MCPN765_PCI_IO_END              (MCPN765_PCI_IO_START +         \
  45                                          MCPN765_PCI_IO_SIZE - 1)
  46
  47 /* System memory mapping info */
  48 #define MCPN765_PCI_DRAM_OFFSET         0x00000000U
  49 #define MCPN765_PCI_PHY_MEM_OFFSET      0x00000000U
  50
  51 #define MCPN765_ISA_MEM_BASE            0x00000000U
  52 #define MCPN765_ISA_IO_BASE             MCPN765_PROC_PCI_IO_START
  53
  54 /* Define base addresses for important sets of registers */
  55 #define MCPN765_HAWK_MPIC_BASE          0xfe800000U
  56 #define MCPN765_HAWK_SMC_BASE           0xfef80000U
  57 #define MCPN765_HAWK_PPC_REG_BASE       0xfeff0000U
  58
  59 /* Define MCPN765 board register addresses. */
  60 #define MCPN765_BOARD_STATUS_REG        0xfef88080U
  61 #define MCPN765_BOARD_MODFAIL_REG       0xfef88090U
  62 #define MCPN765_BOARD_MODRST_REG        0xfef880a0U
  63 #define MCPN765_BOARD_TBEN_REG          0xfef880c0U
  64 #define MCPN765_BOARD_GEOGRAPHICAL_REG  0xfef880e8U
  65 #define MCPN765_BOARD_EXT_FEATURE_REG   0xfef880f0U
  66 #define MCPN765_BOARD_LAST_RESET_REG    0xfef880f8U
  67
  68 /* UART base addresses are defined in <asm-ppc/platforms/mcpn765_serial.h> */
  69
  70 /* Define the NVRAM/RTC address strobe & data registers */
  71 #define MCPN765_PHYS_NVRAM_AS0          0xfef880c8U
  72 #define MCPN765_PHYS_NVRAM_AS1          0xfef880d0U
  73 #define MCPN765_PHYS_NVRAM_DATA         0xfef880d8U
  74
  75
  76 extern void mcpn765_find_bridges(void);
  77
  78 #endif /* __PPC_PLATFORMS_MCPN765_H */