arch/alpha/kernel/traps.c

   1 /*
   2  * arch/alpha/kernel/traps.c
   3  *
   4  * (C) Copyright 1994 Linus Torvalds
   5  */
   6
   7 /*
   8  * This file initializes the trap entry points
   9  */
  10
  11 #include <linux/config.h>
  12 #include <linux/mm.h>
  13 #include <linux/sched.h>
  14 #include <linux/tty.h>
  15 #include <linux/delay.h>
  16 #include <linux/smp_lock.h>
  17 #include <linux/module.h>
  18
  19 #include <asm/gentrap.h>
  20 #include <asm/uaccess.h>
  21 #include <asm/unaligned.h>
  22 #include <asm/sysinfo.h>
  23 #include <asm/hwrpb.h>
  24 #include <asm/mmu_context.h>
  25
  26 #include "proto.h"
  27
  28 /* data/code implementing a work-around for some SRMs which
  29    mishandle opDEC faults
  30 */
  31 static int opDEC_testing = 0;
  32 static int opDEC_fix = 0;
  33 static int opDEC_checked = 0;
  34 static unsigned long opDEC_test_pc = 0;
  35
  36 static void
  37 opDEC_check(void)
  38 {
  39         unsigned long test_pc;
  40
  41         if (opDEC_checked) return;
  42
  43         lock_kernel();
  44         opDEC_testing = 1;
  45
  46         __asm__ __volatile__(
  47                 "       br      %0,1f\n"
  48                 "1:     addq    %0,8,%0\n"
  49                 "       stq     %0,%1\n"
  50                 "       cvttq/svm $f31,$f31\n"
  51                 : "=&r"(test_pc), "=m"(opDEC_test_pc)
  52                 : );
  53
  54         opDEC_testing = 0;
  55         opDEC_checked = 1;
  56         unlock_kernel();
  57 }
  58
  59 void
  60 dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
  61 {
  62         printk("pc = [<%016lx>]  ra = [<%016lx>]  ps = %04lx    %s\n",
  63                regs->pc, regs->r26, regs->ps, print_tainted());
  64         printk("v0 = %016lx  t0 = %016lx  t1 = %016lx\n",
  65                regs->r0, regs->r1, regs->r2);
  66         printk("t2 = %016lx  t3 = %016lx  t4 = %016lx\n",
  67                regs->r3, regs->r4, regs->r5);
  68         printk("t5 = %016lx  t6 = %016lx  t7 = %016lx\n",
  69                regs->r6, regs->r7, regs->r8);
  70
  71         if (r9_15) {
  72                 printk("s0 = %016lx  s1 = %016lx  s2 = %016lx\n",
  73                        r9_15[9], r9_15[10], r9_15[11]);
  74                 printk("s3 = %016lx  s4 = %016lx  s5 = %016lx\n",
  75                        r9_15[12], r9_15[13], r9_15[14]);
  76                 printk("s6 = %016lx\n", r9_15[15]);
  77         }
  78
  79         printk("a0 = %016lx  a1 = %016lx  a2 = %016lx\n",
  80                regs->r16, regs->r17, regs->r18);
  81         printk("a3 = %016lx  a4 = %016lx  a5 = %016lx\n",
  82                regs->r19, regs->r20, regs->r21);
  83         printk("t8 = %016lx  t9 = %016lx  t10= %016lx\n",
  84                regs->r22, regs->r23, regs->r24);
  85         printk("t11= %016lx  pv = %016lx  at = %016lx\n",
  86                regs->r25, regs->r27, regs->r28);
  87         printk("gp = %016lx  sp = %p\n", regs->gp, regs+1);
  88 #if 0
  89 __halt();
  90 #endif
  91 }
  92
  93 #if 0
  94 static char * ireg_name[] = {"v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
  95                            "t7", "s0", "s1", "s2", "s3", "s4", "s5", "s6",
  96                            "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
  97                            "t10", "t11", "ra", "pv", "at", "gp", "sp", "zero"};
  98 #endif
  99
 100 static void
 101 dik_show_code(unsigned int *pc)
 102 {
 103         long i;
 104
 105         printk("Code:");
 106         for (i = -6; i < 2; i++) {
 107                 unsigned int insn;
 108                 if (__get_user(insn, pc+i))
 109                         break;
 110                 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>');
 111         }
 112         printk("\n");
 113 }
 114
 115 static void
 116 dik_show_trace(unsigned long *sp)
 117 {
 118         long i = 0;
 119         printk("Trace:");
 120         while (0x1ff8 & (unsigned long) sp) {
 121                 extern char _stext[], _etext[];
 122                 unsigned long tmp = *sp;
 123                 sp++;
 124                 if (tmp < (unsigned long) &_stext)
 125                         continue;
 126                 if (tmp >= (unsigned long) &_etext)
 127                         continue;
 128                 printk("%lx%c", tmp, ' ');
 129                 if (i > 40) {
 130                         printk(" ...");
 131                         break;
 132                 }
 133         }
 134         printk("\n");
 135 }
 136
 137 void show_trace_task(struct task_struct * tsk)
 138 {
 139         struct thread_info *ti = tsk->thread_info;
 140         unsigned long fp, sp = ti->pcb.ksp, base = (unsigned long) ti;
 141
 142         if (sp > base && sp+6*8 < base + 16*1024) {
 143                 fp = ((unsigned long*)sp)[6];
 144                 if (fp > sp && fp < base + 16*1024)
 145                         dik_show_trace((unsigned long *)fp);
 146         }
 147 }
 148
 149 static int kstack_depth_to_print = 24;
 150
 151 void show_stack(unsigned long *sp)
 152 {
 153         unsigned long *stack;
 154         int i;
 155
 156         /*
 157          * debugging aid: "show_stack(NULL);" prints the
 158          * back trace for this cpu.
 159          */
 160         if(sp==NULL)
 161                 sp=(unsigned long*)&sp;
 162
 163         stack = sp;
 164         for(i=0; i < kstack_depth_to_print; i++) {
 165                 if (((long) stack & (THREAD_SIZE-1)) == 0)
 166                         break;
 167                 if (i && ((i % 4) == 0))
 168                         printk("\n       ");
 169                 printk("%016lx ", *stack++);
 170         }
 171         printk("\n");
 172         dik_show_trace(sp);
 173 }
 174
 175 void dump_stack(void)
 176 {
 177         show_stack(NULL);
 178 }
 179
 180 void
 181 die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15)
 182 {
 183         if (regs->ps & 8)
 184                 return;
 185 #ifdef CONFIG_SMP
 186         printk("CPU %d ", hard_smp_processor_id());
 187 #endif
 188         printk("%s(%d): %s %ld\n", current->comm, current->pid, str, err);
 189         dik_show_regs(regs, r9_15);
 190         dik_show_trace((unsigned long *)(regs+1));
 191         dik_show_code((unsigned int *)regs->pc);
 192
 193         if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
 194                 printk("die_if_kernel recursion detected.\n");
 195                 local_irq_enable();
 196                 while (1);
 197         }
 198         do_exit(SIGSEGV);
 199 }
 200
 201 #ifndef CONFIG_MATHEMU
 202 static long dummy_emul(void) { return 0; }
 203 long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask)
 204   = (void *)dummy_emul;
 205 long (*alpha_fp_emul) (unsigned long pc)
 206   = (void *)dummy_emul;
 207 #else
 208 long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask);
 209 long alpha_fp_emul (unsigned long pc);
 210 #endif
 211
 212 asmlinkage void
 213 do_entArith(unsigned long summary, unsigned long write_mask,
 214             struct pt_regs *regs)
 215 {
 216         long si_code = FPE_FLTINV;
 217         siginfo_t info;
 218
 219         if (summary & 1) {
 220                 /* Software-completion summary bit is set, so try to
 221                    emulate the instruction.  If the processor supports
 222                    precise exceptions, we don't have to search.  */
 223                 if (!amask(AMASK_PRECISE_TRAP))
 224                         si_code = alpha_fp_emul(regs->pc - 4);
 225                 else
 226                         si_code = alpha_fp_emul_imprecise(regs, write_mask);
 227                 if (si_code == 0)
 228                         return;
 229         }
 230         die_if_kernel("Arithmetic fault", regs, 0, 0);
 231
 232         info.si_signo = SIGFPE;
 233         info.si_errno = 0;
 234         info.si_code = si_code;
 235         info.si_addr = (void *) regs->pc;
 236         send_sig_info(SIGFPE, &info, current);
 237 }
 238
 239 asmlinkage void
 240 do_entIF(unsigned long type, struct pt_regs *regs)
 241 {
 242         siginfo_t info;
 243         int signo, code;
 244
 245         if (!opDEC_testing || type != 4) {
 246                 if (type == 1) {
 247                         const unsigned int *data
 248                           = (const unsigned int *) regs->pc;
 249                         printk("Kernel bug at %s:%d\n",
 250                                (const char *)(data[1] | (long)data[2] << 32),
 251                                data[0]);
 252                 }
 253                 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"),
 254                               regs, type, 0);
 255         }
 256
 257         switch (type) {
 258               case 0: /* breakpoint */
 259                 info.si_signo = SIGTRAP;
 260                 info.si_errno = 0;
 261                 info.si_code = TRAP_BRKPT;
 262                 info.si_trapno = 0;
 263                 info.si_addr = (void *) regs->pc;
 264
 265                 if (ptrace_cancel_bpt(current)) {
 266                         regs->pc -= 4;  /* make pc point to former bpt */
 267                 }
 268
 269                 send_sig_info(SIGTRAP, &info, current);
 270                 return;
 271
 272               case 1: /* bugcheck */
 273                 info.si_signo = SIGTRAP;
 274                 info.si_errno = 0;
 275                 info.si_code = __SI_FAULT;
 276                 info.si_addr = (void *) regs->pc;
 277                 info.si_trapno = 0;
 278                 send_sig_info(SIGTRAP, &info, current);
 279                 return;
 280
 281               case 2: /* gentrap */
 282                 info.si_addr = (void *) regs->pc;
 283                 info.si_trapno = regs->r16;
 284                 switch ((long) regs->r16) {
 285                 case GEN_INTOVF:
 286                         signo = SIGFPE;
 287                         code = FPE_INTOVF;
 288                         break;
 289                 case GEN_INTDIV:
 290                         signo = SIGFPE;
 291                         code = FPE_INTDIV;
 292                         break;
 293                 case GEN_FLTOVF:
 294                         signo = SIGFPE;
 295                         code = FPE_FLTOVF;
 296                         break;
 297                 case GEN_FLTDIV:
 298                         signo = SIGFPE;
 299                         code = FPE_FLTDIV;
 300                         break;
 301                 case GEN_FLTUND:
 302                         signo = SIGFPE;
 303                         code = FPE_FLTUND;
 304                         break;
 305                 case GEN_FLTINV:
 306                         signo = SIGFPE;
 307                         code = FPE_FLTINV;
 308                         break;
 309                 case GEN_FLTINE:
 310                         signo = SIGFPE;
 311                         code = FPE_FLTRES;
 312                         break;
 313                 case GEN_ROPRAND:
 314                         signo = SIGFPE;
 315                         code = __SI_FAULT;
 316                         break;
 317
 318                 case GEN_DECOVF:
 319                 case GEN_DECDIV:
 320                 case GEN_DECINV:
 321                 case GEN_ASSERTERR:
 322                 case GEN_NULPTRERR:
 323                 case GEN_STKOVF:
 324                 case GEN_STRLENERR:
 325                 case GEN_SUBSTRERR:
 326                 case GEN_RANGERR:
 327                 case GEN_SUBRNG:
 328                 case GEN_SUBRNG1:
 329                 case GEN_SUBRNG2:
 330                 case GEN_SUBRNG3:
 331                 case GEN_SUBRNG4:
 332                 case GEN_SUBRNG5:
 333                 case GEN_SUBRNG6:
 334                 case GEN_SUBRNG7:
 335                 default:
 336                         signo = SIGTRAP;
 337                         code = __SI_FAULT;
 338                         break;
 339                 }
 340
 341                 info.si_signo = signo;
 342                 info.si_errno = 0;
 343                 info.si_code = code;
 344                 info.si_addr = (void *) regs->pc;
 345                 send_sig_info(signo, &info, current);
 346                 return;
 347
 348               case 4: /* opDEC */
 349                 if (implver() == IMPLVER_EV4) {
 350                         long si_code;
 351
 352                         /* The some versions of SRM do not handle
 353                            the opDEC properly - they return the PC of the
 354                            opDEC fault, not the instruction after as the
 355                            Alpha architecture requires.  Here we fix it up.
 356                            We do this by intentionally causing an opDEC
 357                            fault during the boot sequence and testing if
 358                            we get the correct PC.  If not, we set a flag
 359                            to correct it every time through.  */
 360                         if (opDEC_testing) {
 361                                 if (regs->pc == opDEC_test_pc) {
 362                                         opDEC_fix = 4;
 363                                         regs->pc += 4;
 364                                         printk("opDEC fixup enabled.\n");
 365                                 }
 366                                 return;
 367                         }
 368                         regs->pc += opDEC_fix;
 369
 370                         /* EV4 does not implement anything except normal
 371                            rounding.  Everything else will come here as
 372                            an illegal instruction.  Emulate them.  */
 373                         si_code = alpha_fp_emul(regs->pc - 4);
 374                         if (si_code == 0)
 375                                 return;
 376                         if (si_code > 0) {
 377                                 info.si_signo = SIGFPE;
 378                                 info.si_errno = 0;
 379                                 info.si_code = si_code;
 380                                 info.si_addr = (void *) regs->pc;
 381                                 send_sig_info(SIGFPE, &info, current);
 382                                 return;
 383                         }
 384                 }
 385                 break;
 386
 387               case 3: /* FEN fault */
 388                 /* Irritating users can call PAL_clrfen to disable the
 389                    FPU for the process.  The kernel will then trap in
 390                    do_switch_stack and undo_switch_stack when we try
 391                    to save and restore the FP registers.
 392
 393                    Given that GCC by default generates code that uses the
 394                    FP registers, PAL_clrfen is not useful except for DoS
 395                    attacks.  So turn the bleeding FPU back on and be done
 396                    with it.  */
 397                 current_thread_info()->pcb.flags |= 1;
 398                 __reload_thread(&current_thread_info()->pcb);
 399                 return;
 400
 401               case 5: /* illoc */
 402               default: /* unexpected instruction-fault type */
 403                       ;
 404         }
 405
 406         info.si_signo = SIGILL;
 407         info.si_errno = 0;
 408         info.si_code = ILL_ILLOPC;
 409         info.si_addr = (void *) regs->pc;
 410         send_sig_info(SIGILL, &info, current);
 411 }
 412
 413 /* There is an ifdef in the PALcode in MILO that enables a
 414    "kernel debugging entry point" as an unpriviledged call_pal.
 415
 416    We don't want to have anything to do with it, but unfortunately
 417    several versions of MILO included in distributions have it enabled,
 418    and if we don't put something on the entry point we'll oops.  */
 419
 420 asmlinkage void
 421 do_entDbg(struct pt_regs *regs)
 422 {
 423         siginfo_t info;
 424
 425         die_if_kernel("Instruction fault", regs, 0, 0);
 426
 427         info.si_signo = SIGILL;
 428         info.si_errno = 0;
 429         info.si_code = ILL_ILLOPC;
 430         info.si_addr = (void *) regs->pc;
 431         force_sig_info(SIGILL, &info, current);
 432 }
 433
 434
 435 /*
 436  * entUna has a different register layout to be reasonably simple. It
 437  * needs access to all the integer registers (the kernel doesn't use
 438  * fp-regs), and it needs to have them in order for simpler access.
 439  *
 440  * Due to the non-standard register layout (and because we don't want
 441  * to handle floating-point regs), user-mode unaligned accesses are
 442  * handled separately by do_entUnaUser below.
 443  *
 444  * Oh, btw, we don't handle the "gp" register correctly, but if we fault
 445  * on a gp-register unaligned load/store, something is _very_ wrong
 446  * in the kernel anyway..
 447  */
 448 struct allregs {
 449         unsigned long regs[32];
 450         unsigned long ps, pc, gp, a0, a1, a2;
 451 };
 452
 453 struct unaligned_stat {
 454         unsigned long count, va, pc;
 455 } unaligned[2];
 456
 457
 458 /* Macro for exception fixup code to access integer registers.  */
 459 #define una_reg(r)  (regs.regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
 460
 461
 462 asmlinkage void
 463 do_entUna(void * va, unsigned long opcode, unsigned long reg,
 464           unsigned long a3, unsigned long a4, unsigned long a5,
 465           struct allregs regs)
 466 {
 467         long error, tmp1, tmp2, tmp3, tmp4;
 468         unsigned long pc = regs.pc - 4;
 469         const struct exception_table_entry *fixup;
 470
 471         unaligned[0].count++;
 472         unaligned[0].va = (unsigned long) va;
 473         unaligned[0].pc = pc;
 474
 475         /* We don't want to use the generic get/put unaligned macros as
 476            we want to trap exceptions.  Only if we actually get an
 477            exception will we decide whether we should have caught it.  */
 478
 479         switch (opcode) {
 480         case 0x0c: /* ldwu */
 481                 __asm__ __volatile__(
 482                 "1:     ldq_u %1,0(%3)\n"
 483                 "2:     ldq_u %2,1(%3)\n"
 484                 "       extwl %1,%3,%1\n"
 485                 "       extwh %2,%3,%2\n"
 486                 "3:\n"
 487                 ".section __ex_table,\"a\"\n"
 488                 "       .gprel32 1b\n"
 489                 "       lda %1,3b-1b(%0)\n"
 490                 "       .gprel32 2b\n"
 491                 "       lda %2,3b-2b(%0)\n"
 492                 ".previous"
 493                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 494                         : "r"(va), "0"(0));
 495                 if (error)
 496                         goto got_exception;
 497                 una_reg(reg) = tmp1|tmp2;
 498                 return;
 499
 500         case 0x28: /* ldl */
 501                 __asm__ __volatile__(
 502                 "1:     ldq_u %1,0(%3)\n"
 503                 "2:     ldq_u %2,3(%3)\n"
 504                 "       extll %1,%3,%1\n"
 505                 "       extlh %2,%3,%2\n"
 506                 "3:\n"
 507                 ".section __ex_table,\"a\"\n"
 508                 "       .gprel32 1b\n"
 509                 "       lda %1,3b-1b(%0)\n"
 510                 "       .gprel32 2b\n"
 511                 "       lda %2,3b-2b(%0)\n"
 512                 ".previous"
 513                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 514                         : "r"(va), "0"(0));
 515                 if (error)
 516                         goto got_exception;
 517                 una_reg(reg) = (int)(tmp1|tmp2);
 518                 return;
 519
 520         case 0x29: /* ldq */
 521                 __asm__ __volatile__(
 522                 "1:     ldq_u %1,0(%3)\n"
 523                 "2:     ldq_u %2,7(%3)\n"
 524                 "       extql %1,%3,%1\n"
 525                 "       extqh %2,%3,%2\n"
 526                 "3:\n"
 527                 ".section __ex_table,\"a\"\n"
 528                 "       .gprel32 1b\n"
 529                 "       lda %1,3b-1b(%0)\n"
 530                 "       .gprel32 2b\n"
 531                 "       lda %2,3b-2b(%0)\n"
 532                 ".previous"
 533                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 534                         : "r"(va), "0"(0));
 535                 if (error)
 536                         goto got_exception;
 537                 una_reg(reg) = tmp1|tmp2;
 538                 return;
 539
 540         /* Note that the store sequences do not indicate that they change
 541            memory because it _should_ be affecting nothing in this context.
 542            (Otherwise we have other, much larger, problems.)  */
 543         case 0x0d: /* stw */
 544                 __asm__ __volatile__(
 545                 "1:     ldq_u %2,1(%5)\n"
 546                 "2:     ldq_u %1,0(%5)\n"
 547                 "       inswh %6,%5,%4\n"
 548                 "       inswl %6,%5,%3\n"
 549                 "       mskwh %2,%5,%2\n"
 550                 "       mskwl %1,%5,%1\n"
 551                 "       or %2,%4,%2\n"
 552                 "       or %1,%3,%1\n"
 553                 "3:     stq_u %2,1(%5)\n"
 554                 "4:     stq_u %1,0(%5)\n"
 555                 "5:\n"
 556                 ".section __ex_table,\"a\"\n"
 557                 "       .gprel32 1b\n"
 558                 "       lda %2,5b-1b(%0)\n"
 559                 "       .gprel32 2b\n"
 560                 "       lda %1,5b-2b(%0)\n"
 561                 "       .gprel32 3b\n"
 562                 "       lda $31,5b-3b(%0)\n"
 563                 "       .gprel32 4b\n"
 564                 "       lda $31,5b-4b(%0)\n"
 565                 ".previous"
 566                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 567                           "=&r"(tmp3), "=&r"(tmp4)
 568                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 569                 if (error)
 570                         goto got_exception;
 571                 return;
 572
 573         case 0x2c: /* stl */
 574                 __asm__ __volatile__(
 575                 "1:     ldq_u %2,3(%5)\n"
 576                 "2:     ldq_u %1,0(%5)\n"
 577                 "       inslh %6,%5,%4\n"
 578                 "       insll %6,%5,%3\n"
 579                 "       msklh %2,%5,%2\n"
 580                 "       mskll %1,%5,%1\n"
 581                 "       or %2,%4,%2\n"
 582                 "       or %1,%3,%1\n"
 583                 "3:     stq_u %2,3(%5)\n"
 584                 "4:     stq_u %1,0(%5)\n"
 585                 "5:\n"
 586                 ".section __ex_table,\"a\"\n"
 587                 "       .gprel32 1b\n"
 588                 "       lda %2,5b-1b(%0)\n"
 589                 "       .gprel32 2b\n"
 590                 "       lda %1,5b-2b(%0)\n"
 591                 "       .gprel32 3b\n"
 592                 "       lda $31,5b-3b(%0)\n"
 593                 "       .gprel32 4b\n"
 594                 "       lda $31,5b-4b(%0)\n"
 595                 ".previous"
 596                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 597                           "=&r"(tmp3), "=&r"(tmp4)
 598                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 599                 if (error)
 600                         goto got_exception;
 601                 return;
 602
 603         case 0x2d: /* stq */
 604                 __asm__ __volatile__(
 605                 "1:     ldq_u %2,7(%5)\n"
 606                 "2:     ldq_u %1,0(%5)\n"
 607                 "       insqh %6,%5,%4\n"
 608                 "       insql %6,%5,%3\n"
 609                 "       mskqh %2,%5,%2\n"
 610                 "       mskql %1,%5,%1\n"
 611                 "       or %2,%4,%2\n"
 612                 "       or %1,%3,%1\n"
 613                 "3:     stq_u %2,7(%5)\n"
 614                 "4:     stq_u %1,0(%5)\n"
 615                 "5:\n"
 616                 ".section __ex_table,\"a\"\n\t"
 617                 "       .gprel32 1b\n"
 618                 "       lda %2,5b-1b(%0)\n"
 619                 "       .gprel32 2b\n"
 620                 "       lda %1,5b-2b(%0)\n"
 621                 "       .gprel32 3b\n"
 622                 "       lda $31,5b-3b(%0)\n"
 623                 "       .gprel32 4b\n"
 624                 "       lda $31,5b-4b(%0)\n"
 625                 ".previous"
 626                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 627                           "=&r"(tmp3), "=&r"(tmp4)
 628                         : "r"(va), "r"(una_reg(reg)), "0"(0));
 629                 if (error)
 630                         goto got_exception;
 631                 return;
 632         }
 633
 634         lock_kernel();
 635         printk("Bad unaligned kernel access at %016lx: %p %lx %ld\n",
 636                 pc, va, opcode, reg);
 637         do_exit(SIGSEGV);
 638
 639 got_exception:
 640         /* Ok, we caught the exception, but we don't want it.  Is there
 641            someone to pass it along to?  */
 642         if ((fixup = search_exception_tables(pc)) != 0) {
 643                 unsigned long newpc;
 644                 newpc = fixup_exception(una_reg, fixup, pc);
 645
 646                 printk("Forwarding unaligned exception at %lx (%lx)\n",
 647                        pc, newpc);
 648
 649                 (&regs)->pc = newpc;
 650                 return;
 651         }
 652
 653         /*
 654          * Yikes!  No one to forward the exception to.
 655          * Since the registers are in a weird format, dump them ourselves.
 656          */
 657         lock_kernel();
 658
 659         printk("%s(%d): unhandled unaligned exception\n",
 660                current->comm, current->pid);
 661
 662         printk("pc = [<%016lx>]  ra = [<%016lx>]  ps = %04lx\n",
 663                pc, una_reg(26), regs.ps);
 664         printk("r0 = %016lx  r1 = %016lx  r2 = %016lx\n",
 665                una_reg(0), una_reg(1), una_reg(2));
 666         printk("r3 = %016lx  r4 = %016lx  r5 = %016lx\n",
 667                una_reg(3), una_reg(4), una_reg(5));
 668         printk("r6 = %016lx  r7 = %016lx  r8 = %016lx\n",
 669                una_reg(6), una_reg(7), una_reg(8));
 670         printk("r9 = %016lx  r10= %016lx  r11= %016lx\n",
 671                una_reg(9), una_reg(10), una_reg(11));
 672         printk("r12= %016lx  r13= %016lx  r14= %016lx\n",
 673                una_reg(12), una_reg(13), una_reg(14));
 674         printk("r15= %016lx\n", una_reg(15));
 675         printk("r16= %016lx  r17= %016lx  r18= %016lx\n",
 676                una_reg(16), una_reg(17), una_reg(18));
 677         printk("r19= %016lx  r20= %016lx  r21= %016lx\n",
 678                una_reg(19), una_reg(20), una_reg(21));
 679         printk("r22= %016lx  r23= %016lx  r24= %016lx\n",
 680                una_reg(22), una_reg(23), una_reg(24));
 681         printk("r25= %016lx  r27= %016lx  r28= %016lx\n",
 682                una_reg(25), una_reg(27), una_reg(28));
 683         printk("gp = %016lx  sp = %p\n", regs.gp, &regs+1);
 684
 685         dik_show_code((unsigned int *)pc);
 686         dik_show_trace((unsigned long *)(&regs+1));
 687
 688         if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) {
 689                 printk("die_if_kernel recursion detected.\n");
 690                 local_irq_enable();
 691                 while (1);
 692         }
 693         do_exit(SIGSEGV);
 694 }
 695
 696 /*
 697  * Convert an s-floating point value in memory format to the
 698  * corresponding value in register format.  The exponent
 699  * needs to be remapped to preserve non-finite values
 700  * (infinities, not-a-numbers, denormals).
 701  */
 702 static inline unsigned long
 703 s_mem_to_reg (unsigned long s_mem)
 704 {
 705         unsigned long frac    = (s_mem >>  0) & 0x7fffff;
 706         unsigned long sign    = (s_mem >> 31) & 0x1;
 707         unsigned long exp_msb = (s_mem >> 30) & 0x1;
 708         unsigned long exp_low = (s_mem >> 23) & 0x7f;
 709         unsigned long exp;
 710
 711         exp = (exp_msb << 10) | exp_low;        /* common case */
 712         if (exp_msb) {
 713                 if (exp_low == 0x7f) {
 714                         exp = 0x7ff;
 715                 }
 716         } else {
 717                 if (exp_low == 0x00) {
 718                         exp = 0x000;
 719                 } else {
 720                         exp |= (0x7 << 7);
 721                 }
 722         }
 723         return (sign << 63) | (exp << 52) | (frac << 29);
 724 }
 725
 726 /*
 727  * Convert an s-floating point value in register format to the
 728  * corresponding value in memory format.
 729  */
 730 static inline unsigned long
 731 s_reg_to_mem (unsigned long s_reg)
 732 {
 733         return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34);
 734 }
 735
 736 /*
 737  * Handle user-level unaligned fault.  Handling user-level unaligned
 738  * faults is *extremely* slow and produces nasty messages.  A user
 739  * program *should* fix unaligned faults ASAP.
 740  *
 741  * Notice that we have (almost) the regular kernel stack layout here,
 742  * so finding the appropriate registers is a little more difficult
 743  * than in the kernel case.
 744  *
 745  * Finally, we handle regular integer load/stores only.  In
 746  * particular, load-linked/store-conditionally and floating point
 747  * load/stores are not supported.  The former make no sense with
 748  * unaligned faults (they are guaranteed to fail) and I don't think
 749  * the latter will occur in any decent program.
 750  *
 751  * Sigh. We *do* have to handle some FP operations, because GCC will
 752  * uses them as temporary storage for integer memory to memory copies.
 753  * However, we need to deal with stt/ldt and sts/lds only.
 754  */
 755
 756 #define OP_INT_MASK     ( 1L << 0x28 | 1L << 0x2c   /* ldl stl */       \
 757                         | 1L << 0x29 | 1L << 0x2d   /* ldq stq */       \
 758                         | 1L << 0x0c | 1L << 0x0d   /* ldwu stw */      \
 759                         | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */
 760
 761 #define OP_WRITE_MASK   ( 1L << 0x26 | 1L << 0x27   /* sts stt */       \
 762                         | 1L << 0x2c | 1L << 0x2d   /* stl stq */       \
 763                         | 1L << 0x0d | 1L << 0x0e ) /* stw stb */
 764
 765 #define R(x)    ((size_t) &((struct pt_regs *)0)->x)
 766
 767 static int unauser_reg_offsets[32] = {
 768         R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8),
 769         /* r9 ... r15 are stored in front of regs.  */
 770         -56, -48, -40, -32, -24, -16, -8,
 771         R(r16), R(r17), R(r18),
 772         R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
 773         R(r27), R(r28), R(gp),
 774         0, 0
 775 };
 776
 777 #undef R
 778
 779 asmlinkage void
 780 do_entUnaUser(void * va, unsigned long opcode,
 781               unsigned long reg, struct pt_regs *regs)
 782 {
 783         static int cnt = 0;
 784         static long last_time = 0;
 785
 786         unsigned long tmp1, tmp2, tmp3, tmp4;
 787         unsigned long fake_reg, *reg_addr = &fake_reg;
 788         siginfo_t info;
 789         long error;
 790
 791         /* Check the UAC bits to decide what the user wants us to do
 792            with the unaliged access.  */
 793
 794         if (!test_thread_flag (TIF_UAC_NOPRINT)) {
 795                 if (cnt >= 5 && jiffies - last_time > 5*HZ) {
 796                         cnt = 0;
 797                 }
 798                 if (++cnt < 5) {
 799                         printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n",
 800                                current->comm, current->pid,
 801                                regs->pc - 4, va, opcode, reg);
 802                 }
 803                 last_time = jiffies;
 804         }
 805         if (test_thread_flag (TIF_UAC_SIGBUS))
 806                 goto give_sigbus;
 807         /* Not sure why you'd want to use this, but... */
 808         if (test_thread_flag (TIF_UAC_NOFIX))
 809                 return;
 810
 811         /* Don't bother reading ds in the access check since we already
 812            know that this came from the user.  Also rely on the fact that
 813            the page at TASK_SIZE is unmapped and so can't be touched anyway. */
 814         if (!__access_ok((unsigned long)va, 0, USER_DS))
 815                 goto give_sigsegv;
 816
 817         ++unaligned[1].count;
 818         unaligned[1].va = (unsigned long)va;
 819         unaligned[1].pc = regs->pc - 4;
 820
 821         if ((1L << opcode) & OP_INT_MASK) {
 822                 /* it's an integer load/store */
 823                 if (reg < 30) {
 824                         reg_addr = (unsigned long *)
 825                           ((char *)regs + unauser_reg_offsets[reg]);
 826                 } else if (reg == 30) {
 827                         /* usp in PAL regs */
 828                         fake_reg = rdusp();
 829                 } else {
 830                         /* zero "register" */
 831                         fake_reg = 0;
 832                 }
 833         }
 834
 835         /* We don't want to use the generic get/put unaligned macros as
 836            we want to trap exceptions.  Only if we actually get an
 837            exception will we decide whether we should have caught it.  */
 838
 839         switch (opcode) {
 840         case 0x0c: /* ldwu */
 841                 __asm__ __volatile__(
 842                 "1:     ldq_u %1,0(%3)\n"
 843                 "2:     ldq_u %2,1(%3)\n"
 844                 "       extwl %1,%3,%1\n"
 845                 "       extwh %2,%3,%2\n"
 846                 "3:\n"
 847                 ".section __ex_table,\"a\"\n"
 848                 "       .gprel32 1b\n"
 849                 "       lda %1,3b-1b(%0)\n"
 850                 "       .gprel32 2b\n"
 851                 "       lda %2,3b-2b(%0)\n"
 852                 ".previous"
 853                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 854                         : "r"(va), "0"(0));
 855                 if (error)
 856                         goto give_sigsegv;
 857                 *reg_addr = tmp1|tmp2;
 858                 break;
 859
 860         case 0x22: /* lds */
 861                 __asm__ __volatile__(
 862                 "1:     ldq_u %1,0(%3)\n"
 863                 "2:     ldq_u %2,3(%3)\n"
 864                 "       extll %1,%3,%1\n"
 865                 "       extlh %2,%3,%2\n"
 866                 "3:\n"
 867                 ".section __ex_table,\"a\"\n"
 868                 "       .gprel32 1b\n"
 869                 "       lda %1,3b-1b(%0)\n"
 870                 "       .gprel32 2b\n"
 871                 "       lda %2,3b-2b(%0)\n"
 872                 ".previous"
 873                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 874                         : "r"(va), "0"(0));
 875                 if (error)
 876                         goto give_sigsegv;
 877                 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2)));
 878                 return;
 879
 880         case 0x23: /* ldt */
 881                 __asm__ __volatile__(
 882                 "1:     ldq_u %1,0(%3)\n"
 883                 "2:     ldq_u %2,7(%3)\n"
 884                 "       extql %1,%3,%1\n"
 885                 "       extqh %2,%3,%2\n"
 886                 "3:\n"
 887                 ".section __ex_table,\"a\"\n"
 888                 "       .gprel32 1b\n"
 889                 "       lda %1,3b-1b(%0)\n"
 890                 "       .gprel32 2b\n"
 891                 "       lda %2,3b-2b(%0)\n"
 892                 ".previous"
 893                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 894                         : "r"(va), "0"(0));
 895                 if (error)
 896                         goto give_sigsegv;
 897                 alpha_write_fp_reg(reg, tmp1|tmp2);
 898                 return;
 899
 900         case 0x28: /* ldl */
 901                 __asm__ __volatile__(
 902                 "1:     ldq_u %1,0(%3)\n"
 903                 "2:     ldq_u %2,3(%3)\n"
 904                 "       extll %1,%3,%1\n"
 905                 "       extlh %2,%3,%2\n"
 906                 "3:\n"
 907                 ".section __ex_table,\"a\"\n"
 908                 "       .gprel32 1b\n"
 909                 "       lda %1,3b-1b(%0)\n"
 910                 "       .gprel32 2b\n"
 911                 "       lda %2,3b-2b(%0)\n"
 912                 ".previous"
 913                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 914                         : "r"(va), "0"(0));
 915                 if (error)
 916                         goto give_sigsegv;
 917                 *reg_addr = (int)(tmp1|tmp2);
 918                 break;
 919
 920         case 0x29: /* ldq */
 921                 __asm__ __volatile__(
 922                 "1:     ldq_u %1,0(%3)\n"
 923                 "2:     ldq_u %2,7(%3)\n"
 924                 "       extql %1,%3,%1\n"
 925                 "       extqh %2,%3,%2\n"
 926                 "3:\n"
 927                 ".section __ex_table,\"a\"\n"
 928                 "       .gprel32 1b\n"
 929                 "       lda %1,3b-1b(%0)\n"
 930                 "       .gprel32 2b\n"
 931                 "       lda %2,3b-2b(%0)\n"
 932                 ".previous"
 933                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2)
 934                         : "r"(va), "0"(0));
 935                 if (error)
 936                         goto give_sigsegv;
 937                 *reg_addr = tmp1|tmp2;
 938                 break;
 939
 940         /* Note that the store sequences do not indicate that they change
 941            memory because it _should_ be affecting nothing in this context.
 942            (Otherwise we have other, much larger, problems.)  */
 943         case 0x0d: /* stw */
 944                 __asm__ __volatile__(
 945                 "1:     ldq_u %2,1(%5)\n"
 946                 "2:     ldq_u %1,0(%5)\n"
 947                 "       inswh %6,%5,%4\n"
 948                 "       inswl %6,%5,%3\n"
 949                 "       mskwh %2,%5,%2\n"
 950                 "       mskwl %1,%5,%1\n"
 951                 "       or %2,%4,%2\n"
 952                 "       or %1,%3,%1\n"
 953                 "3:     stq_u %2,1(%5)\n"
 954                 "4:     stq_u %1,0(%5)\n"
 955                 "5:\n"
 956                 ".section __ex_table,\"a\"\n"
 957                 "       .gprel32 1b\n"
 958                 "       lda %2,5b-1b(%0)\n"
 959                 "       .gprel32 2b\n"
 960                 "       lda %1,5b-2b(%0)\n"
 961                 "       .gprel32 3b\n"
 962                 "       lda $31,5b-3b(%0)\n"
 963                 "       .gprel32 4b\n"
 964                 "       lda $31,5b-4b(%0)\n"
 965                 ".previous"
 966                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
 967                           "=&r"(tmp3), "=&r"(tmp4)
 968                         : "r"(va), "r"(*reg_addr), "0"(0));
 969                 if (error)
 970                         goto give_sigsegv;
 971                 return;
 972
 973         case 0x26: /* sts */
 974                 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
 975                 /* FALLTHRU */
 976
 977         case 0x2c: /* stl */
 978                 __asm__ __volatile__(
 979                 "1:     ldq_u %2,3(%5)\n"
 980                 "2:     ldq_u %1,0(%5)\n"
 981                 "       inslh %6,%5,%4\n"
 982                 "       insll %6,%5,%3\n"
 983                 "       msklh %2,%5,%2\n"
 984                 "       mskll %1,%5,%1\n"
 985                 "       or %2,%4,%2\n"
 986                 "       or %1,%3,%1\n"
 987                 "3:     stq_u %2,3(%5)\n"
 988                 "4:     stq_u %1,0(%5)\n"
 989                 "5:\n"
 990                 ".section __ex_table,\"a\"\n"
 991                 "       .gprel32 1b\n"
 992                 "       lda %2,5b-1b(%0)\n"
 993                 "       .gprel32 2b\n"
 994                 "       lda %1,5b-2b(%0)\n"
 995                 "       .gprel32 3b\n"
 996                 "       lda $31,5b-3b(%0)\n"
 997                 "       .gprel32 4b\n"
 998                 "       lda $31,5b-4b(%0)\n"
 999                 ".previous"
1000                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
1001                           "=&r"(tmp3), "=&r"(tmp4)
1002                         : "r"(va), "r"(*reg_addr), "0"(0));
1003                 if (error)
1004                         goto give_sigsegv;
1005                 return;
1006
1007         case 0x27: /* stt */
1008                 fake_reg = alpha_read_fp_reg(reg);
1009                 /* FALLTHRU */
1010
1011         case 0x2d: /* stq */
1012                 __asm__ __volatile__(
1013                 "1:     ldq_u %2,7(%5)\n"
1014                 "2:     ldq_u %1,0(%5)\n"
1015                 "       insqh %6,%5,%4\n"
1016                 "       insql %6,%5,%3\n"
1017                 "       mskqh %2,%5,%2\n"
1018                 "       mskql %1,%5,%1\n"
1019                 "       or %2,%4,%2\n"
1020                 "       or %1,%3,%1\n"
1021                 "3:     stq_u %2,7(%5)\n"
1022                 "4:     stq_u %1,0(%5)\n"
1023                 "5:\n"
1024                 ".section __ex_table,\"a\"\n\t"
1025                 "       .gprel32 1b\n"
1026                 "       lda %2,5b-1b(%0)\n"
1027                 "       .gprel32 2b\n"
1028                 "       lda %1,5b-2b(%0)\n"
1029                 "       .gprel32 3b\n"
1030                 "       lda $31,5b-3b(%0)\n"
1031                 "       .gprel32 4b\n"
1032                 "       lda $31,5b-4b(%0)\n"
1033                 ".previous"
1034                         : "=r"(error), "=&r"(tmp1), "=&r"(tmp2),
1035                           "=&r"(tmp3), "=&r"(tmp4)
1036                         : "r"(va), "r"(*reg_addr), "0"(0));
1037                 if (error)
1038                         goto give_sigsegv;
1039                 return;
1040
1041         default:
1042                 /* What instruction were you trying to use, exactly?  */
1043                 goto give_sigbus;
1044         }
1045
1046         /* Only integer loads should get here; everyone else returns early. */
1047         if (reg == 30)
1048                 wrusp(fake_reg);
1049         return;
1050
1051 give_sigsegv:
1052         regs->pc -= 4;  /* make pc point to faulting insn */
1053         info.si_signo = SIGSEGV;
1054         info.si_errno = 0;
1055
1056         /* We need to replicate some of the logic in mm/fault.c,
1057            since we don't have access to the fault code in the
1058            exception handling return path.  */
1059         if (!__access_ok((unsigned long)va, 0, USER_DS))
1060                 info.si_code = SEGV_ACCERR;
1061         else {
1062                 struct mm_struct *mm = current->mm;
1063                 down_read(&mm->mmap_sem);
1064                 if (find_vma(mm, (unsigned long)va))
1065                         info.si_code = SEGV_ACCERR;
1066                 else
1067                         info.si_code = SEGV_MAPERR;
1068                 up_read(&mm->mmap_sem);
1069         }
1070         info.si_addr = va;
1071         send_sig_info(SIGSEGV, &info, current);
1072         return;
1073
1074 give_sigbus:
1075         regs->pc -= 4;
1076         info.si_signo = SIGBUS;
1077         info.si_errno = 0;
1078         info.si_code = BUS_ADRALN;
1079         info.si_addr = va;
1080         send_sig_info(SIGBUS, &info, current);
1081         return;
1082 }
1083
1084 void
1085 trap_init(void)
1086 {
1087         /* Tell PAL-code what global pointer we want in the kernel.  */
1088         register unsigned long gptr __asm__("$29");
1089         wrkgp(gptr);
1090
1091         wrent(entArith, 1);
1092         wrent(entMM, 2);
1093         wrent(entIF, 3);
1094         wrent(entUna, 4);
1095         wrent(entSys, 5);
1096         wrent(entDbg, 6);
1097
1098         /* Hack for Multia (UDB) and JENSEN: some of their SRMs have
1099            a bug in the handling of the opDEC fault.  Fix it up if so.  */
1100         if (implver() == IMPLVER_EV4)
1101                 opDEC_check();
1102 }