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Merge with 2.4.0-test3-pre4.
[linux-2.6/linux-mips.git] / drivers / sound / esssolo1.c
blobcfc89d3ee32269496a91b19b63565890629f2ca5
1 /*****************************************************************************/
2
3 /*
4 * esssolo1.c -- ESS Technology Solo1 (ES1946) audio driver.
5 *
6 * Copyright (C) 1998-2000 Thomas Sailer (sailer@ife.ee.ethz.ch)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Module command line parameters:
23 * none so far
24 *
25 * Supported devices:
26 * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
27 * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
28 * /dev/midi simple MIDI UART interface, no ioctl
29 *
30 * Revision history
31 * 10.11.1998 0.1 Initial release (without any hardware)
32 * 22.03.1999 0.2 cinfo.blocks should be reset after GETxPTR ioctl.
33 * reported by Johan Maes <joma@telindus.be>
34 * return EAGAIN instead of EBUSY when O_NONBLOCK
35 * read/write cannot be executed
36 * 07.04.1999 0.3 implemented the following ioctl's: SOUND_PCM_READ_RATE,
37 * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
38 * Alpha fixes reported by Peter Jones <pjones@redhat.com>
39 * 15.06.1999 0.4 Fix bad allocation bug.
40 * Thanks to Deti Fliegl <fliegl@in.tum.de>
41 * 28.06.1999 0.5 Add pci_set_master
42 * 12.08.1999 0.6 Fix MIDI UART crashing the driver
43 * Changed mixer semantics from OSS documented
44 * behaviour to OSS "code behaviour".
45 * Recording might actually work now.
46 * The real DDMA controller address register is at PCI config
47 * 0x60, while the register at 0x18 is used as a placeholder
48 * register for BIOS address allocation. This register
49 * is supposed to be copied into 0x60, according
50 * to the Solo1 datasheet. When I do that, I can access
51 * the DDMA registers except the mask bit, which
52 * is stuck at 1. When I copy the contents of 0x18 +0x10
53 * to the DDMA base register, everything seems to work.
54 * The fun part is that the Windows Solo1 driver doesn't
55 * seem to do these tricks.
56 * Bugs remaining: plops and clicks when starting/stopping playback
57 * 31.08.1999 0.7 add spin_lock_init
58 * replaced current->state = x with set_current_state(x)
59 * 03.09.1999 0.8 change read semantics for MIDI to match
60 * OSS more closely; remove possible wakeup race
61 * 07.10.1999 0.9 Fix initialization; complain if sequencer writes time out
62 * Revised resource grabbing for the FM synthesizer
63 * 28.10.1999 0.10 More waitqueue races fixed
64 * 09.12.1999 0.11 Work around stupid Alpha port issue (virt_to_bus(kmalloc(GFP_DMA)) > 16M)
65 * Disabling recording on Alpha
66 * 12.01.2000 0.12 Prevent some ioctl's from returning bad count values on underrun/overrun;
67 * Tim Janik's BSE (Bedevilled Sound Engine) found this
68 * Integrated (aka redid 8-)) APM support patch by Zach Brown
69 * 07.02.2000 0.13 Use pci_alloc_consistent and pci_register_driver
70 * 19.02.2000 0.14 Use pci_dma_supported to determine if recording should be disabled
71 * 13.03.2000 0.15 Reintroduce initialization of a couple of PCI config space registers
72 */
73
74 /*****************************************************************************/
75
76 #include <linux/version.h>
77 #include <linux/module.h>
78 #include <linux/string.h>
79 #include <linux/ioport.h>
80 #include <linux/sched.h>
81 #include <linux/delay.h>
82 #include <linux/sound.h>
83 #include <linux/malloc.h>
84 #include <linux/soundcard.h>
85 #include <linux/pci.h>
86 #include <linux/bitops.h>
87 #include <linux/pm.h>
88 #include <asm/io.h>
89 #include <asm/dma.h>
90 #include <linux/init.h>
91 #include <linux/poll.h>
92 #include <linux/spinlock.h>
93 #include <asm/uaccess.h>
94 #include <asm/hardirq.h>
95
96 #include "dm.h"
97
98 /* --------------------------------------------------------------------- */
99
100 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
101
102 /* --------------------------------------------------------------------- */
103
104 #ifndef PCI_VENDOR_ID_ESS
105 #define PCI_VENDOR_ID_ESS 0x125d
106 #endif
107 #ifndef PCI_DEVICE_ID_ESS_SOLO1
108 #define PCI_DEVICE_ID_ESS_SOLO1 0x1969
109 #endif
110
111 #define SOLO1_MAGIC ((PCI_VENDOR_ID_ESS<<16)|PCI_DEVICE_ID_ESS_SOLO1)
112
113 #define DDMABASE_OFFSET 0 /* chip bug workaround kludge */
114 #define DDMABASE_EXTENT 16
115
116 #define IOBASE_EXTENT 16
117 #define SBBASE_EXTENT 16
118 #define VCBASE_EXTENT (DDMABASE_EXTENT+DDMABASE_OFFSET)
119 #define MPUBASE_EXTENT 4
120 #define GPBASE_EXTENT 4
121
122 #define FMSYNTH_EXTENT 4
123
124 /* MIDI buffer sizes */
125
126 #define MIDIINBUF 256
127 #define MIDIOUTBUF 256
128
129 #define FMODE_MIDI_SHIFT 3
130 #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
131 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
132
133 #define FMODE_DMFM 0x10
134
135 /* --------------------------------------------------------------------- */
136
137 struct solo1_state {
138 /* magic */
139 unsigned int magic;
140
141 /* list of esssolo1 devices */
142 struct list_head devs;
143
144 /* the corresponding pci_dev structure */
145 struct pci_dev *dev;
146
147 /* soundcore stuff */
148 int dev_audio;
149 int dev_mixer;
150 int dev_midi;
151 int dev_dmfm;
152
153 /* hardware resources */
154 unsigned long iobase, sbbase, vcbase, ddmabase, mpubase, gpbase; /* long for SPARC */
155 unsigned int irq;
156
157 /* mixer registers */
158 struct {
159 unsigned short vol[10];
160 unsigned int recsrc;
161 unsigned int modcnt;
162 unsigned short micpreamp;
163 } mix;
164
165 /* wave stuff */
166 unsigned fmt;
167 unsigned channels;
168 unsigned rate;
169 unsigned char clkdiv;
170 unsigned ena;
171
172 spinlock_t lock;
173 struct semaphore open_sem;
174 mode_t open_mode;
175 wait_queue_head_t open_wait;
176
177 struct dmabuf {
178 void *rawbuf;
179 dma_addr_t dmaaddr;
180 unsigned buforder;
181 unsigned numfrag;
182 unsigned fragshift;
183 unsigned hwptr, swptr;
184 unsigned total_bytes;
185 int count;
186 unsigned error; /* over/underrun */
187 wait_queue_head_t wait;
188 /* redundant, but makes calculations easier */
189 unsigned fragsize;
190 unsigned dmasize;
191 unsigned fragsamples;
192 /* OSS stuff */
193 unsigned mapped:1;
194 unsigned ready:1;
195 unsigned endcleared:1;
196 unsigned ossfragshift;
197 int ossmaxfrags;
198 unsigned subdivision;
199 } dma_dac, dma_adc;
200
201 /* midi stuff */
202 struct {
203 unsigned ird, iwr, icnt;
204 unsigned ord, owr, ocnt;
205 wait_queue_head_t iwait;
206 wait_queue_head_t owait;
207 struct timer_list timer;
208 unsigned char ibuf[MIDIINBUF];
209 unsigned char obuf[MIDIOUTBUF];
210 } midi;
211 };
212
213 /* --------------------------------------------------------------------- */
214
215 static LIST_HEAD(devs);
216
217 /* --------------------------------------------------------------------- */
218
219 extern inline void write_seq(struct solo1_state *s, unsigned char data)
220 {
221 int i;
222 unsigned long flags;
223
224 /* the __cli stunt is to send the data within the command window */
225 for (i = 0; i < 0xffff; i++) {
226 __save_flags(flags);
227 __cli();
228 if (!(inb(s->sbbase+0xc) & 0x80)) {
229 outb(data, s->sbbase+0xc);
230 __restore_flags(flags);
231 return;
232 }
233 __restore_flags(flags);
234 }
235 printk(KERN_ERR "esssolo1: write_seq timeout\n");
236 outb(data, s->sbbase+0xc);
237 }
238
239 extern inline int read_seq(struct solo1_state *s, unsigned char *data)
240 {
241 int i;
242
243 if (!data)
244 return 0;
245 for (i = 0; i < 0xffff; i++)
246 if (inb(s->sbbase+0xe) & 0x80) {
247 *data = inb(s->sbbase+0xa);
248 return 1;
249 }
250 printk(KERN_ERR "esssolo1: read_seq timeout\n");
251 return 0;
252 }
253
254 static int inline reset_ctrl(struct solo1_state *s)
255 {
256 int i;
257
258 outb(3, s->sbbase+6); /* clear sequencer and FIFO */
259 udelay(10);
260 outb(0, s->sbbase+6);
261 for (i = 0; i < 0xffff; i++)
262 if (inb(s->sbbase+0xe) & 0x80)
263 if (inb(s->sbbase+0xa) == 0xaa) {
264 write_seq(s, 0xc6); /* enter enhanced mode */
265 return 1;
266 }
267 return 0;
268 }
269
270 static void write_ctrl(struct solo1_state *s, unsigned char reg, unsigned char data)
271 {
272 write_seq(s, reg);
273 write_seq(s, data);
274 }
275
276 #if 0 /* unused */
277 static unsigned char read_ctrl(struct solo1_state *s, unsigned char reg)
278 {
279 unsigned char r;
280
281 write_seq(s, 0xc0);
282 write_seq(s, reg);
283 read_seq(s, &r);
284 return r;
285 }
286 #endif /* unused */
287
288 static void write_mixer(struct solo1_state *s, unsigned char reg, unsigned char data)
289 {
290 outb(reg, s->sbbase+4);
291 outb(data, s->sbbase+5);
292 }
293
294 static unsigned char read_mixer(struct solo1_state *s, unsigned char reg)
295 {
296 outb(reg, s->sbbase+4);
297 return inb(s->sbbase+5);
298 }
299
300 /* --------------------------------------------------------------------- */
301
302 extern inline unsigned ld2(unsigned int x)
303 {
304 unsigned r = 0;
305
306 if (x >= 0x10000) {
307 x >>= 16;
308 r += 16;
309 }
310 if (x >= 0x100) {
311 x >>= 8;
312 r += 8;
313 }
314 if (x >= 0x10) {
315 x >>= 4;
316 r += 4;
317 }
318 if (x >= 4) {
319 x >>= 2;
320 r += 2;
321 }
322 if (x >= 2)
323 r++;
324 return r;
325 }
326
327 /* --------------------------------------------------------------------- */
328
329 extern inline void stop_dac(struct solo1_state *s)
330 {
331 unsigned long flags;
332
333 spin_lock_irqsave(&s->lock, flags);
334 s->ena &= ~FMODE_WRITE;
335 write_mixer(s, 0x78, 0x10);
336 spin_unlock_irqrestore(&s->lock, flags);
337 }
338
339 static void start_dac(struct solo1_state *s)
340 {
341 unsigned long flags;
342
343 spin_lock_irqsave(&s->lock, flags);
344 if (!(s->ena & FMODE_WRITE) && (s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
345 s->ena |= FMODE_WRITE;
346 write_mixer(s, 0x78, 0x12);
347 udelay(10);
348 write_mixer(s, 0x78, 0x13);
349 }
350 spin_unlock_irqrestore(&s->lock, flags);
351 }
352
353 extern inline void stop_adc(struct solo1_state *s)
354 {
355 unsigned long flags;
356
357 spin_lock_irqsave(&s->lock, flags);
358 s->ena &= ~FMODE_READ;
359 write_ctrl(s, 0xb8, 0xe);
360 spin_unlock_irqrestore(&s->lock, flags);
361 }
362
363 static void start_adc(struct solo1_state *s)
364 {
365 unsigned long flags;
366
367 spin_lock_irqsave(&s->lock, flags);
368 if (!(s->ena & FMODE_READ) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
369 && s->dma_adc.ready) {
370 s->ena |= FMODE_READ;
371 write_ctrl(s, 0xb8, 0xf);
372 #if 0
373 printk(KERN_DEBUG "solo1: DMAbuffer: 0x%08lx\n", (long)s->dma_adc.rawbuf);
374 printk(KERN_DEBUG "solo1: DMA: mask: 0x%02x cnt: 0x%04x addr: 0x%08x stat: 0x%02x\n",
375 inb(s->ddmabase+0xf), inw(s->ddmabase+4), inl(s->ddmabase), inb(s->ddmabase+8));
376 #endif
377 outb(0, s->ddmabase+0xd); /* master reset */
378 outb(1, s->ddmabase+0xf); /* mask */
379 outb(0x54/*0x14*/, s->ddmabase+0xb); /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
380 outl(virt_to_bus(s->dma_adc.rawbuf), s->ddmabase);
381 outw(s->dma_adc.dmasize-1, s->ddmabase+4);
382 outb(0, s->ddmabase+0xf);
383 }
384 spin_unlock_irqrestore(&s->lock, flags);
385 #if 0
386 printk(KERN_DEBUG "solo1: start DMA: reg B8: 0x%02x SBstat: 0x%02x\n"
387 KERN_DEBUG "solo1: DMA: stat: 0x%02x cnt: 0x%04x mask: 0x%02x\n",
388 read_ctrl(s, 0xb8), inb(s->sbbase+0xc),
389 inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->ddmabase+0xf));
390 printk(KERN_DEBUG "solo1: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
391 KERN_DEBUG "solo1: B1: 0x%02x B2: 0x%02x B4: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n",
392 read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
393 read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb4), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8),
394 read_ctrl(s, 0xb9));
395 #endif
396 }
397
398 /* --------------------------------------------------------------------- */
399
400 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
401 #define DMABUF_MINORDER 1
402
403 extern inline void dealloc_dmabuf(struct solo1_state *s, struct dmabuf *db)
404 {
405 unsigned long map, mapend;
406
407 if (db->rawbuf) {
408 /* undo marking the pages as reserved */
409 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
410 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
411 clear_bit(PG_reserved, &mem_map[map].flags);
412 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
413 }
414 db->rawbuf = NULL;
415 db->mapped = db->ready = 0;
416 }
417
418 static int prog_dmabuf(struct solo1_state *s, struct dmabuf *db)
419 {
420 int order;
421 unsigned bytespersec;
422 unsigned bufs, sample_shift = 0;
423 unsigned long map, mapend;
424
425 db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
426 if (!db->rawbuf) {
427 db->ready = db->mapped = 0;
428 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
429 if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
430 break;
431 if (!db->rawbuf)
432 return -ENOMEM;
433 db->buforder = order;
434 /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
435 mapend = MAP_NR(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
436 for (map = MAP_NR(db->rawbuf); map <= mapend; map++)
437 set_bit(PG_reserved, &mem_map[map].flags);
438 }
439 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
440 sample_shift++;
441 if (s->channels > 1)
442 sample_shift++;
443 bytespersec = s->rate << sample_shift;
444 bufs = PAGE_SIZE << db->buforder;
445 if (db->ossfragshift) {
446 if ((1000 << db->ossfragshift) < bytespersec)
447 db->fragshift = ld2(bytespersec/1000);
448 else
449 db->fragshift = db->ossfragshift;
450 } else {
451 db->fragshift = ld2(bytespersec/100/(db->subdivision ? db->subdivision : 1));
452 if (db->fragshift < 3)
453 db->fragshift = 3;
454 }
455 db->numfrag = bufs >> db->fragshift;
456 while (db->numfrag < 4 && db->fragshift > 3) {
457 db->fragshift--;
458 db->numfrag = bufs >> db->fragshift;
459 }
460 db->fragsize = 1 << db->fragshift;
461 if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
462 db->numfrag = db->ossmaxfrags;
463 db->fragsamples = db->fragsize >> sample_shift;
464 db->dmasize = db->numfrag << db->fragshift;
465 return 0;
466 }
467
468 extern inline int prog_dmabuf_adc(struct solo1_state *s)
469 {
470 unsigned long va;
471 int c;
472
473 stop_adc(s);
474 /* check if PCI implementation supports 24bit busmaster DMA */
475 if (s->dev->dma_mask > 0xffffff)
476 return -EIO;
477 if ((c = prog_dmabuf(s, &s->dma_adc)))
478 return c;
479 va = s->dma_adc.dmaaddr;
480 if ((va & ~((1<<24)-1)))
481 panic("solo1: buffer above 16M boundary");
482 outb(0, s->ddmabase+0xd); /* clear */
483 outb(1, s->ddmabase+0xf); /* mask */
484 /*outb(0, s->ddmabase+8);*/ /* enable (enable is active low!) */
485 outb(0x54, s->ddmabase+0xb); /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
486 outl(va, s->ddmabase);
487 outw(s->dma_adc.dmasize-1, s->ddmabase+4);
488 c = - s->dma_adc.fragsamples;
489 write_ctrl(s, 0xa4, c);
490 write_ctrl(s, 0xa5, c >> 8);
491 outb(0, s->ddmabase+0xf);
492 s->dma_adc.ready = 1;
493 return 0;
494 }
495
496 extern inline int prog_dmabuf_dac(struct solo1_state *s)
497 {
498 unsigned long va;
499 int c;
500
501 stop_dac(s);
502 if ((c = prog_dmabuf(s, &s->dma_dac)))
503 return c;
504 memset(s->dma_dac.rawbuf, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80, s->dma_dac.dmasize); /* almost correct for U16 */
505 va = s->dma_dac.dmaaddr;
506 if ((va ^ (va + s->dma_dac.dmasize - 1)) & ~((1<<20)-1))
507 panic("solo1: buffer crosses 1M boundary");
508 outl(va, s->iobase);
509 /* warning: s->dma_dac.dmasize & 0xffff must not be zero! i.e. this limits us to a 32k buffer */
510 outw(s->dma_dac.dmasize, s->iobase+4);
511 c = - s->dma_dac.fragsamples;
512 write_mixer(s, 0x74, c);
513 write_mixer(s, 0x76, c >> 8);
514 outb(0xa, s->iobase+6);
515 s->dma_dac.ready = 1;
516 return 0;
517 }
518
519 extern inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
520 {
521 if (bptr + len > bsize) {
522 unsigned x = bsize - bptr;
523 memset(((char *)buf) + bptr, c, x);
524 bptr = 0;
525 len -= x;
526 }
527 memset(((char *)buf) + bptr, c, len);
528 }
529
530 /* call with spinlock held! */
531
532 static void solo1_update_ptr(struct solo1_state *s)
533 {
534 int diff;
535 unsigned hwptr;
536
537 /* update ADC pointer */
538 if (s->ena & FMODE_READ) {
539 hwptr = (s->dma_adc.dmasize - 1 - inw(s->ddmabase+4)) % s->dma_adc.dmasize;
540 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
541 s->dma_adc.hwptr = hwptr;
542 s->dma_adc.total_bytes += diff;
543 s->dma_adc.count += diff;
544 #if 0
545 printk(KERN_DEBUG "solo1: rd: hwptr %u swptr %u dmasize %u count %u\n",
546 s->dma_adc.hwptr, s->dma_adc.swptr, s->dma_adc.dmasize, s->dma_adc.count);
547 #endif
548 if (s->dma_adc.mapped) {
549 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
550 wake_up(&s->dma_adc.wait);
551 } else {
552 if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
553 s->ena &= ~FMODE_READ;
554 write_ctrl(s, 0xb8, 0xe);
555 s->dma_adc.error++;
556 }
557 if (s->dma_adc.count > 0)
558 wake_up(&s->dma_adc.wait);
559 }
560 }
561 /* update DAC pointer */
562 if (s->ena & FMODE_WRITE) {
563 hwptr = (s->dma_dac.dmasize - inw(s->iobase+4)) % s->dma_dac.dmasize;
564 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
565 s->dma_dac.hwptr = hwptr;
566 s->dma_dac.total_bytes += diff;
567 #if 0
568 printk(KERN_DEBUG "solo1: wr: hwptr %u swptr %u dmasize %u count %u\n",
569 s->dma_dac.hwptr, s->dma_dac.swptr, s->dma_dac.dmasize, s->dma_dac.count);
570 #endif
571 if (s->dma_dac.mapped) {
572 s->dma_dac.count += diff;
573 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
574 wake_up(&s->dma_dac.wait);
575 } else {
576 s->dma_dac.count -= diff;
577 if (s->dma_dac.count <= 0) {
578 s->ena &= ~FMODE_WRITE;
579 write_mixer(s, 0x78, 0x12);
580 s->dma_dac.error++;
581 } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
582 clear_advance(s->dma_dac.rawbuf, s->dma_dac.dmasize, s->dma_dac.swptr,
583 s->dma_dac.fragsize, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80);
584 s->dma_dac.endcleared = 1;
585 }
586 if (s->dma_dac.count < (signed)s->dma_dac.dmasize)
587 wake_up(&s->dma_dac.wait);
588 }
589 }
590 }
591
592 /* --------------------------------------------------------------------- */
593
594 static void prog_codec(struct solo1_state *s)
595 {
596 unsigned long flags;
597 int fdiv, filter;
598 unsigned char c;
599
600 reset_ctrl(s);
601 write_seq(s, 0xd3);
602 /* program sampling rates */
603 filter = s->rate * 9 / 20; /* Set filter roll-off to 90% of rate/2 */
604 fdiv = 256 - 7160000 / (filter * 82);
605 spin_lock_irqsave(&s->lock, flags);
606 write_ctrl(s, 0xa1, s->clkdiv);
607 write_ctrl(s, 0xa2, fdiv);
608 write_mixer(s, 0x70, s->clkdiv);
609 write_mixer(s, 0x72, fdiv);
610 /* program ADC parameters */
611 write_ctrl(s, 0xb8, 0xe);
612 write_ctrl(s, 0xb9, /*0x1*/0);
613 write_ctrl(s, 0xa8, (s->channels > 1) ? 0x11 : 0x12);
614 c = 0xd0;
615 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
616 c |= 0x04;
617 if (s->fmt & (AFMT_S16_LE | AFMT_S8))
618 c |= 0x20;
619 if (s->channels > 1)
620 c ^= 0x48;
621 write_ctrl(s, 0xb7, (c & 0x70) | 1);
622 write_ctrl(s, 0xb7, c);
623 write_ctrl(s, 0xb1, 0x50);
624 write_ctrl(s, 0xb2, 0x50);
625 /* program DAC parameters */
626 c = 0x40;
627 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
628 c |= 1;
629 if (s->fmt & (AFMT_S16_LE | AFMT_S8))
630 c |= 4;
631 if (s->channels > 1)
632 c |= 2;
633 write_mixer(s, 0x7a, c);
634 write_mixer(s, 0x78, 0x10);
635 s->ena = 0;
636 spin_unlock_irqrestore(&s->lock, flags);
637 }
638
639 /* --------------------------------------------------------------------- */
640
641 static const char invalid_magic[] = KERN_CRIT "solo1: invalid magic value\n";
642
643 #define VALIDATE_STATE(s) \
644 ({ \
645 if (!(s) || (s)->magic != SOLO1_MAGIC) { \
646 printk(invalid_magic); \
647 return -ENXIO; \
648 } \
649 })
650
651 /* --------------------------------------------------------------------- */
652
653 static int mixer_ioctl(struct solo1_state *s, unsigned int cmd, unsigned long arg)
654 {
655 static const unsigned int mixer_src[8] = {
656 SOUND_MASK_MIC, SOUND_MASK_MIC, SOUND_MASK_CD, SOUND_MASK_VOLUME,
657 SOUND_MASK_MIC, 0, SOUND_MASK_LINE, 0
658 };
659 static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
660 [SOUND_MIXER_PCM] = 1, /* voice */
661 [SOUND_MIXER_SYNTH] = 2, /* FM */
662 [SOUND_MIXER_CD] = 3, /* CD */
663 [SOUND_MIXER_LINE] = 4, /* Line */
664 [SOUND_MIXER_LINE1] = 5, /* AUX */
665 [SOUND_MIXER_MIC] = 6, /* Mic */
666 [SOUND_MIXER_LINE2] = 7, /* Mono in */
667 [SOUND_MIXER_SPEAKER] = 8, /* Speaker */
668 [SOUND_MIXER_RECLEV] = 9, /* Recording level */
669 [SOUND_MIXER_VOLUME] = 10 /* Master Volume */
670 };
671 static const unsigned char mixreg[] = {
672 0x7c, /* voice */
673 0x36, /* FM */
674 0x38, /* CD */
675 0x3e, /* Line */
676 0x3a, /* AUX */
677 0x1a, /* Mic */
678 0x6d /* Mono in */
679 };
680 unsigned char l, r, rl, rr, vidx;
681 int i, val;
682
683 VALIDATE_STATE(s);
684
685 if (cmd == SOUND_MIXER_PRIVATE1) {
686 /* enable/disable/query mixer preamp */
687 get_user_ret(val, (int *)arg, -EFAULT);
688 if (val != -1) {
689 val = val ? 0xff : 0xf7;
690 write_mixer(s, 0x7d, (read_mixer(s, 0x7d) | 0x08) & val);
691 }
692 val = (read_mixer(s, 0x7d) & 0x08) ? 1 : 0;
693 return put_user(val, (int *)arg);
694 }
695 if (cmd == SOUND_MIXER_PRIVATE2) {
696 /* enable/disable/query spatializer */
697 get_user_ret(val, (int *)arg, -EFAULT);
698 if (val != -1) {
699 val &= 0x3f;
700 write_mixer(s, 0x52, val);
701 write_mixer(s, 0x50, val ? 0x08 : 0);
702 }
703 return put_user(read_mixer(s, 0x52), (int *)arg);
704 }
705 if (cmd == SOUND_MIXER_INFO) {
706 mixer_info info;
707 strncpy(info.id, "Solo1", sizeof(info.id));
708 strncpy(info.name, "ESS Solo1", sizeof(info.name));
709 info.modify_counter = s->mix.modcnt;
710 if (copy_to_user((void *)arg, &info, sizeof(info)))
711 return -EFAULT;
712 return 0;
713 }
714 if (cmd == SOUND_OLD_MIXER_INFO) {
715 _old_mixer_info info;
716 strncpy(info.id, "Solo1", sizeof(info.id));
717 strncpy(info.name, "ESS Solo1", sizeof(info.name));
718 if (copy_to_user((void *)arg, &info, sizeof(info)))
719 return -EFAULT;
720 return 0;
721 }
722 if (cmd == OSS_GETVERSION)
723 return put_user(SOUND_VERSION, (int *)arg);
724 if (_IOC_TYPE(cmd) != 'M' || _IOC_SIZE(cmd) != sizeof(int))
725 return -EINVAL;
726 if (_IOC_DIR(cmd) == _IOC_READ) {
727 switch (_IOC_NR(cmd)) {
728 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
729 return put_user(mixer_src[read_mixer(s, 0x1c) & 7], (int *)arg);
730
731 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
732 return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
733 SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
734 SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV |
735 SOUND_MASK_SPEAKER, (int *)arg);
736
737 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
738 return put_user(SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VOLUME, (int *)arg);
739
740 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
741 return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
742 SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
743 SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV, (int *)arg);
744
745 case SOUND_MIXER_CAPS:
746 return put_user(SOUND_CAP_EXCL_INPUT, (int *)arg);
747
748 default:
749 i = _IOC_NR(cmd);
750 if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
751 return -EINVAL;
752 return put_user(s->mix.vol[vidx-1], (int *)arg);
753 }
754 }
755 if (_IOC_DIR(cmd) != (_IOC_READ|_IOC_WRITE))
756 return -EINVAL;
757 s->mix.modcnt++;
758 switch (_IOC_NR(cmd)) {
759 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
760 #if 0
761 {
762 static const unsigned char regs[] = {
763 0x1c, 0x1a, 0x36, 0x38, 0x3a, 0x3c, 0x3e, 0x60, 0x62, 0x6d, 0x7c
764 };
765 int i;
766
767 for (i = 0; i < sizeof(regs); i++)
768 printk(KERN_DEBUG "solo1: mixer reg 0x%02x: 0x%02x\n",
769 regs[i], read_mixer(s, regs[i]));
770 printk(KERN_DEBUG "solo1: ctrl reg 0x%02x: 0x%02x\n",
771 0xb4, read_ctrl(s, 0xb4));
772 }
773 #endif
774 get_user_ret(val, (int *)arg, -EFAULT);
775 i = hweight32(val);
776 if (i == 0)
777 return 0;
778 else if (i > 1)
779 val &= ~mixer_src[read_mixer(s, 0x1c) & 7];
780 for (i = 0; i < 8; i++) {
781 if (mixer_src[i] & val)
782 break;
783 }
784 if (i > 7)
785 return 0;
786 write_mixer(s, 0x1c, i);
787 return 0;
788
789 case SOUND_MIXER_VOLUME:
790 get_user_ret(val, (int *)arg, -EFAULT);
791 l = val & 0xff;
792 if (l > 100)
793 l = 100;
794 r = (val >> 8) & 0xff;
795 if (r > 100)
796 r = 100;
797 if (l < 6) {
798 rl = 0x40;
799 l = 0;
800 } else {
801 rl = (l * 2 - 11) / 3;
802 l = (rl * 3 + 11) / 2;
803 }
804 if (r < 6) {
805 rr = 0x40;
806 r = 0;
807 } else {
808 rr = (r * 2 - 11) / 3;
809 r = (rr * 3 + 11) / 2;
810 }
811 write_mixer(s, 0x60, rl);
812 write_mixer(s, 0x62, rr);
813 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
814 s->mix.vol[9] = ((unsigned int)r << 8) | l;
815 #else
816 s->mix.vol[9] = val;
817 #endif
818 return put_user(s->mix.vol[9], (int *)arg);
819
820 case SOUND_MIXER_SPEAKER:
821 get_user_ret(val, (int *)arg, -EFAULT);
822 l = val & 0xff;
823 if (l > 100)
824 l = 100;
825 else if (l < 2)
826 l = 2;
827 rl = (l - 2) / 14;
828 l = rl * 14 + 2;
829 write_mixer(s, 0x3c, rl);
830 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
831 s->mix.vol[7] = l * 0x101;
832 #else
833 s->mix.vol[7] = val;
834 #endif
835 return put_user(s->mix.vol[7], (int *)arg);
836
837 case SOUND_MIXER_RECLEV:
838 get_user_ret(val, (int *)arg, -EFAULT);
839 l = (val << 1) & 0x1fe;
840 if (l > 200)
841 l = 200;
842 else if (l < 5)
843 l = 5;
844 r = (val >> 7) & 0x1fe;
845 if (r > 200)
846 r = 200;
847 else if (r < 5)
848 r = 5;
849 rl = (l - 5) / 13;
850 rr = (r - 5) / 13;
851 r = (rl * 13 + 5) / 2;
852 l = (rr * 13 + 5) / 2;
853 write_ctrl(s, 0xb4, (rl << 4) | rr);
854 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
855 s->mix.vol[8] = ((unsigned int)r << 8) | l;
856 #else
857 s->mix.vol[8] = val;
858 #endif
859 return put_user(s->mix.vol[8], (int *)arg);
860
861 default:
862 i = _IOC_NR(cmd);
863 if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
864 return -EINVAL;
865 get_user_ret(val, (int *)arg, -EFAULT);
866 l = (val << 1) & 0x1fe;
867 if (l > 200)
868 l = 200;
869 else if (l < 5)
870 l = 5;
871 r = (val >> 7) & 0x1fe;
872 if (r > 200)
873 r = 200;
874 else if (r < 5)
875 r = 5;
876 rl = (l - 5) / 13;
877 rr = (r - 5) / 13;
878 r = (rl * 13 + 5) / 2;
879 l = (rr * 13 + 5) / 2;
880 write_mixer(s, mixreg[vidx-1], (rl << 4) | rr);
881 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
882 s->mix.vol[vidx-1] = ((unsigned int)r << 8) | l;
883 #else
884 s->mix.vol[vidx-1] = val;
885 #endif
886 return put_user(s->mix.vol[vidx-1], (int *)arg);
887 }
888 }
889
890 /* --------------------------------------------------------------------- */
891
892 static loff_t solo1_llseek(struct file *file, loff_t offset, int origin)
893 {
894 return -ESPIPE;
895 }
896
897 /* --------------------------------------------------------------------- */
898
899 static int solo1_open_mixdev(struct inode *inode, struct file *file)
900 {
901 int minor = MINOR(inode->i_rdev);
902 struct list_head *list;
903 struct solo1_state *s;
904
905 for (list = devs.next; ; list = list->next) {
906 if (list == &devs)
907 return -ENODEV;
908 s = list_entry(list, struct solo1_state, devs);
909 if (s->dev_mixer == minor)
910 break;
911 }
912 VALIDATE_STATE(s);
913 file->private_data = s;
914 return 0;
915 }
916
917 static int solo1_release_mixdev(struct inode *inode, struct file *file)
918 {
919 struct solo1_state *s = (struct solo1_state *)file->private_data;
920
921 VALIDATE_STATE(s);
922 return 0;
923 }
924
925 static int solo1_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
926 {
927 return mixer_ioctl((struct solo1_state *)file->private_data, cmd, arg);
928 }
929
930 static /*const*/ struct file_operations solo1_mixer_fops = {
931 owner: THIS_MODULE,
932 llseek: solo1_llseek,
933 ioctl: solo1_ioctl_mixdev,
934 open: solo1_open_mixdev,
935 release: solo1_release_mixdev,
936 };
937
938 /* --------------------------------------------------------------------- */
939
940 static int drain_dac(struct solo1_state *s, int nonblock)
941 {
942 DECLARE_WAITQUEUE(wait, current);
943 unsigned long flags;
944 int count;
945 unsigned tmo;
946
947 if (s->dma_dac.mapped)
948 return 0;
949 add_wait_queue(&s->dma_dac.wait, &wait);
950 for (;;) {
951 set_current_state(TASK_INTERRUPTIBLE);
952 spin_lock_irqsave(&s->lock, flags);
953 count = s->dma_dac.count;
954 spin_unlock_irqrestore(&s->lock, flags);
955 if (count <= 0)
956 break;
957 if (signal_pending(current))
958 break;
959 if (nonblock) {
960 remove_wait_queue(&s->dma_dac.wait, &wait);
961 set_current_state(TASK_RUNNING);
962 return -EBUSY;
963 }
964 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->rate;
965 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
966 tmo >>= 1;
967 if (s->channels > 1)
968 tmo >>= 1;
969 if (!schedule_timeout(tmo + 1))
970 printk(KERN_DEBUG "solo1: dma timed out??\n");
971 }
972 remove_wait_queue(&s->dma_dac.wait, &wait);
973 set_current_state(TASK_RUNNING);
974 if (signal_pending(current))
975 return -ERESTARTSYS;
976 return 0;
977 }
978
979 /* --------------------------------------------------------------------- */
980
981 static ssize_t solo1_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
982 {
983 struct solo1_state *s = (struct solo1_state *)file->private_data;
984 DECLARE_WAITQUEUE(wait, current);
985 ssize_t ret;
986 unsigned long flags;
987 unsigned swptr;
988 int cnt;
989
990 VALIDATE_STATE(s);
991 if (ppos != &file->f_pos)
992 return -ESPIPE;
993 if (s->dma_adc.mapped)
994 return -ENXIO;
995 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
996 return ret;
997 if (!access_ok(VERIFY_WRITE, buffer, count))
998 return -EFAULT;
999 ret = 0;
1000 add_wait_queue(&s->dma_adc.wait, &wait);
1001 while (count > 0) {
1002 spin_lock_irqsave(&s->lock, flags);
1003 swptr = s->dma_adc.swptr;
1004 cnt = s->dma_adc.dmasize-swptr;
1005 if (s->dma_adc.count < cnt)
1006 cnt = s->dma_adc.count;
1007 if (cnt <= 0)
1008 __set_current_state(TASK_INTERRUPTIBLE);
1009 spin_unlock_irqrestore(&s->lock, flags);
1010 if (cnt > count)
1011 cnt = count;
1012 #ifdef DEBUGREC
1013 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x DMAstat: 0x%02x DMAcnt: 0x%04x SBstat: 0x%02x cnt: %u\n",
1014 read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc), cnt);
1015 #endif
1016 if (cnt <= 0) {
1017 start_adc(s);
1018 #ifdef DEBUGREC
1019 printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
1020 KERN_DEBUG "solo1_read: regs: B1: 0x%02x B2: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n"
1021 KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1022 KERN_DEBUG "solo1_read: SBstat: 0x%02x cnt: %u\n",
1023 read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1024 read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1025 inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1026 #endif
1027 if (inb(s->ddmabase+15) & 1)
1028 printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1029 if (file->f_flags & O_NONBLOCK) {
1030 if (!ret)
1031 ret = -EAGAIN;
1032 break;
1033 }
1034 schedule();
1035 #ifdef DEBUGREC
1036 printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x A2: 0x%02x A4: 0x%02x A5: 0x%02x A8: 0x%02x\n"
1037 KERN_DEBUG "solo1_read: regs: B1: 0x%02x B2: 0x%02x B7: 0x%02x B8: 0x%02x B9: 0x%02x\n"
1038 KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1039 KERN_DEBUG "solo1_read: SBstat: 0x%02x cnt: %u\n",
1040 read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1041 read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1042 inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1043 #endif
1044 if (signal_pending(current)) {
1045 if (!ret)
1046 ret = -ERESTARTSYS;
1047 break;
1048 }
1049 continue;
1050 }
1051 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1052 if (!ret)
1053 ret = -EFAULT;
1054 break;
1055 }
1056 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1057 spin_lock_irqsave(&s->lock, flags);
1058 s->dma_adc.swptr = swptr;
1059 s->dma_adc.count -= cnt;
1060 spin_unlock_irqrestore(&s->lock, flags);
1061 count -= cnt;
1062 buffer += cnt;
1063 ret += cnt;
1064 start_adc(s);
1065 #ifdef DEBUGREC
1066 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x DMAstat: 0x%02x DMAcnt: 0x%04x SBstat: 0x%02x\n",
1067 read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc));
1068 #endif
1069 }
1070 remove_wait_queue(&s->dma_adc.wait, &wait);
1071 set_current_state(TASK_RUNNING);
1072 return ret;
1073 }
1074
1075 static ssize_t solo1_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1076 {
1077 struct solo1_state *s = (struct solo1_state *)file->private_data;
1078 DECLARE_WAITQUEUE(wait, current);
1079 ssize_t ret;
1080 unsigned long flags;
1081 unsigned swptr;
1082 int cnt;
1083
1084 VALIDATE_STATE(s);
1085 if (ppos != &file->f_pos)
1086 return -ESPIPE;
1087 if (s->dma_dac.mapped)
1088 return -ENXIO;
1089 if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1090 return ret;
1091 if (!access_ok(VERIFY_READ, buffer, count))
1092 return -EFAULT;
1093 #if 0
1094 printk(KERN_DEBUG "solo1_write: reg 70: 0x%02x 71: 0x%02x 72: 0x%02x 74: 0x%02x 76: 0x%02x 78: 0x%02x 7A: 0x%02x\n"
1095 KERN_DEBUG "solo1_write: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x SBstat: 0x%02x\n",
1096 read_mixer(s, 0x70), read_mixer(s, 0x71), read_mixer(s, 0x72), read_mixer(s, 0x74), read_mixer(s, 0x76),
1097 read_mixer(s, 0x78), read_mixer(s, 0x7a), inl(s->iobase), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1098 printk(KERN_DEBUG "solo1_write: reg 78: 0x%02x reg 7A: 0x%02x DMAcnt: 0x%04x DMAstat: 0x%02x SBstat: 0x%02x\n",
1099 read_mixer(s, 0x78), read_mixer(s, 0x7a), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1100 #endif
1101 ret = 0;
1102 add_wait_queue(&s->dma_dac.wait, &wait);
1103 while (count > 0) {
1104 spin_lock_irqsave(&s->lock, flags);
1105 if (s->dma_dac.count < 0) {
1106 s->dma_dac.count = 0;
1107 s->dma_dac.swptr = s->dma_dac.hwptr;
1108 }
1109 swptr = s->dma_dac.swptr;
1110 cnt = s->dma_dac.dmasize-swptr;
1111 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1112 cnt = s->dma_dac.dmasize - s->dma_dac.count;
1113 if (cnt <= 0)
1114 __set_current_state(TASK_INTERRUPTIBLE);
1115 spin_unlock_irqrestore(&s->lock, flags);
1116 if (cnt > count)
1117 cnt = count;
1118 if (cnt <= 0) {
1119 start_dac(s);
1120 if (file->f_flags & O_NONBLOCK) {
1121 if (!ret)
1122 ret = -EAGAIN;
1123 break;
1124 }
1125 schedule();
1126 if (signal_pending(current)) {
1127 if (!ret)
1128 ret = -ERESTARTSYS;
1129 break;
1130 }
1131 continue;
1132 }
1133 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1134 if (!ret)
1135 ret = -EFAULT;
1136 break;
1137 }
1138 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1139 spin_lock_irqsave(&s->lock, flags);
1140 s->dma_dac.swptr = swptr;
1141 s->dma_dac.count += cnt;
1142 s->dma_dac.endcleared = 0;
1143 spin_unlock_irqrestore(&s->lock, flags);
1144 count -= cnt;
1145 buffer += cnt;
1146 ret += cnt;
1147 start_dac(s);
1148 }
1149 remove_wait_queue(&s->dma_dac.wait, &wait);
1150 set_current_state(TASK_RUNNING);
1151 return ret;
1152 }
1153
1154 /* No kernel lock - we have our own spinlock */
1155 static unsigned int solo1_poll(struct file *file, struct poll_table_struct *wait)
1156 {
1157 struct solo1_state *s = (struct solo1_state *)file->private_data;
1158 unsigned long flags;
1159 unsigned int mask = 0;
1160
1161 VALIDATE_STATE(s);
1162 if (file->f_mode & FMODE_WRITE)
1163 poll_wait(file, &s->dma_dac.wait, wait);
1164 if (file->f_mode & FMODE_READ)
1165 poll_wait(file, &s->dma_adc.wait, wait);
1166 spin_lock_irqsave(&s->lock, flags);
1167 solo1_update_ptr(s);
1168 if (file->f_mode & FMODE_READ) {
1169 if (s->dma_adc.mapped) {
1170 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1171 mask |= POLLIN | POLLRDNORM;
1172 } else {
1173 if (s->dma_adc.count > 0)
1174 mask |= POLLIN | POLLRDNORM;
1175 }
1176 }
1177 if (file->f_mode & FMODE_WRITE) {
1178 if (s->dma_dac.mapped) {
1179 if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1180 mask |= POLLOUT | POLLWRNORM;
1181 } else {
1182 if ((signed)s->dma_dac.dmasize > s->dma_dac.count)
1183 mask |= POLLOUT | POLLWRNORM;
1184 }
1185 }
1186 spin_unlock_irqrestore(&s->lock, flags);
1187 return mask;
1188 }
1189
1190
1191 static int solo1_mmap(struct file *file, struct vm_area_struct *vma)
1192 {
1193 struct solo1_state *s = (struct solo1_state *)file->private_data;
1194 struct dmabuf *db;
1195 int ret;
1196 unsigned long size;
1197
1198 VALIDATE_STATE(s);
1199 if (vma->vm_flags & VM_WRITE) {
1200 if ((ret = prog_dmabuf_dac(s)) != 0)
1201 return ret;
1202 db = &s->dma_dac;
1203 } else if (vma->vm_flags & VM_READ) {
1204 if ((ret = prog_dmabuf_adc(s)) != 0)
1205 return ret;
1206 db = &s->dma_adc;
1207 } else
1208 return -EINVAL;
1209 if (vma->vm_pgoff != 0)
1210 return -EINVAL;
1211 size = vma->vm_end - vma->vm_start;
1212 if (size > (PAGE_SIZE << db->buforder))
1213 return -EINVAL;
1214 if (remap_page_range(vma->vm_start, virt_to_phys(db->rawbuf), size, vma->vm_page_prot))
1215 return -EAGAIN;
1216 db->mapped = 1;
1217 return 0;
1218 }
1219
1220 static int solo1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1221 {
1222 struct solo1_state *s = (struct solo1_state *)file->private_data;
1223 unsigned long flags;
1224 audio_buf_info abinfo;
1225 count_info cinfo;
1226 int val, mapped, ret, count;
1227 int div1, div2;
1228 unsigned rate1, rate2;
1229
1230 VALIDATE_STATE(s);
1231 mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1232 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1233 switch (cmd) {
1234 case OSS_GETVERSION:
1235 return put_user(SOUND_VERSION, (int *)arg);
1236
1237 case SNDCTL_DSP_SYNC:
1238 if (file->f_mode & FMODE_WRITE)
1239 return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1240 return 0;
1241
1242 case SNDCTL_DSP_SETDUPLEX:
1243 return 0;
1244
1245 case SNDCTL_DSP_GETCAPS:
1246 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, (int *)arg);
1247
1248 case SNDCTL_DSP_RESET:
1249 if (file->f_mode & FMODE_WRITE) {
1250 stop_dac(s);
1251 synchronize_irq();
1252 s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1253 }
1254 if (file->f_mode & FMODE_READ) {
1255 stop_adc(s);
1256 synchronize_irq();
1257 s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1258 }
1259 prog_codec(s);
1260 return 0;
1261
1262 case SNDCTL_DSP_SPEED:
1263 get_user_ret(val, (int *)arg, -EFAULT);
1264 if (val >= 0) {
1265 stop_adc(s);
1266 stop_dac(s);
1267 s->dma_adc.ready = s->dma_dac.ready = 0;
1268 /* program sampling rates */
1269 if (val > 48000)
1270 val = 48000;
1271 if (val < 6300)
1272 val = 6300;
1273 div1 = (768000 + val / 2) / val;
1274 rate1 = (768000 + div1 / 2) / div1;
1275 div1 = -div1;
1276 div2 = (793800 + val / 2) / val;
1277 rate2 = (793800 + div2 / 2) / div2;
1278 div2 = (-div2) & 0x7f;
1279 if (abs(val - rate2) < abs(val - rate1)) {
1280 rate1 = rate2;
1281 div1 = div2;
1282 }
1283 s->rate = rate1;
1284 s->clkdiv = div1;
1285 prog_codec(s);
1286 }
1287 return put_user(s->rate, (int *)arg);
1288
1289 case SNDCTL_DSP_STEREO:
1290 get_user_ret(val, (int *)arg, -EFAULT);
1291 stop_adc(s);
1292 stop_dac(s);
1293 s->dma_adc.ready = s->dma_dac.ready = 0;
1294 /* program channels */
1295 s->channels = val ? 2 : 1;
1296 prog_codec(s);
1297 return 0;
1298
1299 case SNDCTL_DSP_CHANNELS:
1300 get_user_ret(val, (int *)arg, -EFAULT);
1301 if (val != 0) {
1302 stop_adc(s);
1303 stop_dac(s);
1304 s->dma_adc.ready = s->dma_dac.ready = 0;
1305 /* program channels */
1306 s->channels = (val >= 2) ? 2 : 1;
1307 prog_codec(s);
1308 }
1309 return put_user(s->channels, (int *)arg);
1310
1311 case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1312 return put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, (int *)arg);
1313
1314 case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1315 get_user_ret(val, (int *)arg, -EFAULT);
1316 if (val != AFMT_QUERY) {
1317 stop_adc(s);
1318 stop_dac(s);
1319 s->dma_adc.ready = s->dma_dac.ready = 0;
1320 /* program format */
1321 if (val != AFMT_S16_LE && val != AFMT_U16_LE &&
1322 val != AFMT_S8 && val != AFMT_U8)
1323 val = AFMT_U8;
1324 s->fmt = val;
1325 prog_codec(s);
1326 }
1327 return put_user(s->fmt, (int *)arg);
1328
1329 case SNDCTL_DSP_POST:
1330 return 0;
1331
1332 case SNDCTL_DSP_GETTRIGGER:
1333 val = 0;
1334 if (file->f_mode & s->ena & FMODE_READ)
1335 val |= PCM_ENABLE_INPUT;
1336 if (file->f_mode & s->ena & FMODE_WRITE)
1337 val |= PCM_ENABLE_OUTPUT;
1338 return put_user(val, (int *)arg);
1339
1340 case SNDCTL_DSP_SETTRIGGER:
1341 get_user_ret(val, (int *)arg, -EFAULT);
1342 if (file->f_mode & FMODE_READ) {
1343 if (val & PCM_ENABLE_INPUT) {
1344 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1345 return ret;
1346 start_adc(s);
1347 if (inb(s->ddmabase+15) & 1)
1348 printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1349 } else
1350 stop_adc(s);
1351 }
1352 if (file->f_mode & FMODE_WRITE) {
1353 if (val & PCM_ENABLE_OUTPUT) {
1354 if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1355 return ret;
1356 start_dac(s);
1357 } else
1358 stop_dac(s);
1359 }
1360 return 0;
1361
1362 case SNDCTL_DSP_GETOSPACE:
1363 if (!(file->f_mode & FMODE_WRITE))
1364 return -EINVAL;
1365 if (!(s->ena & FMODE_WRITE) && (val = prog_dmabuf_dac(s)) != 0)
1366 return val;
1367 spin_lock_irqsave(&s->lock, flags);
1368 solo1_update_ptr(s);
1369 abinfo.fragsize = s->dma_dac.fragsize;
1370 count = s->dma_dac.count;
1371 if (count < 0)
1372 count = 0;
1373 abinfo.bytes = s->dma_dac.dmasize - count;
1374 abinfo.fragstotal = s->dma_dac.numfrag;
1375 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1376 spin_unlock_irqrestore(&s->lock, flags);
1377 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1378
1379 case SNDCTL_DSP_GETISPACE:
1380 if (!(file->f_mode & FMODE_READ))
1381 return -EINVAL;
1382 if (!(s->ena & FMODE_READ) && (val = prog_dmabuf_adc(s)) != 0)
1383 return val;
1384 spin_lock_irqsave(&s->lock, flags);
1385 solo1_update_ptr(s);
1386 abinfo.fragsize = s->dma_adc.fragsize;
1387 abinfo.bytes = s->dma_adc.count;
1388 abinfo.fragstotal = s->dma_adc.numfrag;
1389 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1390 spin_unlock_irqrestore(&s->lock, flags);
1391 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1392
1393 case SNDCTL_DSP_NONBLOCK:
1394 file->f_flags |= O_NONBLOCK;
1395 return 0;
1396
1397 case SNDCTL_DSP_GETODELAY:
1398 if (!(file->f_mode & FMODE_WRITE))
1399 return -EINVAL;
1400 spin_lock_irqsave(&s->lock, flags);
1401 solo1_update_ptr(s);
1402 count = s->dma_dac.count;
1403 spin_unlock_irqrestore(&s->lock, flags);
1404 if (count < 0)
1405 count = 0;
1406 return put_user(count, (int *)arg);
1407
1408 case SNDCTL_DSP_GETIPTR:
1409 if (!(file->f_mode & FMODE_READ))
1410 return -EINVAL;
1411 spin_lock_irqsave(&s->lock, flags);
1412 solo1_update_ptr(s);
1413 cinfo.bytes = s->dma_adc.total_bytes;
1414 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1415 cinfo.ptr = s->dma_adc.hwptr;
1416 if (s->dma_adc.mapped)
1417 s->dma_adc.count &= s->dma_adc.fragsize-1;
1418 spin_unlock_irqrestore(&s->lock, flags);
1419 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1420
1421 case SNDCTL_DSP_GETOPTR:
1422 if (!(file->f_mode & FMODE_WRITE))
1423 return -EINVAL;
1424 spin_lock_irqsave(&s->lock, flags);
1425 solo1_update_ptr(s);
1426 cinfo.bytes = s->dma_dac.total_bytes;
1427 count = s->dma_dac.count;
1428 if (count < 0)
1429 count = 0;
1430 cinfo.blocks = count >> s->dma_dac.fragshift;
1431 cinfo.ptr = s->dma_dac.hwptr;
1432 if (s->dma_dac.mapped)
1433 s->dma_dac.count &= s->dma_dac.fragsize-1;
1434 spin_unlock_irqrestore(&s->lock, flags);
1435 #if 0
1436 printk(KERN_DEBUG "esssolo1: GETOPTR: bytes %u blocks %u ptr %u, buforder %u numfrag %u fragshift %u\n"
1437 KERN_DEBUG "esssolo1: swptr %u count %u fragsize %u dmasize %u fragsamples %u\n",
1438 cinfo.bytes, cinfo.blocks, cinfo.ptr, s->dma_dac.buforder, s->dma_dac.numfrag, s->dma_dac.fragshift,
1439 s->dma_dac.swptr, s->dma_dac.count, s->dma_dac.fragsize, s->dma_dac.dmasize, s->dma_dac.fragsamples);
1440 #endif
1441 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo));
1442
1443 case SNDCTL_DSP_GETBLKSIZE:
1444 if (file->f_mode & FMODE_WRITE) {
1445 if ((val = prog_dmabuf_dac(s)))
1446 return val;
1447 return put_user(s->dma_dac.fragsize, (int *)arg);
1448 }
1449 if ((val = prog_dmabuf_adc(s)))
1450 return val;
1451 return put_user(s->dma_adc.fragsize, (int *)arg);
1452
1453 case SNDCTL_DSP_SETFRAGMENT:
1454 get_user_ret(val, (int *)arg, -EFAULT);
1455 if (file->f_mode & FMODE_READ) {
1456 s->dma_adc.ossfragshift = val & 0xffff;
1457 s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1458 if (s->dma_adc.ossfragshift < 4)
1459 s->dma_adc.ossfragshift = 4;
1460 if (s->dma_adc.ossfragshift > 15)
1461 s->dma_adc.ossfragshift = 15;
1462 if (s->dma_adc.ossmaxfrags < 4)
1463 s->dma_adc.ossmaxfrags = 4;
1464 }
1465 if (file->f_mode & FMODE_WRITE) {
1466 s->dma_dac.ossfragshift = val & 0xffff;
1467 s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1468 if (s->dma_dac.ossfragshift < 4)
1469 s->dma_dac.ossfragshift = 4;
1470 if (s->dma_dac.ossfragshift > 15)
1471 s->dma_dac.ossfragshift = 15;
1472 if (s->dma_dac.ossmaxfrags < 4)
1473 s->dma_dac.ossmaxfrags = 4;
1474 }
1475 return 0;
1476
1477 case SNDCTL_DSP_SUBDIVIDE:
1478 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1479 (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1480 return -EINVAL;
1481 get_user_ret(val, (int *)arg, -EFAULT);
1482 if (val != 1 && val != 2 && val != 4)
1483 return -EINVAL;
1484 if (file->f_mode & FMODE_READ)
1485 s->dma_adc.subdivision = val;
1486 if (file->f_mode & FMODE_WRITE)
1487 s->dma_dac.subdivision = val;
1488 return 0;
1489
1490 case SOUND_PCM_READ_RATE:
1491 return put_user(s->rate, (int *)arg);
1492
1493 case SOUND_PCM_READ_CHANNELS:
1494 return put_user(s->channels, (int *)arg);
1495
1496 case SOUND_PCM_READ_BITS:
1497 return put_user((s->fmt & (AFMT_S8|AFMT_U8)) ? 8 : 16, (int *)arg);
1498
1499 case SOUND_PCM_WRITE_FILTER:
1500 case SNDCTL_DSP_SETSYNCRO:
1501 case SOUND_PCM_READ_FILTER:
1502 return -EINVAL;
1503
1504 }
1505 return mixer_ioctl(s, cmd, arg);
1506 }
1507
1508 static int solo1_release(struct inode *inode, struct file *file)
1509 {
1510 struct solo1_state *s = (struct solo1_state *)file->private_data;
1511
1512 VALIDATE_STATE(s);
1513 if (file->f_mode & FMODE_WRITE)
1514 drain_dac(s, file->f_flags & O_NONBLOCK);
1515 down(&s->open_sem);
1516 if (file->f_mode & FMODE_WRITE) {
1517 stop_dac(s);
1518 outb(0, s->iobase+6); /* disable DMA */
1519 dealloc_dmabuf(s, &s->dma_dac);
1520 }
1521 if (file->f_mode & FMODE_READ) {
1522 stop_adc(s);
1523 outb(1, s->ddmabase+0xf); /* mask DMA channel */
1524 outb(0, s->ddmabase+0xd); /* DMA master clear */
1525 dealloc_dmabuf(s, &s->dma_adc);
1526 }
1527 s->open_mode &= ~(FMODE_READ | FMODE_WRITE);
1528 wake_up(&s->open_wait);
1529 up(&s->open_sem);
1530 return 0;
1531 }
1532
1533 static int solo1_open(struct inode *inode, struct file *file)
1534 {
1535 int minor = MINOR(inode->i_rdev);
1536 DECLARE_WAITQUEUE(wait, current);
1537 struct list_head *list;
1538 struct solo1_state *s;
1539
1540 for (list = devs.next; ; list = list->next) {
1541 if (list == &devs)
1542 return -ENODEV;
1543 s = list_entry(list, struct solo1_state, devs);
1544 if (!((s->dev_audio ^ minor) & ~0xf))
1545 break;
1546 }
1547 VALIDATE_STATE(s);
1548 file->private_data = s;
1549 /* wait for device to become free */
1550 down(&s->open_sem);
1551 while (s->open_mode & (FMODE_READ | FMODE_WRITE)) {
1552 if (file->f_flags & O_NONBLOCK) {
1553 up(&s->open_sem);
1554 return -EBUSY;
1555 }
1556 add_wait_queue(&s->open_wait, &wait);
1557 __set_current_state(TASK_INTERRUPTIBLE);
1558 up(&s->open_sem);
1559 schedule();
1560 remove_wait_queue(&s->open_wait, &wait);
1561 set_current_state(TASK_RUNNING);
1562 if (signal_pending(current))
1563 return -ERESTARTSYS;
1564 down(&s->open_sem);
1565 }
1566 s->fmt = AFMT_U8;
1567 s->channels = 1;
1568 s->rate = 8000;
1569 s->clkdiv = 96 | 0x80;
1570 s->ena = 0;
1571 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1572 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1573 s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1574 up(&s->open_sem);
1575 prog_codec(s);
1576 return 0;
1577 }
1578
1579 static /*const*/ struct file_operations solo1_audio_fops = {
1580 owner: THIS_MODULE,
1581 llseek: solo1_llseek,
1582 read: solo1_read,
1583 write: solo1_write,
1584 poll: solo1_poll,
1585 ioctl: solo1_ioctl,
1586 mmap: solo1_mmap,
1587 open: solo1_open,
1588 release: solo1_release,
1589 };
1590
1591 /* --------------------------------------------------------------------- */
1592
1593 /* hold spinlock for the following! */
1594 static void solo1_handle_midi(struct solo1_state *s)
1595 {
1596 unsigned char ch;
1597 int wake;
1598
1599 if (!(s->mpubase))
1600 return;
1601 wake = 0;
1602 while (!(inb(s->mpubase+1) & 0x80)) {
1603 ch = inb(s->mpubase);
1604 if (s->midi.icnt < MIDIINBUF) {
1605 s->midi.ibuf[s->midi.iwr] = ch;
1606 s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1607 s->midi.icnt++;
1608 }
1609 wake = 1;
1610 }
1611 if (wake)
1612 wake_up(&s->midi.iwait);
1613 wake = 0;
1614 while (!(inb(s->mpubase+1) & 0x40) && s->midi.ocnt > 0) {
1615 outb(s->midi.obuf[s->midi.ord], s->mpubase);
1616 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1617 s->midi.ocnt--;
1618 if (s->midi.ocnt < MIDIOUTBUF-16)
1619 wake = 1;
1620 }
1621 if (wake)
1622 wake_up(&s->midi.owait);
1623 }
1624
1625 static void solo1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1626 {
1627 struct solo1_state *s = (struct solo1_state *)dev_id;
1628 unsigned int intsrc;
1629
1630 /* fastpath out, to ease interrupt sharing */
1631 intsrc = inb(s->iobase+7); /* get interrupt source(s) */
1632 if (!intsrc)
1633 return;
1634 (void)inb(s->sbbase+0xe); /* clear interrupt */
1635 spin_lock(&s->lock);
1636 /* clear audio interrupts first */
1637 if (intsrc & 0x20)
1638 write_mixer(s, 0x7a, read_mixer(s, 0x7a) & 0x7f);
1639 solo1_update_ptr(s);
1640 solo1_handle_midi(s);
1641 spin_unlock(&s->lock);
1642 }
1643
1644 static void solo1_midi_timer(unsigned long data)
1645 {
1646 struct solo1_state *s = (struct solo1_state *)data;
1647 unsigned long flags;
1648
1649 spin_lock_irqsave(&s->lock, flags);
1650 solo1_handle_midi(s);
1651 spin_unlock_irqrestore(&s->lock, flags);
1652 s->midi.timer.expires = jiffies+1;
1653 add_timer(&s->midi.timer);
1654 }
1655
1656 /* --------------------------------------------------------------------- */
1657
1658 static ssize_t solo1_midi_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1659 {
1660 struct solo1_state *s = (struct solo1_state *)file->private_data;
1661 DECLARE_WAITQUEUE(wait, current);
1662 ssize_t ret;
1663 unsigned long flags;
1664 unsigned ptr;
1665 int cnt;
1666
1667 VALIDATE_STATE(s);
1668 if (ppos != &file->f_pos)
1669 return -ESPIPE;
1670 if (!access_ok(VERIFY_WRITE, buffer, count))
1671 return -EFAULT;
1672 if (count == 0)
1673 return 0;
1674 ret = 0;
1675 add_wait_queue(&s->midi.iwait, &wait);
1676 while (count > 0) {
1677 spin_lock_irqsave(&s->lock, flags);
1678 ptr = s->midi.ird;
1679 cnt = MIDIINBUF - ptr;
1680 if (s->midi.icnt < cnt)
1681 cnt = s->midi.icnt;
1682 if (cnt <= 0)
1683 __set_current_state(TASK_INTERRUPTIBLE);
1684 spin_unlock_irqrestore(&s->lock, flags);
1685 if (cnt > count)
1686 cnt = count;
1687 if (cnt <= 0) {
1688 if (file->f_flags & O_NONBLOCK) {
1689 if (!ret)
1690 ret = -EAGAIN;
1691 break;
1692 }
1693 schedule();
1694 if (signal_pending(current)) {
1695 if (!ret)
1696 ret = -ERESTARTSYS;
1697 break;
1698 }
1699 continue;
1700 }
1701 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
1702 if (!ret)
1703 ret = -EFAULT;
1704 break;
1705 }
1706 ptr = (ptr + cnt) % MIDIINBUF;
1707 spin_lock_irqsave(&s->lock, flags);
1708 s->midi.ird = ptr;
1709 s->midi.icnt -= cnt;
1710 spin_unlock_irqrestore(&s->lock, flags);
1711 count -= cnt;
1712 buffer += cnt;
1713 ret += cnt;
1714 break;
1715 }
1716 __set_current_state(TASK_RUNNING);
1717 remove_wait_queue(&s->midi.iwait, &wait);
1718 return ret;
1719 }
1720
1721 static ssize_t solo1_midi_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1722 {
1723 struct solo1_state *s = (struct solo1_state *)file->private_data;
1724 DECLARE_WAITQUEUE(wait, current);
1725 ssize_t ret;
1726 unsigned long flags;
1727 unsigned ptr;
1728 int cnt;
1729
1730 VALIDATE_STATE(s);
1731 if (ppos != &file->f_pos)
1732 return -ESPIPE;
1733 if (!access_ok(VERIFY_READ, buffer, count))
1734 return -EFAULT;
1735 if (count == 0)
1736 return 0;
1737 ret = 0;
1738 add_wait_queue(&s->midi.owait, &wait);
1739 while (count > 0) {
1740 spin_lock_irqsave(&s->lock, flags);
1741 ptr = s->midi.owr;
1742 cnt = MIDIOUTBUF - ptr;
1743 if (s->midi.ocnt + cnt > MIDIOUTBUF)
1744 cnt = MIDIOUTBUF - s->midi.ocnt;
1745 if (cnt <= 0) {
1746 __set_current_state(TASK_INTERRUPTIBLE);
1747 solo1_handle_midi(s);
1748 }
1749 spin_unlock_irqrestore(&s->lock, flags);
1750 if (cnt > count)
1751 cnt = count;
1752 if (cnt <= 0) {
1753 if (file->f_flags & O_NONBLOCK) {
1754 if (!ret)
1755 ret = -EAGAIN;
1756 break;
1757 }
1758 schedule();
1759 if (signal_pending(current)) {
1760 if (!ret)
1761 ret = -ERESTARTSYS;
1762 break;
1763 }
1764 continue;
1765 }
1766 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
1767 if (!ret)
1768 ret = -EFAULT;
1769 break;
1770 }
1771 ptr = (ptr + cnt) % MIDIOUTBUF;
1772 spin_lock_irqsave(&s->lock, flags);
1773 s->midi.owr = ptr;
1774 s->midi.ocnt += cnt;
1775 spin_unlock_irqrestore(&s->lock, flags);
1776 count -= cnt;
1777 buffer += cnt;
1778 ret += cnt;
1779 spin_lock_irqsave(&s->lock, flags);
1780 solo1_handle_midi(s);
1781 spin_unlock_irqrestore(&s->lock, flags);
1782 }
1783 __set_current_state(TASK_RUNNING);
1784 remove_wait_queue(&s->midi.owait, &wait);
1785 return ret;
1786 }
1787
1788 /* No kernel lock - we have our own spinlock */
1789 static unsigned int solo1_midi_poll(struct file *file, struct poll_table_struct *wait)
1790 {
1791 struct solo1_state *s = (struct solo1_state *)file->private_data;
1792 unsigned long flags;
1793 unsigned int mask = 0;
1794
1795 VALIDATE_STATE(s);
1796 if (file->f_flags & FMODE_WRITE)
1797 poll_wait(file, &s->midi.owait, wait);
1798 if (file->f_flags & FMODE_READ)
1799 poll_wait(file, &s->midi.iwait, wait);
1800 spin_lock_irqsave(&s->lock, flags);
1801 if (file->f_flags & FMODE_READ) {
1802 if (s->midi.icnt > 0)
1803 mask |= POLLIN | POLLRDNORM;
1804 }
1805 if (file->f_flags & FMODE_WRITE) {
1806 if (s->midi.ocnt < MIDIOUTBUF)
1807 mask |= POLLOUT | POLLWRNORM;
1808 }
1809 spin_unlock_irqrestore(&s->lock, flags);
1810 return mask;
1811 }
1812
1813 static int solo1_midi_open(struct inode *inode, struct file *file)
1814 {
1815 int minor = MINOR(inode->i_rdev);
1816 DECLARE_WAITQUEUE(wait, current);
1817 unsigned long flags;
1818 struct list_head *list;
1819 struct solo1_state *s;
1820
1821 for (list = devs.next; ; list = list->next) {
1822 if (list == &devs)
1823 return -ENODEV;
1824 s = list_entry(list, struct solo1_state, devs);
1825 if (s->dev_midi == minor)
1826 break;
1827 }
1828 VALIDATE_STATE(s);
1829 file->private_data = s;
1830 /* wait for device to become free */
1831 down(&s->open_sem);
1832 while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
1833 if (file->f_flags & O_NONBLOCK) {
1834 up(&s->open_sem);
1835 return -EBUSY;
1836 }
1837 add_wait_queue(&s->open_wait, &wait);
1838 __set_current_state(TASK_INTERRUPTIBLE);
1839 up(&s->open_sem);
1840 schedule();
1841 remove_wait_queue(&s->open_wait, &wait);
1842 set_current_state(TASK_RUNNING);
1843 if (signal_pending(current))
1844 return -ERESTARTSYS;
1845 down(&s->open_sem);
1846 }
1847 spin_lock_irqsave(&s->lock, flags);
1848 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1849 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1850 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1851 outb(0xff, s->mpubase+1); /* reset command */
1852 outb(0x3f, s->mpubase+1); /* uart command */
1853 if (!(inb(s->mpubase+1) & 0x80))
1854 inb(s->mpubase);
1855 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1856 outb(0xb0, s->iobase + 7); /* enable A1, A2, MPU irq's */
1857 init_timer(&s->midi.timer);
1858 s->midi.timer.expires = jiffies+1;
1859 s->midi.timer.data = (unsigned long)s;
1860 s->midi.timer.function = solo1_midi_timer;
1861 add_timer(&s->midi.timer);
1862 }
1863 if (file->f_mode & FMODE_READ) {
1864 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1865 }
1866 if (file->f_mode & FMODE_WRITE) {
1867 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1868 }
1869 spin_unlock_irqrestore(&s->lock, flags);
1870 s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
1871 up(&s->open_sem);
1872 return 0;
1873 }
1874
1875 static int solo1_midi_release(struct inode *inode, struct file *file)
1876 {
1877 struct solo1_state *s = (struct solo1_state *)file->private_data;
1878 DECLARE_WAITQUEUE(wait, current);
1879 unsigned long flags;
1880 unsigned count, tmo;
1881
1882 VALIDATE_STATE(s);
1883
1884 if (file->f_mode & FMODE_WRITE) {
1885 add_wait_queue(&s->midi.owait, &wait);
1886 for (;;) {
1887 __set_current_state(TASK_INTERRUPTIBLE);
1888 spin_lock_irqsave(&s->lock, flags);
1889 count = s->midi.ocnt;
1890 spin_unlock_irqrestore(&s->lock, flags);
1891 if (count <= 0)
1892 break;
1893 if (signal_pending(current))
1894 break;
1895 if (file->f_flags & O_NONBLOCK) {
1896 remove_wait_queue(&s->midi.owait, &wait);
1897 set_current_state(TASK_RUNNING);
1898 return -EBUSY;
1899 }
1900 tmo = (count * HZ) / 3100;
1901 if (!schedule_timeout(tmo ? : 1) && tmo)
1902 printk(KERN_DEBUG "solo1: midi timed out??\n");
1903 }
1904 remove_wait_queue(&s->midi.owait, &wait);
1905 set_current_state(TASK_RUNNING);
1906 }
1907 down(&s->open_sem);
1908 s->open_mode &= (~(file->f_mode << FMODE_MIDI_SHIFT)) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE);
1909 spin_lock_irqsave(&s->lock, flags);
1910 if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1911 outb(0x30, s->iobase + 7); /* enable A1, A2 irq's */
1912 del_timer(&s->midi.timer);
1913 }
1914 spin_unlock_irqrestore(&s->lock, flags);
1915 wake_up(&s->open_wait);
1916 up(&s->open_sem);
1917 return 0;
1918 }
1919
1920 static /*const*/ struct file_operations solo1_midi_fops = {
1921 owner: THIS_MODULE,
1922 llseek: solo1_llseek,
1923 read: solo1_midi_read,
1924 write: solo1_midi_write,
1925 poll: solo1_midi_poll,
1926 open: solo1_midi_open,
1927 release: solo1_midi_release,
1928 };
1929
1930 /* --------------------------------------------------------------------- */
1931
1932 static int solo1_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1933 {
1934 static const unsigned char op_offset[18] = {
1935 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
1936 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
1937 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
1938 };
1939 struct solo1_state *s = (struct solo1_state *)file->private_data;
1940 struct dm_fm_voice v;
1941 struct dm_fm_note n;
1942 struct dm_fm_params p;
1943 unsigned int io;
1944 unsigned int regb;
1945
1946 switch (cmd) {
1947 case FM_IOCTL_RESET:
1948 for (regb = 0xb0; regb < 0xb9; regb++) {
1949 outb(regb, s->sbbase);
1950 outb(0, s->sbbase+1);
1951 outb(regb, s->sbbase+2);
1952 outb(0, s->sbbase+3);
1953 }
1954 return 0;
1955
1956 case FM_IOCTL_PLAY_NOTE:
1957 if (copy_from_user(&n, (void *)arg, sizeof(n)))
1958 return -EFAULT;
1959 if (n.voice >= 18)
1960 return -EINVAL;
1961 if (n.voice >= 9) {
1962 regb = n.voice - 9;
1963 io = s->sbbase+2;
1964 } else {
1965 regb = n.voice;
1966 io = s->sbbase;
1967 }
1968 outb(0xa0 + regb, io);
1969 outb(n.fnum & 0xff, io+1);
1970 outb(0xb0 + regb, io);
1971 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
1972 return 0;
1973
1974 case FM_IOCTL_SET_VOICE:
1975 if (copy_from_user(&v, (void *)arg, sizeof(v)))
1976 return -EFAULT;
1977 if (v.voice >= 18)
1978 return -EINVAL;
1979 regb = op_offset[v.voice];
1980 io = s->sbbase + ((v.op & 1) << 1);
1981 outb(0x20 + regb, io);
1982 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
1983 ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
1984 outb(0x40 + regb, io);
1985 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
1986 outb(0x60 + regb, io);
1987 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
1988 outb(0x80 + regb, io);
1989 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
1990 outb(0xe0 + regb, io);
1991 outb(v.waveform & 0x7, io+1);
1992 if (n.voice >= 9) {
1993 regb = n.voice - 9;
1994 io = s->sbbase+2;
1995 } else {
1996 regb = n.voice;
1997 io = s->sbbase;
1998 }
1999 outb(0xc0 + regb, io);
2000 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2001 (v.connection & 1), io+1);
2002 return 0;
2003
2004 case FM_IOCTL_SET_PARAMS:
2005 if (copy_from_user(&p, (void *)arg, sizeof(p)))
2006 return -EFAULT;
2007 outb(0x08, s->sbbase);
2008 outb((p.kbd_split & 1) << 6, s->sbbase+1);
2009 outb(0xbd, s->sbbase);
2010 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2011 ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->sbbase+1);
2012 return 0;
2013
2014 case FM_IOCTL_SET_OPL:
2015 outb(4, s->sbbase+2);
2016 outb(arg, s->sbbase+3);
2017 return 0;
2018
2019 case FM_IOCTL_SET_MODE:
2020 outb(5, s->sbbase+2);
2021 outb(arg & 1, s->sbbase+3);
2022 return 0;
2023
2024 default:
2025 return -EINVAL;
2026 }
2027 }
2028
2029 static int solo1_dmfm_open(struct inode *inode, struct file *file)
2030 {
2031 int minor = MINOR(inode->i_rdev);
2032 DECLARE_WAITQUEUE(wait, current);
2033 struct list_head *list;
2034 struct solo1_state *s;
2035
2036 for (list = devs.next; ; list = list->next) {
2037 if (list == &devs)
2038 return -ENODEV;
2039 s = list_entry(list, struct solo1_state, devs);
2040 if (s->dev_dmfm == minor)
2041 break;
2042 }
2043 VALIDATE_STATE(s);
2044 file->private_data = s;
2045 /* wait for device to become free */
2046 down(&s->open_sem);
2047 while (s->open_mode & FMODE_DMFM) {
2048 if (file->f_flags & O_NONBLOCK) {
2049 up(&s->open_sem);
2050 return -EBUSY;
2051 }
2052 add_wait_queue(&s->open_wait, &wait);
2053 __set_current_state(TASK_INTERRUPTIBLE);
2054 up(&s->open_sem);
2055 schedule();
2056 remove_wait_queue(&s->open_wait, &wait);
2057 set_current_state(TASK_RUNNING);
2058 if (signal_pending(current))
2059 return -ERESTARTSYS;
2060 down(&s->open_sem);
2061 }
2062 if (check_region(s->sbbase, FMSYNTH_EXTENT)) {
2063 up(&s->open_sem);
2064 printk(KERN_ERR "solo1: FM synth io ports in use, opl3 loaded?\n");
2065 return -EBUSY;
2066 }
2067 request_region(s->sbbase, FMSYNTH_EXTENT, "ESS Solo1");
2068 /* init the stuff */
2069 outb(1, s->sbbase);
2070 outb(0x20, s->sbbase+1); /* enable waveforms */
2071 outb(4, s->sbbase+2);
2072 outb(0, s->sbbase+3); /* no 4op enabled */
2073 outb(5, s->sbbase+2);
2074 outb(1, s->sbbase+3); /* enable OPL3 */
2075 s->open_mode |= FMODE_DMFM;
2076 up(&s->open_sem);
2077 return 0;
2078 }
2079
2080 static int solo1_dmfm_release(struct inode *inode, struct file *file)
2081 {
2082 struct solo1_state *s = (struct solo1_state *)file->private_data;
2083 unsigned int regb;
2084
2085 VALIDATE_STATE(s);
2086 down(&s->open_sem);
2087 s->open_mode &= ~FMODE_DMFM;
2088 for (regb = 0xb0; regb < 0xb9; regb++) {
2089 outb(regb, s->sbbase);
2090 outb(0, s->sbbase+1);
2091 outb(regb, s->sbbase+2);
2092 outb(0, s->sbbase+3);
2093 }
2094 release_region(s->sbbase, FMSYNTH_EXTENT);
2095 wake_up(&s->open_wait);
2096 up(&s->open_sem);
2097 return 0;
2098 }
2099
2100 static /*const*/ struct file_operations solo1_dmfm_fops = {
2101 owner: THIS_MODULE,
2102 llseek: solo1_llseek,
2103 ioctl: solo1_dmfm_ioctl,
2104 open: solo1_dmfm_open,
2105 release: solo1_dmfm_release,
2106 };
2107
2108 /* --------------------------------------------------------------------- */
2109
2110 static struct initvol {
2111 int mixch;
2112 int vol;
2113 } initvol[] __initdata = {
2114 { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2115 { SOUND_MIXER_WRITE_PCM, 0x4040 },
2116 { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2117 { SOUND_MIXER_WRITE_CD, 0x4040 },
2118 { SOUND_MIXER_WRITE_LINE, 0x4040 },
2119 { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2120 { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2121 { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2122 { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2123 { SOUND_MIXER_WRITE_MIC, 0x4040 }
2124 };
2125
2126 static int setup_solo1(struct solo1_state *s)
2127 {
2128 struct pci_dev *pcidev = s->dev;
2129 mm_segment_t fs;
2130 int i, val;
2131
2132 /* initialize DDMA base address */
2133 printk(KERN_DEBUG "solo1: ddma base address: 0x%lx\n", s->ddmabase);
2134 pci_write_config_word(pcidev, 0x60, (s->ddmabase & (~0xf)) | 1);
2135 /* set DMA policy to DDMA, IRQ emulation off (CLKRUN disabled for now) */
2136 pci_write_config_dword(pcidev, 0x50, 0);
2137 /* disable legacy audio address decode */
2138 pci_write_config_word(pcidev, 0x40, 0x907f);
2139
2140 /* initialize the chips */
2141 if (!reset_ctrl(s)) {
2142 printk(KERN_ERR "esssolo1: cannot reset controller\n");
2143 return -1;
2144 }
2145 outb(0xb0, s->iobase+7); /* enable A1, A2, MPU irq's */
2146
2147 /* initialize mixer regs */
2148 write_mixer(s, 0x7f, 0); /* disable music digital recording */
2149 write_mixer(s, 0x7d, 0x0c); /* enable mic preamp, MONO_OUT is 2nd DAC right channel */
2150 write_mixer(s, 0x64, 0x45); /* volume control */
2151 write_mixer(s, 0x48, 0x10); /* enable music DAC/ES6xx interface */
2152 write_mixer(s, 0x50, 0); /* disable spatializer */
2153 write_mixer(s, 0x52, 0);
2154 write_mixer(s, 0x14, 0); /* DAC1 minimum volume */
2155 write_mixer(s, 0x71, 0x20); /* enable new 0xA1 reg format */
2156 outb(0, s->ddmabase+0xd); /* DMA master clear */
2157 outb(1, s->ddmabase+0xf); /* mask channel */
2158 /*outb(0, s->ddmabase+0x8);*/ /* enable controller (enable is low active!!) */
2159
2160 pci_set_master(pcidev); /* enable bus mastering */
2161
2162 fs = get_fs();
2163 set_fs(KERNEL_DS);
2164 val = SOUND_MASK_LINE;
2165 mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2166 for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2167 val = initvol[i].vol;
2168 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2169 }
2170 val = 1; /* enable mic preamp */
2171 mixer_ioctl(s, SOUND_MIXER_PRIVATE1, (unsigned long)&val);
2172 set_fs(fs);
2173 return 0;
2174 }
2175
2176 static int solo1_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data)
2177 {
2178 struct solo1_state *s = (struct solo1_state*) dev->data;
2179 if (s) {
2180 switch(rqst) {
2181 case PM_RESUME:
2182 setup_solo1(s);
2183 break;
2184
2185 case PM_SUSPEND:
2186 outb(0, s->iobase+6);
2187 /* DMA master clear */
2188 outb(0, s->ddmabase+0xd);
2189 /* reset sequencer and FIFO */
2190 outb(3, s->sbbase+6);
2191 /* turn off DDMA controller address space */
2192 pci_write_config_word(s->dev, 0x60, 0);
2193 break;
2194 }
2195 }
2196 return 0;
2197 }
2198
2199
2200 #define RSRCISIOREGION(dev,num) (pci_resource_start((dev), (num)) != 0 && \
2201 (pci_resource_flags((dev), (num)) & IORESOURCE_IO))
2202
2203 static int __devinit solo1_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2204 {
2205 struct solo1_state *s;
2206 struct pm_dev *pmdev;
2207 dma_addr_t dma_mask;
2208
2209 if (!RSRCISIOREGION(pcidev, 0) ||
2210 !RSRCISIOREGION(pcidev, 1) ||
2211 !RSRCISIOREGION(pcidev, 2) ||
2212 !RSRCISIOREGION(pcidev, 3))
2213 return -1;
2214 if (pcidev->irq == 0)
2215 return -1;
2216 if (pci_dma_supported(pcidev, 0x00ffffff)) {
2217 dma_mask = 0x00ffffff; /* this enables playback and recording */
2218 } else if (pci_dma_supported(pcidev, 0xffffffff)) {
2219 dma_mask = 0xffffffff; /* this enables only playback, as the recording BMDMA can handle only 24bits */
2220 } else {
2221 printk(KERN_WARNING "solo1: architecture does not support 24bit or 32bit PCI busmaster DMA\n");
2222 return -1;
2223 }
2224 if (!(s = kmalloc(sizeof(struct solo1_state), GFP_KERNEL))) {
2225 printk(KERN_WARNING "solo1: out of memory\n");
2226 return -1;
2227 }
2228 memset(s, 0, sizeof(struct solo1_state));
2229 init_waitqueue_head(&s->dma_adc.wait);
2230 init_waitqueue_head(&s->dma_dac.wait);
2231 init_waitqueue_head(&s->open_wait);
2232 init_waitqueue_head(&s->midi.iwait);
2233 init_waitqueue_head(&s->midi.owait);
2234 init_MUTEX(&s->open_sem);
2235 spin_lock_init(&s->lock);
2236 s->magic = SOLO1_MAGIC;
2237 s->dev = pcidev;
2238 s->iobase = pci_resource_start(pcidev, 0);
2239 s->sbbase = pci_resource_start(pcidev, 1);
2240 s->vcbase = pci_resource_start(pcidev, 2);
2241 s->ddmabase = s->vcbase + DDMABASE_OFFSET;
2242 s->mpubase = pci_resource_start(pcidev, 3);
2243 s->gpbase = pci_resource_start(pcidev, 4);
2244 s->irq = pcidev->irq;
2245 if (!request_region(s->iobase, IOBASE_EXTENT, "ESS Solo1")) {
2246 printk(KERN_ERR "solo1: io ports in use\n");
2247 goto err_region1;
2248 }
2249 if (!request_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT, "ESS Solo1")) {
2250 printk(KERN_ERR "solo1: io ports in use\n");
2251 goto err_region2;
2252 }
2253 if (!request_region(s->ddmabase, DDMABASE_EXTENT, "ESS Solo1")) {
2254 printk(KERN_ERR "solo1: io ports in use\n");
2255 goto err_region3;
2256 }
2257 if (!request_region(s->mpubase, MPUBASE_EXTENT, "ESS Solo1")) {
2258 printk(KERN_ERR "solo1: io ports in use\n");
2259 goto err_region4;
2260 }
2261 if (request_irq(s->irq, solo1_interrupt, SA_SHIRQ, "ESS Solo1", s)) {
2262 printk(KERN_ERR "solo1: irq %u in use\n", s->irq);
2263 goto err_irq;
2264 }
2265 if (pci_enable_device(pcidev))
2266 goto err_irq;
2267 printk(KERN_INFO "solo1: joystick port at %#lx\n", s->gpbase+1);
2268 /* register devices */
2269 if ((s->dev_audio = register_sound_dsp(&solo1_audio_fops, -1)) < 0)
2270 goto err_dev1;
2271 if ((s->dev_mixer = register_sound_mixer(&solo1_mixer_fops, -1)) < 0)
2272 goto err_dev2;
2273 if ((s->dev_midi = register_sound_midi(&solo1_midi_fops, -1)) < 0)
2274 goto err_dev3;
2275 if ((s->dev_dmfm = register_sound_special(&solo1_dmfm_fops, 15 /* ?? */)) < 0)
2276 goto err_dev4;
2277 if (setup_solo1(s))
2278 goto err;
2279 /* store it in the driver field */
2280 pcidev->driver_data = s;
2281 pcidev->dma_mask = dma_mask;
2282 /* put it into driver list */
2283 list_add_tail(&s->devs, &devs);
2284
2285 pmdev = pm_register(PM_PCI_DEV, PM_PCI_ID(pcidev), solo1_pm_callback);
2286 if (pmdev)
2287 pmdev->data = s;
2288
2289 return 0;
2290
2291 err:
2292 unregister_sound_dsp(s->dev_dmfm);
2293 err_dev4:
2294 unregister_sound_dsp(s->dev_midi);
2295 err_dev3:
2296 unregister_sound_mixer(s->dev_mixer);
2297 err_dev2:
2298 unregister_sound_dsp(s->dev_audio);
2299 err_dev1:
2300 printk(KERN_ERR "solo1: initialisation error\n");
2301 free_irq(s->irq, s);
2302 err_irq:
2303 release_region(s->iobase, IOBASE_EXTENT);
2304 err_region4:
2305 release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2306 err_region3:
2307 release_region(s->ddmabase, DDMABASE_EXTENT);
2308 err_region2:
2309 release_region(s->mpubase, MPUBASE_EXTENT);
2310 err_region1:
2311 kfree_s(s, sizeof(struct solo1_state));
2312 return -1;
2313 }
2314
2315 static void __devinit solo1_remove(struct pci_dev *dev)
2316 {
2317 struct solo1_state *s = (struct solo1_state *)dev->driver_data;
2318
2319 if (!s)
2320 return;
2321 list_del(&s->devs);
2322 /* stop DMA controller */
2323 outb(0, s->iobase+6);
2324 outb(0, s->ddmabase+0xd); /* DMA master clear */
2325 outb(3, s->sbbase+6); /* reset sequencer and FIFO */
2326 synchronize_irq();
2327 pci_write_config_word(s->dev, 0x60, 0); /* turn off DDMA controller address space */
2328 free_irq(s->irq, s);
2329 release_region(s->iobase, IOBASE_EXTENT);
2330 release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2331 release_region(s->ddmabase, DDMABASE_EXTENT);
2332 release_region(s->mpubase, MPUBASE_EXTENT);
2333 unregister_sound_dsp(s->dev_audio);
2334 unregister_sound_mixer(s->dev_mixer);
2335 unregister_sound_midi(s->dev_midi);
2336 unregister_sound_special(s->dev_dmfm);
2337 kfree_s(s, sizeof(struct solo1_state));
2338 dev->driver_data = NULL;
2339 }
2340
2341 static struct pci_device_id id_table[] __devinitdata = {
2342 { PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_SOLO1, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2343 { 0, }
2344 };
2345
2346 MODULE_DEVICE_TABLE(pci, id_table);
2347
2348 static struct pci_driver solo1_driver = {
2349 name: "ESS Solo1",
2350 id_table: id_table,
2351 probe: solo1_probe,
2352 remove: solo1_remove
2353 };
2354
2355
2356 static int __init init_solo1(void)
2357 {
2358 if (!pci_present()) /* No PCI bus in this machine! */
2359 return -ENODEV;
2360 printk(KERN_INFO "solo1: version v0.15 time " __TIME__ " " __DATE__ "\n");
2361 if (!pci_register_driver(&solo1_driver)) {
2362 pci_unregister_driver(&solo1_driver);
2363 return -ENODEV;
2364 }
2365 return 0;
2366 }
2367
2368 /* --------------------------------------------------------------------- */
2369
2370 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2371 MODULE_DESCRIPTION("ESS Solo1 Driver");
2372
2373 static void __exit cleanup_solo1(void)
2374 {
2375 printk(KERN_INFO "solo1: unloading\n");
2376 pci_unregister_driver(&solo1_driver);
2377 pm_unregister_all(solo1_pm_callback);
2378 }
2379
2380 /* --------------------------------------------------------------------- */
2381
2382 module_init(init_solo1);
2383 module_exit(cleanup_solo1);
2384
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