arch/mips/vr41xx/common/bcu.c

   1 /*
   2  * FILE NAME
   3  *      arch/mips/vr41xx/common/bcu.c
   4  *
   5  * BRIEF MODULE DESCRIPTION
   6  *      Bus Control Unit routines for the NEC VR4100 series.
   7  *
   8  * Author: Yoichi Yuasa
   9  *         yyuasa@mvista.com or source@mvista.com
  10  *
  11  * Copyright 2002 MontaVista Software Inc.
  12  *
  13  *  This program is free software; you can redistribute it and/or modify it
  14  *  under the terms of the GNU General Public License as published by the
  15  *  Free Software Foundation; either version 2 of the License, or (at your
  16  *  option) any later version.
  17  *
  18  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  19  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  20  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  23  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  24  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  25  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  26  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  27  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  *  You should have received a copy of the GNU General Public License along
  30  *  with this program; if not, write to the Free Software Foundation, Inc.,
  31  *  675 Mass Ave, Cambridge, MA 02139, USA.
  32  */
  33 /*
  34  * Changes:
  35  *  MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
  36  *  - Added support for NEC VR4111 and VR4121.
  37  *
  38  *  Paul Mundt <lethal@chaoticdreams.org>
  39  *  - Calculate mips_counter_frequency properly on VR4131.
  40  *
  41  *  MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com>
  42  *  - New creation, NEC VR4122 and VR4131 are supported.
  43  */
  44 #include <linux/init.h>
  45 #include <linux/types.h>
  46
  47 #include <asm/addrspace.h>
  48 #include <asm/cpu.h>
  49 #include <asm/io.h>
  50 #include <asm/time.h>
  51 #include <asm/vr41xx/vr41xx.h>
  52
  53 #define VR4111_CLKSPEEDREG      KSEG1ADDR(0x0b000014)
  54 #define VR4122_CLKSPEEDREG      KSEG1ADDR(0x0f000014)
  55 #define VR4131_CLKSPEEDREG      VR4122_CLKSPEEDREG
  56  #define CLKSP(x)               ((x) & 0x001f)
  57
  58  #define DIV2B                  0x8000
  59  #define DIV3B                  0x4000
  60  #define DIV4B                  0x2000
  61
  62  #define DIVT(x)                (((x) & 0xf000) >> 12)
  63  #define DIVVT(x)               (((x) & 0x0f00) >> 8)
  64
  65  #define TDIVMODE(x)            (2 << (((x) & 0x1000) >> 12))
  66  #define VTDIVMODE(x)           (((x) & 0x0700) >> 8)
  67
  68 unsigned long vr41xx_vtclock = 0;
  69
  70 static inline u16 read_clkspeed(void)
  71 {
  72         switch (current_cpu_data.cputype) {
  73         case CPU_VR4111:
  74         case CPU_VR4121: return readw(VR4111_CLKSPEEDREG);
  75         case CPU_VR4122: return readw(VR4122_CLKSPEEDREG);
  76         case CPU_VR4131: return readw(VR4131_CLKSPEEDREG);
  77         default:
  78                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
  79                 break;
  80         }
  81
  82         return 0;
  83 }
  84
  85 static inline unsigned long calculate_pclock(u16 clkspeed)
  86 {
  87         unsigned long pclock = 0;
  88
  89         switch (current_cpu_data.cputype) {
  90         case CPU_VR4111:
  91         case CPU_VR4121:
  92                 pclock = 18432000 * 64;
  93                 break;
  94         case CPU_VR4122:
  95                 pclock = 18432000 * 98;
  96                 break;
  97         case CPU_VR4131:
  98                 pclock = 18432000 * 108;
  99                 break;
 100         default:
 101                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
 102                 break;
 103         }
 104
 105         pclock /= CLKSP(clkspeed);
 106         printk(KERN_INFO "PClock: %ldHz\n", pclock);
 107
 108         return pclock;
 109 }
 110
 111 static inline unsigned long calculate_vtclock(u16 clkspeed, unsigned long pclock)
 112 {
 113         switch (current_cpu_data.cputype) {
 114         case CPU_VR4111:
 115                 /* The NEC VR4111 doesn't have the VTClock. */
 116                 break;
 117         case CPU_VR4121:
 118                 vr41xx_vtclock = pclock;
 119                 /* DIVVT == 9 Divide by 1.5 . VTClock = (PClock * 6) / 9 */
 120                 if (DIVVT(clkspeed) == 9)
 121                         vr41xx_vtclock = pclock * 6;
 122                 /* DIVVT == 10 Divide by 2.5 . VTClock = (PClock * 4) / 10 */
 123                 else if (DIVVT(clkspeed) == 10)
 124                         vr41xx_vtclock = pclock * 4;
 125                 vr41xx_vtclock /= DIVVT(clkspeed);
 126                 printk(KERN_INFO "VTClock: %ldHz\n", vr41xx_vtclock);
 127                 break;
 128         case CPU_VR4122:
 129                 if(VTDIVMODE(clkspeed) == 7)
 130                         vr41xx_vtclock = pclock / 1;
 131                 else if(VTDIVMODE(clkspeed) == 1)
 132                         vr41xx_vtclock = pclock / 2;
 133                 else
 134                         vr41xx_vtclock = pclock / VTDIVMODE(clkspeed);
 135                 printk(KERN_INFO "VTClock: %ldHz\n", vr41xx_vtclock);
 136                 break;
 137         case CPU_VR4131:
 138                 vr41xx_vtclock = pclock / VTDIVMODE(clkspeed);
 139                 printk(KERN_INFO "VTClock: %ldHz\n", vr41xx_vtclock);
 140                 break;
 141         default:
 142                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
 143                 break;
 144         }
 145
 146         return vr41xx_vtclock;
 147 }
 148
 149 static inline unsigned long calculate_tclock(u16 clkspeed, unsigned long pclock,
 150                                              unsigned long vtclock)
 151 {
 152         unsigned long tclock = 0;
 153
 154         switch (current_cpu_data.cputype) {
 155         case CPU_VR4111:
 156                 if (!(clkspeed & DIV2B))
 157                         tclock = pclock / 2;
 158                 else if (!(clkspeed & DIV3B))
 159                         tclock = pclock / 3;
 160                 else if (!(clkspeed & DIV4B))
 161                         tclock = pclock / 4;
 162                 break;
 163         case CPU_VR4121:
 164                 tclock = pclock / DIVT(clkspeed);
 165                 break;
 166         case CPU_VR4122:
 167         case CPU_VR4131:
 168                 tclock = vtclock / TDIVMODE(clkspeed);
 169                 break;
 170         default:
 171                 printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n");
 172                 break;
 173         }
 174
 175         printk(KERN_INFO "TClock: %ldHz\n", tclock);
 176
 177         return tclock;
 178 }
 179
 180 static inline unsigned long calculate_mips_counter_frequency(unsigned long tclock)
 181 {
 182         /*
 183          * VR4131 Revision 2.0 and 2.1 use a value of (tclock / 2).
 184          */
 185         if ((current_cpu_data.processor_id == PRID_VR4131_REV2_0) ||
 186             (current_cpu_data.processor_id == PRID_VR4131_REV2_1))
 187                 tclock /= 2;
 188         else
 189                 tclock /= 4;
 190
 191         return tclock;
 192 }
 193
 194 void __init vr41xx_bcu_init(void)
 195 {
 196         unsigned long pclock, vtclock, tclock;
 197         u16 clkspeed;
 198
 199         clkspeed = read_clkspeed();
 200
 201         pclock = calculate_pclock(clkspeed);
 202         vtclock = calculate_vtclock(clkspeed, pclock);
 203         tclock = calculate_tclock(clkspeed, pclock, vtclock);
 204
 205         mips_counter_frequency = calculate_mips_counter_frequency(tclock);
 206 }