it87: Copyright update
[linux-2.6/linux-mips.git] / drivers / serial / crisv10.h
blobf30b93d6ef79ff85e7a0318eba71880d3c6a6686
1 /*
2 * serial.h: Arch-dep definitions for the Etrax100 serial driver.
4 * Copyright (C) 1998, 1999, 2000 Axis Communications AB
5 */
7 #ifndef _ETRAX_SERIAL_H
8 #define _ETRAX_SERIAL_H
10 #include <linux/circ_buf.h>
11 #include <asm/termios.h>
13 /* Software state per channel */
15 #ifdef __KERNEL__
17 * This is our internal structure for each serial port's state.
19 * Many fields are paralleled by the structure used by the serial_struct
20 * structure.
22 * For definitions of the flags field, see tty.h
25 #define SERIAL_RECV_DESCRIPTORS 8
27 struct etrax_recv_buffer {
28 struct etrax_recv_buffer *next;
29 unsigned short length;
30 unsigned char error;
31 unsigned char pad;
33 unsigned char buffer[0];
36 struct e100_serial {
37 int baud;
38 volatile u8 *port; /* R_SERIALx_CTRL */
39 u32 irq; /* bitnr in R_IRQ_MASK2 for dmaX_descr */
41 /* Output registers */
42 volatile u8 *oclrintradr; /* adr to R_DMA_CHx_CLR_INTR */
43 volatile u32 *ofirstadr; /* adr to R_DMA_CHx_FIRST */
44 volatile u8 *ocmdadr; /* adr to R_DMA_CHx_CMD */
45 const volatile u8 *ostatusadr; /* adr to R_DMA_CHx_STATUS */
47 /* Input registers */
48 volatile u8 *iclrintradr; /* adr to R_DMA_CHx_CLR_INTR */
49 volatile u32 *ifirstadr; /* adr to R_DMA_CHx_FIRST */
50 volatile u8 *icmdadr; /* adr to R_DMA_CHx_CMD */
51 volatile u32 *idescradr; /* adr to R_DMA_CHx_DESCR */
53 int flags; /* defined in tty.h */
55 u8 rx_ctrl; /* shadow for R_SERIALx_REC_CTRL */
56 u8 tx_ctrl; /* shadow for R_SERIALx_TR_CTRL */
57 u8 iseteop; /* bit number for R_SET_EOP for the input dma */
58 int enabled; /* Set to 1 if the port is enabled in HW config */
60 u8 dma_out_enabled:1; /* Set to 1 if DMA should be used */
61 u8 dma_in_enabled:1; /* Set to 1 if DMA should be used */
63 /* end of fields defined in rs_table[] in .c-file */
64 u8 uses_dma_in; /* Set to 1 if DMA is used */
65 u8 uses_dma_out; /* Set to 1 if DMA is used */
66 u8 forced_eop; /* a fifo eop has been forced */
67 int baud_base; /* For special baudrates */
68 int custom_divisor; /* For special baudrates */
69 struct etrax_dma_descr tr_descr;
70 struct etrax_dma_descr rec_descr[SERIAL_RECV_DESCRIPTORS];
71 int cur_rec_descr;
73 volatile int tr_running; /* 1 if output is running */
75 struct tty_struct *tty;
76 int read_status_mask;
77 int ignore_status_mask;
78 int x_char; /* xon/xoff character */
79 int close_delay;
80 unsigned short closing_wait;
81 unsigned short closing_wait2;
82 unsigned long event;
83 unsigned long last_active;
84 int line;
85 int type; /* PORT_ETRAX */
86 int count; /* # of fd on device */
87 int blocked_open; /* # of blocked opens */
88 struct circ_buf xmit;
89 struct etrax_recv_buffer *first_recv_buffer;
90 struct etrax_recv_buffer *last_recv_buffer;
91 unsigned int recv_cnt;
92 unsigned int max_recv_cnt;
94 struct work_struct work;
95 struct async_icount icount; /* error-statistics etc.*/
96 struct termios normal_termios;
97 struct termios callout_termios;
98 #ifdef DECLARE_WAITQUEUE
99 wait_queue_head_t open_wait;
100 wait_queue_head_t close_wait;
101 #else
102 struct wait_queue *open_wait;
103 struct wait_queue *close_wait;
104 #endif
106 unsigned long char_time_usec; /* The time for 1 char, in usecs */
107 unsigned long flush_time_usec; /* How often we should flush */
108 unsigned long last_tx_active_usec; /* Last tx usec in the jiffies */
109 unsigned long last_tx_active; /* Last tx time in jiffies */
110 unsigned long last_rx_active_usec; /* Last rx usec in the jiffies */
111 unsigned long last_rx_active; /* Last rx time in jiffies */
113 int break_detected_cnt;
114 int errorcode;
116 #ifdef CONFIG_ETRAX_RS485
117 struct rs485_control rs485; /* RS-485 support */
118 #endif
121 /* this PORT is not in the standard serial.h. it's not actually used for
122 * anything since we only have one type of async serial-port anyway in this
123 * system.
126 #define PORT_ETRAX 1
129 * Events are used to schedule things to happen at timer-interrupt
130 * time, instead of at rs interrupt time.
132 #define RS_EVENT_WRITE_WAKEUP 0
134 #endif /* __KERNEL__ */
136 #endif /* !_ETRAX_SERIAL_H */