Goodbye mips64. 31704 lines of code bite the dust.
[linux-2.6/linux-mips.git] / include / asm-mips / stackframe.h
blob298dc4f6dd2e9c0b3a38ab4787ab091bb70f6e41
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle
7 * Copyright (C) 1994, 1995, 1996 Paul M. Antoine.
8 * Copyright (C) 1999 Silicon Graphics, Inc.
9 */
10 #ifndef _ASM_STACKFRAME_H
11 #define _ASM_STACKFRAME_H
13 #include <linux/config.h>
14 #include <linux/threads.h>
16 #include <asm/asm.h>
17 #include <asm/mipsregs.h>
18 #include <asm/offset.h>
20 .macro SAVE_AT
21 .set push
22 .set noat
23 LONG_S $1, PT_R1(sp)
24 .set pop
25 .endm
27 .macro SAVE_TEMP
28 mfhi v1
29 LONG_S $8, PT_R8(sp)
30 LONG_S $9, PT_R9(sp)
31 LONG_S v1, PT_HI(sp)
32 mflo v1
33 LONG_S $10, PT_R10(sp)
34 LONG_S $11, PT_R11(sp)
35 LONG_S v1, PT_LO(sp)
36 LONG_S $12, PT_R12(sp)
37 LONG_S $13, PT_R13(sp)
38 LONG_S $14, PT_R14(sp)
39 LONG_S $15, PT_R15(sp)
40 LONG_S $24, PT_R24(sp)
41 .endm
43 .macro SAVE_STATIC
44 LONG_S $16, PT_R16(sp)
45 LONG_S $17, PT_R17(sp)
46 LONG_S $18, PT_R18(sp)
47 LONG_S $19, PT_R19(sp)
48 LONG_S $20, PT_R20(sp)
49 LONG_S $21, PT_R21(sp)
50 LONG_S $22, PT_R22(sp)
51 LONG_S $23, PT_R23(sp)
52 LONG_S $30, PT_R30(sp)
53 .endm
55 #ifdef CONFIG_SMP
56 .macro get_saved_sp /* SMP variation */
57 #ifdef CONFIG_MIPS32
58 mfc0 k0, CP0_CONTEXT
59 lui k1, %hi(kernelsp)
60 srl k0, k0, 23
61 sll k0, k0, 2
62 addu k1, k0
63 LONG_L k1, %lo(kernelsp)(k1)
64 #endif
65 #ifdef CONFIG_MIPS64
66 MFC0 k1, CP0_CONTEXT
67 dsra k1, 23
68 lui k0, %hi(pgd_current)
69 daddiu k0, %lo(pgd_current)
70 dsubu k1, k0
71 lui k0, %hi(kernelsp)
72 daddu k1, k0
73 LONG_L k1, %lo(kernelsp)(k1)
74 #endif
75 .endm
77 .macro set_saved_sp stackp temp temp2
78 #ifdef CONFIG_MIPS32
79 mfc0 \temp, CP0_CONTEXT
80 srl \temp, 23
81 sll \temp, 2
82 LONG_S \stackp, kernelsp(temp)
83 #endif
84 #ifdef CONFIG_MIPS64
85 lw \temp, TI_CPU(gp)
86 dsll \temp, 3
87 lui \temp2, %hi(kernelsp)
88 daddu \temp, \temp2
89 LONG_S \stackp, %lo(kernelsp)(\temp)
90 #endif
91 .endm
92 #else
93 .macro get_saved_sp /* Uniprocessor variation */
94 lui k1, %hi(kernelsp)
95 LONG_L k1, %lo(kernelsp)(k1)
96 .endm
98 .macro set_saved_sp stackp temp temp2
99 LONG_S \stackp, kernelsp
100 .endm
101 #endif
103 #ifdef CONFIG_PREEMPT
104 .macro bump_lock_count
105 lw t0, TI_PRE_COUNT($28)
106 addiu t0, t0, 1
107 sw t0, TI_PRE_COUNT($28)
108 .endm
109 #else
110 .macro bump_lock_count
111 .endm
112 #endif
114 .macro SAVE_SOME
115 .set push
116 .set reorder
117 mfc0 k0, CP0_STATUS
118 sll k0, 3 /* extract cu0 bit */
119 .set noreorder
120 bltz k0, 8f
121 move k1, sp
122 .set reorder
123 /* Called from user mode, new stack. */
124 get_saved_sp
125 8: move k0, sp
126 PTR_SUBU sp, k1, PT_SIZE
127 LONG_S k0, PT_R29(sp)
128 LONG_S $3, PT_R3(sp)
129 LONG_S $0, PT_R0(sp)
130 mfc0 v1, CP0_STATUS
131 LONG_S $2, PT_R2(sp)
132 LONG_S v1, PT_STATUS(sp)
133 LONG_S $4, PT_R4(sp)
134 mfc0 v1, CP0_CAUSE
135 LONG_S $5, PT_R5(sp)
136 LONG_S v1, PT_CAUSE(sp)
137 LONG_S $6, PT_R6(sp)
138 MFC0 v1, CP0_EPC
139 LONG_S $7, PT_R7(sp)
140 LONG_S v1, PT_EPC(sp)
141 LONG_S $25, PT_R25(sp)
142 LONG_S $28, PT_R28(sp)
143 LONG_S $31, PT_R31(sp)
144 ori $28, sp, _THREAD_MASK
145 xori $28, _THREAD_MASK
146 bump_lock_count
147 .set pop
148 .endm
150 .macro SAVE_ALL
151 SAVE_SOME
152 SAVE_AT
153 SAVE_TEMP
154 SAVE_STATIC
155 .endm
157 .macro RESTORE_AT
158 .set push
159 .set noat
160 LONG_L $1, PT_R1(sp)
161 .set pop
162 .endm
164 .macro RESTORE_TEMP
165 LONG_L $24, PT_LO(sp)
166 LONG_L $8, PT_R8(sp)
167 LONG_L $9, PT_R9(sp)
168 mtlo $24
169 LONG_L $24, PT_HI(sp)
170 LONG_L $10, PT_R10(sp)
171 LONG_L $11, PT_R11(sp)
172 mthi $24
173 LONG_L $12, PT_R12(sp)
174 LONG_L $13, PT_R13(sp)
175 LONG_L $14, PT_R14(sp)
176 LONG_L $15, PT_R15(sp)
177 LONG_L $24, PT_R24(sp)
178 .endm
180 .macro RESTORE_STATIC
181 LONG_L $16, PT_R16(sp)
182 LONG_L $17, PT_R17(sp)
183 LONG_L $18, PT_R18(sp)
184 LONG_L $19, PT_R19(sp)
185 LONG_L $20, PT_R20(sp)
186 LONG_L $21, PT_R21(sp)
187 LONG_L $22, PT_R22(sp)
188 LONG_L $23, PT_R23(sp)
189 LONG_L $30, PT_R30(sp)
190 .endm
192 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
194 .macro RESTORE_SOME
195 .set push
196 .set reorder
197 mfc0 t0, CP0_STATUS
198 .set pop
199 ori t0, 0x1f
200 xori t0, 0x1f
201 mtc0 t0, CP0_STATUS
202 li v1, 0xff00
203 and t0, v1
204 LONG_L v0, PT_STATUS(sp)
205 nor v1, $0, v1
206 and v0, v1
207 or v0, t0
208 mtc0 v0, CP0_STATUS
209 LONG_L $31, PT_R31(sp)
210 LONG_L $28, PT_R28(sp)
211 LONG_L $25, PT_R25(sp)
212 LONG_L $7, PT_R7(sp)
213 LONG_L $6, PT_R6(sp)
214 LONG_L $5, PT_R5(sp)
215 LONG_L $4, PT_R4(sp)
216 LONG_L $3, PT_R3(sp)
217 LONG_L $2, PT_R2(sp)
218 .endm
220 .macro RESTORE_SP_AND_RET
221 .set push
222 .set noreorder
223 LONG_L k0, PT_EPC(sp)
224 LONG_L sp, PT_R29(sp)
225 jr k0
227 .set pop
228 .endm
230 #else
232 .macro RESTORE_SOME
233 .set push
234 .set reorder
235 mfc0 t0, CP0_STATUS
236 .set pop
237 ori t0, 0x1f
238 xori t0, 0x1f
239 mtc0 t0, CP0_STATUS
240 li v1, 0xff00
241 and t0, v1
242 LONG_L v0, PT_STATUS(sp)
243 nor v1, $0, v1
244 and v0, v1
245 or v0, t0
246 mtc0 v0, CP0_STATUS
247 LONG_L v1, PT_EPC(sp)
248 MTC0 v1, CP0_EPC
249 LONG_L $31, PT_R31(sp)
250 LONG_L $28, PT_R28(sp)
251 LONG_L $25, PT_R25(sp)
252 LONG_L $7, PT_R7(sp)
253 LONG_L $6, PT_R6(sp)
254 LONG_L $5, PT_R5(sp)
255 LONG_L $4, PT_R4(sp)
256 LONG_L $3, PT_R3(sp)
257 LONG_L $2, PT_R2(sp)
258 .endm
260 .macro RESTORE_SP_AND_RET
261 LONG_L sp, PT_R29(sp)
262 .set mips3
263 eret
264 .set mips0
265 .endm
267 #endif
269 .macro RESTORE_SP
270 LONG_L sp, PT_R29(sp)
271 .endm
273 .macro RESTORE_ALL
274 RESTORE_SOME
275 RESTORE_AT
276 RESTORE_TEMP
277 RESTORE_STATIC
278 RESTORE_SP
279 .endm
281 .macro RESTORE_ALL_AND_RET
282 RESTORE_SOME
283 RESTORE_AT
284 RESTORE_TEMP
285 RESTORE_STATIC
286 RESTORE_SP_AND_RET
287 .endm
290 * Move to kernel mode and disable interrupts.
291 * Set cp0 enable bit as sign that we're running on the kernel stack
293 .macro CLI
294 mfc0 t0, CP0_STATUS
295 li t1, ST0_CU0 | 0x1f
296 or t0, t1
297 xori t0, 0x1f
298 mtc0 t0, CP0_STATUS
299 .endm
302 * Move to kernel mode and enable interrupts.
303 * Set cp0 enable bit as sign that we're running on the kernel stack
305 .macro STI
306 mfc0 t0, CP0_STATUS
307 li t1, ST0_CU0 | 0x1f
308 or t0, t1
309 xori t0, 0x1e
310 mtc0 t0, CP0_STATUS
311 .endm
314 * Just move to kernel mode and leave interrupts as they are.
315 * Set cp0 enable bit as sign that we're running on the kernel stack
317 .macro KMODE
318 mfc0 t0, CP0_STATUS
319 li t1, ST0_CU0 | 0x1e
320 or t0, t1
321 xori t0, 0x1e
322 mtc0 t0, CP0_STATUS
323 .endm
325 #endif /* _ASM_STACKFRAME_H */