arch/x86_64/kernel/setup64.c

   1 /*
   2  * X86-64 specific CPU setup.
   3  * Copyright (C) 1995  Linus Torvalds
   4  * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
   5  * See setup.c for older changelog.
   6  * $Id: setup64.c,v 1.12 2002/03/21 10:09:17 ak Exp $
   7  */
   8 #include <linux/config.h>
   9 #include <linux/init.h>
  10 #include <linux/kernel.h>
  11 #include <linux/sched.h>
  12 #include <linux/string.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/bitops.h>
  15 #include <linux/module.h>
  16 #include <asm/bootsetup.h>
  17 #include <asm/pda.h>
  18 #include <asm/pgtable.h>
  19 #include <asm/processor.h>
  20 #include <asm/desc.h>
  21 #include <asm/atomic.h>
  22 #include <asm/mmu_context.h>
  23 #include <asm/smp.h>
  24 #include <asm/i387.h>
  25 #include <asm/percpu.h>
  26 #include <asm/proto.h>
  27 #include <asm/sections.h>
  28
  29 char x86_boot_params[BOOT_PARAM_SIZE] __initdata = {0,};
  30
  31 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
  32
  33 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
  34 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
  35
  36 struct desc_ptr idt_descr = { 256 * 16, (unsigned long) idt_table };
  37
  38 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
  39
  40 unsigned long __supported_pte_mask __read_mostly = ~0UL;
  41 static int do_not_nx __cpuinitdata = 0;
  42
  43 /* noexec=on|off
  44 Control non executable mappings for 64bit processes.
  45
  46 on      Enable(default)
  47 off     Disable
  48 */
  49 int __init nonx_setup(char *str)
  50 {
  51         if (!strncmp(str, "on", 2)) {
  52                 __supported_pte_mask |= _PAGE_NX;
  53                 do_not_nx = 0;
  54         } else if (!strncmp(str, "off", 3)) {
  55                 do_not_nx = 1;
  56                 __supported_pte_mask &= ~_PAGE_NX;
  57         }
  58         return 0;
  59 }
  60 __setup("noexec=", nonx_setup); /* parsed early actually */
  61
  62 int force_personality32 = READ_IMPLIES_EXEC;
  63
  64 /* noexec32=on|off
  65 Control non executable heap for 32bit processes.
  66 To control the stack too use noexec=off
  67
  68 on      PROT_READ does not imply PROT_EXEC for 32bit processes
  69 off     PROT_READ implies PROT_EXEC (default)
  70 */
  71 static int __init nonx32_setup(char *str)
  72 {
  73         if (!strcmp(str, "on"))
  74                 force_personality32 &= ~READ_IMPLIES_EXEC;
  75         else if (!strcmp(str, "off"))
  76                 force_personality32 |= READ_IMPLIES_EXEC;
  77         return 0;
  78 }
  79 __setup("noexec32=", nonx32_setup);
  80
  81 /*
  82  * Great future plan:
  83  * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
  84  * Always point %gs to its beginning
  85  */
  86 void __init setup_per_cpu_areas(void)
  87 {
  88         int i;
  89         unsigned long size;
  90
  91 #ifdef CONFIG_HOTPLUG_CPU
  92         prefill_possible_map();
  93 #endif
  94
  95         /* Copy section for each CPU (we discard the original) */
  96         size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
  97 #ifdef CONFIG_MODULES
  98         if (size < PERCPU_ENOUGH_ROOM)
  99                 size = PERCPU_ENOUGH_ROOM;
 100 #endif
 101
 102         for_each_cpu_mask (i, cpu_possible_map) {
 103                 char *ptr;
 104
 105                 if (!NODE_DATA(cpu_to_node(i))) {
 106                         printk("cpu with no node %d, num_online_nodes %d\n",
 107                                i, num_online_nodes());
 108                         ptr = alloc_bootmem(size);
 109                 } else {
 110                         ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
 111                 }
 112                 if (!ptr)
 113                         panic("Cannot allocate cpu data for CPU %d\n", i);
 114                 cpu_pda(i)->data_offset = ptr - __per_cpu_start;
 115                 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
 116         }
 117 }
 118
 119 void pda_init(int cpu)
 120 {
 121         struct x8664_pda *pda = cpu_pda(cpu);
 122
 123         /* Setup up data that may be needed in __get_free_pages early */
 124         asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
 125         wrmsrl(MSR_GS_BASE, pda);
 126
 127         pda->cpunumber = cpu;
 128         pda->irqcount = -1;
 129         pda->kernelstack =
 130                 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
 131         pda->active_mm = &init_mm;
 132         pda->mmu_state = 0;
 133
 134         if (cpu == 0) {
 135                 /* others are initialized in smpboot.c */
 136                 pda->pcurrent = &init_task;
 137                 pda->irqstackptr = boot_cpu_stack;
 138         } else {
 139                 pda->irqstackptr = (char *)
 140                         __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
 141                 if (!pda->irqstackptr)
 142                         panic("cannot allocate irqstack for cpu %d", cpu);
 143         }
 144
 145
 146         pda->irqstackptr += IRQSTACKSIZE-64;
 147 }
 148
 149 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
 150 __attribute__((section(".bss.page_aligned")));
 151
 152 /* May not be marked __init: used by software suspend */
 153 void syscall_init(void)
 154 {
 155         /*
 156          * LSTAR and STAR live in a bit strange symbiosis.
 157          * They both write to the same internal register. STAR allows to set CS/DS
 158          * but only a 32bit target. LSTAR sets the 64bit rip.
 159          */
 160         wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
 161         wrmsrl(MSR_LSTAR, system_call);
 162
 163 #ifdef CONFIG_IA32_EMULATION
 164         syscall32_cpu_init ();
 165 #endif
 166
 167         /* Flags to clear on syscall */
 168         wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
 169 }
 170
 171 void __cpuinit check_efer(void)
 172 {
 173         unsigned long efer;
 174
 175         rdmsrl(MSR_EFER, efer);
 176         if (!(efer & EFER_NX) || do_not_nx) {
 177                 __supported_pte_mask &= ~_PAGE_NX;
 178         }
 179 }
 180
 181 /*
 182  * cpu_init() initializes state that is per-CPU. Some data is already
 183  * initialized (naturally) in the bootstrap process, such as the GDT
 184  * and IDT. We reload them nevertheless, this function acts as a
 185  * 'CPU state barrier', nothing should get across.
 186  * A lot of state is already set up in PDA init.
 187  */
 188 void __cpuinit cpu_init (void)
 189 {
 190         int cpu = stack_smp_processor_id();
 191         struct tss_struct *t = &per_cpu(init_tss, cpu);
 192         unsigned long v;
 193         char *estacks = NULL;
 194         struct task_struct *me;
 195         int i;
 196
 197         /* CPU 0 is initialised in head64.c */
 198         if (cpu != 0) {
 199                 pda_init(cpu);
 200                 zap_low_mappings(cpu);
 201         } else
 202                 estacks = boot_exception_stacks;
 203
 204         me = current;
 205
 206         if (cpu_test_and_set(cpu, cpu_initialized))
 207                 panic("CPU#%d already initialized!\n", cpu);
 208
 209         printk("Initializing CPU#%d\n", cpu);
 210
 211         clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 212
 213         /*
 214          * Initialize the per-CPU GDT with the boot GDT,
 215          * and set up the GDT descriptor:
 216          */
 217         if (cpu)
 218                 memcpy(cpu_gdt(cpu), cpu_gdt_table, GDT_SIZE);
 219
 220         cpu_gdt_descr[cpu].size = GDT_SIZE;
 221         asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
 222         asm volatile("lidt %0" :: "m" (idt_descr));
 223
 224         memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
 225         syscall_init();
 226
 227         wrmsrl(MSR_FS_BASE, 0);
 228         wrmsrl(MSR_KERNEL_GS_BASE, 0);
 229         barrier();
 230
 231         check_efer();
 232
 233         /*
 234          * set up and load the per-CPU TSS
 235          */
 236         for (v = 0; v < N_EXCEPTION_STACKS; v++) {
 237                 if (cpu) {
 238                         static const unsigned int order[N_EXCEPTION_STACKS] = {
 239                                 [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
 240                                 [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
 241                         };
 242
 243                         estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
 244                         if (!estacks)
 245                                 panic("Cannot allocate exception stack %ld %d\n",
 246                                       v, cpu);
 247                 }
 248                 switch (v + 1) {
 249 #if DEBUG_STKSZ > EXCEPTION_STKSZ
 250                 case DEBUG_STACK:
 251                         cpu_pda[cpu].debugstack = (unsigned long)estacks;
 252                         estacks += DEBUG_STKSZ;
 253                         break;
 254 #endif
 255                 default:
 256                         estacks += EXCEPTION_STKSZ;
 257                         break;
 258                 }
 259                 t->ist[v] = (unsigned long)estacks;
 260         }
 261
 262         t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
 263         /*
 264          * <= is required because the CPU will access up to
 265          * 8 bits beyond the end of the IO permission bitmap.
 266          */
 267         for (i = 0; i <= IO_BITMAP_LONGS; i++)
 268                 t->io_bitmap[i] = ~0UL;
 269
 270         atomic_inc(&init_mm.mm_count);
 271         me->active_mm = &init_mm;
 272         if (me->mm)
 273                 BUG();
 274         enter_lazy_tlb(&init_mm, me);
 275
 276         set_tss_desc(cpu, t);
 277         load_TR_desc();
 278         load_LDT(&init_mm.context);
 279
 280         /*
 281          * Clear all 6 debug registers:
 282          */
 283
 284         set_debug(0UL, 0);
 285         set_debug(0UL, 1);
 286         set_debug(0UL, 2);
 287         set_debug(0UL, 3);
 288         set_debug(0UL, 6);
 289         set_debug(0UL, 7);
 290
 291         fpu_init();
 292 }