include/asm-sparc64/pgtable.h

   1 /* $Id: pgtable.h,v 1.126 2000/05/05 21:57:03 davem Exp $
   2  * pgtable.h: SpitFire page table operations.
   3  *
   4  * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
   6  */
   7
   8 #ifndef _SPARC64_PGTABLE_H
   9 #define _SPARC64_PGTABLE_H
  10
  11 /* This file contains the functions and defines necessary to modify and use
  12  * the SpitFire page tables.
  13  */
  14
  15 #include <asm/spitfire.h>
  16 #include <asm/asi.h>
  17 #include <asm/mmu_context.h>
  18 #include <asm/system.h>
  19
  20 #ifndef __ASSEMBLY__
  21
  22 /* Certain architectures need to do special things when pte's
  23  * within a page table are directly modified.  Thus, the following
  24  * hook is made available.
  25  */
  26 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
  27
  28 /* PMD_SHIFT determines the size of the area a second-level page table can map */
  29 #define PMD_SHIFT       (PAGE_SHIFT + (PAGE_SHIFT-3))
  30 #define PMD_SIZE        (1UL << PMD_SHIFT)
  31 #define PMD_MASK        (~(PMD_SIZE-1))
  32
  33 /* PGDIR_SHIFT determines what a third-level page table entry can map */
  34 #define PGDIR_SHIFT     (PAGE_SHIFT + (PAGE_SHIFT-3) + (PAGE_SHIFT-2))
  35 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  36 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  37
  38 /* Entries per page directory level. */
  39 #define PTRS_PER_PTE            (1UL << (PAGE_SHIFT-3))
  40
  41 /* We the first one in this file, what we export to the kernel
  42  * is different so we can optimize correctly for 32-bit tasks.
  43  */
  44 #define REAL_PTRS_PER_PMD       (1UL << (PAGE_SHIFT-2))
  45 #define PTRS_PER_PMD            ((const int)((current->thread.flags & SPARC_FLAG_32BIT) ? \
  46                                  (REAL_PTRS_PER_PMD >> 2) : (REAL_PTRS_PER_PMD)))
  47
  48 /* We cannot use the top 16G because VPTE table lives there. */
  49 #define PTRS_PER_PGD            ((1UL << (PAGE_SHIFT-3))-1)
  50
  51 /* Kernel has a separate 44bit address space. */
  52 #define USER_PTRS_PER_PGD       ((const int)((current->thread.flags & SPARC_FLAG_32BIT) ? \
  53                                  (1) : (PTRS_PER_PGD)))
  54 #define FIRST_USER_PGD_NR       0
  55
  56 #define PTE_TABLE_SIZE  0x2000  /* 1024 entries 8 bytes each */
  57 #define PMD_TABLE_SIZE  0x2000  /* 2048 entries 4 bytes each */
  58 #define PGD_TABLE_SIZE  0x1000  /* 1024 entries 4 bytes each */
  59
  60 /* the no. of pointers that fit on a page */
  61 #define PTRS_PER_PAGE   (1UL << (PAGE_SHIFT-3))
  62
  63 /* NOTE: TLB miss handlers depend heavily upon where this is. */
  64 #define VMALLOC_START           0x0000000140000000UL
  65 #define VMALLOC_VMADDR(x)       ((unsigned long)(x))
  66 #define VMALLOC_END             0x0000000200000000UL
  67
  68 #define pte_ERROR(e)    __builtin_trap()
  69 #define pmd_ERROR(e)    __builtin_trap()
  70 #define pgd_ERROR(e)    __builtin_trap()
  71
  72 #endif /* !(__ASSEMBLY__) */
  73
  74 /* SpitFire TTE bits. */
  75 #define _PAGE_VALID     0x8000000000000000      /* Valid TTE                          */
  76 #define _PAGE_R         0x8000000000000000      /* Used to keep ref bit up to date    */
  77 #define _PAGE_SZ4MB     0x6000000000000000      /* 4MB Page                           */
  78 #define _PAGE_SZ512K    0x4000000000000000      /* 512K Page                          */
  79 #define _PAGE_SZ64K     0x2000000000000000      /* 64K Page                           */
  80 #define _PAGE_SZ8K      0x0000000000000000      /* 8K Page                            */
  81 #define _PAGE_NFO       0x1000000000000000      /* No Fault Only                      */
  82 #define _PAGE_IE        0x0800000000000000      /* Invert Endianness                  */
  83 #define _PAGE_SOFT2     0x07FC000000000000      /* Second set of software bits        */
  84 #define _PAGE_DIAG      0x0003FE0000000000      /* Diagnostic TTE bits                */
  85 #define _PAGE_PADDR     0x000001FFFFFFE000      /* Physical Address bits [40:13]      */
  86 #define _PAGE_SOFT      0x0000000000001F80      /* First set of software bits         */
  87 #define _PAGE_L         0x0000000000000040      /* Locked TTE                         */
  88 #define _PAGE_CP        0x0000000000000020      /* Cacheable in Physical Cache        */
  89 #define _PAGE_CV        0x0000000000000010      /* Cacheable in Virtual Cache         */
  90 #define _PAGE_E         0x0000000000000008      /* side-Effect                        */
  91 #define _PAGE_P         0x0000000000000004      /* Privileged Page                    */
  92 #define _PAGE_W         0x0000000000000002      /* Writable                           */
  93 #define _PAGE_G         0x0000000000000001      /* Global                             */
  94
  95 /* Here are the SpitFire software bits we use in the TTE's. */
  96 #define _PAGE_MODIFIED  0x0000000000000800      /* Modified Page (ie. dirty)          */
  97 #define _PAGE_ACCESSED  0x0000000000000400      /* Accessed Page (ie. referenced)     */
  98 #define _PAGE_READ      0x0000000000000200      /* Readable SW Bit                    */
  99 #define _PAGE_WRITE     0x0000000000000100      /* Writable SW Bit                    */
 100 #define _PAGE_PRESENT   0x0000000000000080      /* Present Page (ie. not swapped out) */
 101
 102 #define _PAGE_CACHE     (_PAGE_CP | _PAGE_CV)
 103
 104 #define __DIRTY_BITS    (_PAGE_MODIFIED | _PAGE_WRITE | _PAGE_W)
 105 #define __ACCESS_BITS   (_PAGE_ACCESSED | _PAGE_READ | _PAGE_R)
 106 #define __PRIV_BITS     _PAGE_P
 107
 108 #define PAGE_NONE       __pgprot (_PAGE_PRESENT | _PAGE_ACCESSED)
 109
 110 /* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */
 111 #define PAGE_SHARED     __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
 112                                   __ACCESS_BITS | _PAGE_WRITE)
 113
 114 #define PAGE_COPY       __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
 115                                   __ACCESS_BITS)
 116
 117 #define PAGE_READONLY   __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
 118                                   __ACCESS_BITS)
 119
 120 #define PAGE_KERNEL     __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
 121                                   __PRIV_BITS | __ACCESS_BITS | __DIRTY_BITS)
 122
 123 #define PAGE_INVALID    __pgprot (0)
 124
 125 #define _PFN_MASK       _PAGE_PADDR
 126
 127 #define _PAGE_CHG_MASK  (_PFN_MASK | _PAGE_MODIFIED | _PAGE_ACCESSED | _PAGE_PRESENT)
 128
 129 #define pg_iobits (_PAGE_VALID | _PAGE_PRESENT | __DIRTY_BITS | __ACCESS_BITS | _PAGE_E)
 130
 131 #define __P000  PAGE_NONE
 132 #define __P001  PAGE_READONLY
 133 #define __P010  PAGE_COPY
 134 #define __P011  PAGE_COPY
 135 #define __P100  PAGE_READONLY
 136 #define __P101  PAGE_READONLY
 137 #define __P110  PAGE_COPY
 138 #define __P111  PAGE_COPY
 139
 140 #define __S000  PAGE_NONE
 141 #define __S001  PAGE_READONLY
 142 #define __S010  PAGE_SHARED
 143 #define __S011  PAGE_SHARED
 144 #define __S100  PAGE_READONLY
 145 #define __S101  PAGE_READONLY
 146 #define __S110  PAGE_SHARED
 147 #define __S111  PAGE_SHARED
 148
 149 #ifndef __ASSEMBLY__
 150
 151 extern pte_t __bad_page(void);
 152
 153 #define BAD_PAGE        __bad_page()
 154
 155 extern unsigned long phys_base;
 156
 157 #define ZERO_PAGE(vaddr)        (mem_map)
 158
 159 /* Warning: These take pointers to page structs now... */
 160 #define mk_pte(page, pgprot)            \
 161         __pte((((page - mem_map) << PAGE_SHIFT)+phys_base) | pgprot_val(pgprot))
 162 #define page_pte_prot(page, prot)       mk_pte(page, prot)
 163 #define page_pte(page)                  page_pte_prot(page, __pgprot(0))
 164
 165 #define mk_pte_phys(physpage, pgprot)   (__pte((physpage) | pgprot_val(pgprot)))
 166
 167 extern inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
 168 {
 169         pte_t __pte;
 170
 171         pte_val(__pte) = (pte_val(orig_pte) & _PAGE_CHG_MASK) |
 172                 pgprot_val(new_prot);
 173
 174         return __pte;
 175 }
 176 #define pmd_set(pmdp, ptep)     \
 177         (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
 178 #define pgd_set(pgdp, pmdp)     \
 179         (pgd_val(*(pgdp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
 180 #define pte_pagenr(pte)   (((unsigned long) ((pte_val(pte)&~PAGE_OFFSET)-phys_base)>>PAGE_SHIFT))
 181 #define pmd_page(pmd)                   ((unsigned long) __va((pmd_val(pmd)<<11UL)))
 182 #define pgd_page(pgd)                   ((unsigned long) __va((pgd_val(pgd)<<11UL)))
 183 #define pte_none(pte)                   (!pte_val(pte))
 184 #define pte_present(pte)                (pte_val(pte) & _PAGE_PRESENT)
 185 #define pte_clear(pte)                  (pte_val(*(pte)) = 0UL)
 186 #define pmd_none(pmd)                   (!pmd_val(pmd))
 187 #define pmd_bad(pmd)                    (0)
 188 #define pmd_present(pmd)                (pmd_val(pmd) != 0UL)
 189 #define pmd_clear(pmdp)                 (pmd_val(*(pmdp)) = 0UL)
 190 #define pgd_none(pgd)                   (!pgd_val(pgd))
 191 #define pgd_bad(pgd)                    (0)
 192 #define pgd_present(pgd)                (pgd_val(pgd) != 0UL)
 193 #define pgd_clear(pgdp)                 (pgd_val(*(pgdp)) = 0UL)
 194
 195 /* The following only work if pte_present() is true.
 196  * Undefined behaviour if not..
 197  */
 198 #define pte_read(pte)           (pte_val(pte) & _PAGE_READ)
 199 #define pte_exec(pte)           pte_read(pte)
 200 #define pte_write(pte)          (pte_val(pte) & _PAGE_WRITE)
 201 #define pte_dirty(pte)          (pte_val(pte) & _PAGE_MODIFIED)
 202 #define pte_young(pte)          (pte_val(pte) & _PAGE_ACCESSED)
 203 #define pte_wrprotect(pte)      (__pte(pte_val(pte) & ~(_PAGE_WRITE|_PAGE_W)))
 204 #define pte_rdprotect(pte)      (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_READ))
 205 #define pte_mkclean(pte)        (__pte(pte_val(pte) & ~(_PAGE_MODIFIED|_PAGE_W)))
 206 #define pte_mkold(pte)          (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_ACCESSED))
 207
 208 /* Permanent address of a page. */
 209 #define __page_address(page)    ((page)->virtual)
 210 #define page_address(page)      ({ __page_address(page); })
 211
 212 #define pte_page(x) (mem_map+pte_pagenr(x))
 213
 214 /* Be very careful when you change these three, they are delicate. */
 215 #define pte_mkyoung(pte)        (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R))
 216 #define pte_mkwrite(pte)        (__pte(pte_val(pte) | _PAGE_WRITE))
 217 #define pte_mkdirty(pte)        (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W))
 218
 219 /* to find an entry in a page-table-directory. */
 220 #define pgd_index(address)      (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD))
 221 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
 222
 223 /* to find an entry in a kernel page-table-directory */
 224 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 225
 226 /* Find an entry in the second-level page table.. */
 227 #define pmd_offset(dir, address)        ((pmd_t *) pgd_page(*(dir)) + \
 228                                         ((address >> PMD_SHIFT) & (REAL_PTRS_PER_PMD-1)))
 229
 230 /* Find an entry in the third-level page table.. */
 231 #define pte_offset(dir, address)        ((pte_t *) pmd_page(*(dir)) + \
 232                                         ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
 233
 234 extern pgd_t swapper_pg_dir[1];
 235
 236 /* These do nothing with the way I have things setup. */
 237 #define mmu_lockarea(vaddr, len)                (vaddr)
 238 #define mmu_unlockarea(vaddr, len)              do { } while(0)
 239
 240 extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte);
 241
 242 #define flush_icache_page(vma, pg)      do { } while(0)
 243
 244 /* Make a non-present pseudo-TTE. */
 245 extern inline pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space)
 246 {
 247         pte_t pte;
 248         pte_val(pte) = ((page) | pgprot_val(prot) | _PAGE_E) & ~(unsigned long)_PAGE_CACHE;
 249         pte_val(pte) |= (((unsigned long)space) << 32);
 250         return pte;
 251 }
 252
 253 /* Encode and de-code a swap entry */
 254 #define SWP_TYPE(entry)         (((entry).val >> PAGE_SHIFT) & 0xff)
 255 #define SWP_OFFSET(entry)       ((entry).val >> (PAGE_SHIFT + 8))
 256 #define SWP_ENTRY(type, offset) \
 257         ( (swp_entry_t) \
 258           { \
 259                 ((type << PAGE_SHIFT) | (offset << (PAGE_SHIFT + 8))) \
 260           } )
 261 #define pte_to_swp_entry(pte)           ((swp_entry_t) { pte_val(pte) })
 262 #define swp_entry_to_pte(x)             ((pte_t) { (x).val })
 263
 264 extern __inline__ unsigned long
 265 sun4u_get_pte (unsigned long addr)
 266 {
 267         pgd_t *pgdp;
 268         pmd_t *pmdp;
 269         pte_t *ptep;
 270
 271         if (addr >= PAGE_OFFSET)
 272                 return addr & _PAGE_PADDR;
 273         pgdp = pgd_offset_k (addr);
 274         pmdp = pmd_offset (pgdp, addr);
 275         ptep = pte_offset (pmdp, addr);
 276         return pte_val (*ptep) & _PAGE_PADDR;
 277 }
 278
 279 extern __inline__ unsigned long
 280 __get_phys (unsigned long addr)
 281 {
 282         return sun4u_get_pte (addr);
 283 }
 284
 285 extern __inline__ int
 286 __get_iospace (unsigned long addr)
 287 {
 288         return ((sun4u_get_pte (addr) & 0xf0000000) >> 28);
 289 }
 290
 291 extern void * module_map (unsigned long size);
 292 extern void module_unmap (void *addr);
 293 extern unsigned long *sparc64_valid_addr_bitmap;
 294
 295 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
 296 #define kern_addr_valid(addr)   \
 297         (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
 298
 299 extern int io_remap_page_range(unsigned long from, unsigned long offset,
 300                                unsigned long size, pgprot_t prot, int space);
 301
 302 #endif /* !(__ASSEMBLY__) */
 303
 304 /* We provide our own get_unmapped_area to cope with VA holes for userland */
 305 #define HAVE_ARCH_UNMAPPED_AREA
 306
 307 #endif /* !(_SPARC64_PGTABLE_H) */