[PATCH] x86_64: Port over e820 gap detection from i386
[linux-2.6/linux-mips.git] / arch / x86_64 / kernel / setup.c
blob57f619052badd62e28b29e0ed0bef1bfa49ba7ed
1 /*
2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
9 * $Id$
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/root_dev.h>
39 #include <linux/pci.h>
40 #include <linux/acpi.h>
41 #include <linux/kallsyms.h>
42 #include <linux/edd.h>
43 #include <asm/mtrr.h>
44 #include <asm/uaccess.h>
45 #include <asm/system.h>
46 #include <asm/io.h>
47 #include <asm/smp.h>
48 #include <asm/msr.h>
49 #include <asm/desc.h>
50 #include <video/edid.h>
51 #include <asm/e820.h>
52 #include <asm/dma.h>
53 #include <asm/mpspec.h>
54 #include <asm/mmu_context.h>
55 #include <asm/bootsetup.h>
56 #include <asm/proto.h>
57 #include <asm/setup.h>
58 #include <asm/mach_apic.h>
59 #include <asm/numa.h>
62 * Machine setup..
65 struct cpuinfo_x86 boot_cpu_data;
67 unsigned long mmu_cr4_features;
69 int acpi_disabled;
70 EXPORT_SYMBOL(acpi_disabled);
71 #ifdef CONFIG_ACPI_BOOT
72 extern int __initdata acpi_ht;
73 extern acpi_interrupt_flags acpi_sci_flags;
74 int __initdata acpi_force = 0;
75 #endif
77 int acpi_numa __initdata;
79 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
80 int bootloader_type;
82 unsigned long saved_video_mode;
84 #ifdef CONFIG_SWIOTLB
85 int swiotlb;
86 EXPORT_SYMBOL(swiotlb);
87 #endif
90 * Setup options
92 struct drive_info_struct { char dummy[32]; } drive_info;
93 struct screen_info screen_info;
94 struct sys_desc_table_struct {
95 unsigned short length;
96 unsigned char table[0];
99 struct edid_info edid_info;
100 struct e820map e820;
102 extern int root_mountflags;
103 extern char _text, _etext, _edata, _end;
105 char command_line[COMMAND_LINE_SIZE];
107 struct resource standard_io_resources[] = {
108 { .name = "dma1", .start = 0x00, .end = 0x1f,
109 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
110 { .name = "pic1", .start = 0x20, .end = 0x21,
111 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
112 { .name = "timer0", .start = 0x40, .end = 0x43,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "timer1", .start = 0x50, .end = 0x53,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "keyboard", .start = 0x60, .end = 0x6f,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "pic2", .start = 0xa0, .end = 0xa1,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "dma2", .start = 0xc0, .end = 0xdf,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "fpu", .start = 0xf0, .end = 0xff,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
128 #define STANDARD_IO_RESOURCES \
129 (sizeof standard_io_resources / sizeof standard_io_resources[0])
131 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
133 struct resource data_resource = {
134 .name = "Kernel data",
135 .start = 0,
136 .end = 0,
137 .flags = IORESOURCE_RAM,
139 struct resource code_resource = {
140 .name = "Kernel code",
141 .start = 0,
142 .end = 0,
143 .flags = IORESOURCE_RAM,
146 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
148 static struct resource system_rom_resource = {
149 .name = "System ROM",
150 .start = 0xf0000,
151 .end = 0xfffff,
152 .flags = IORESOURCE_ROM,
155 static struct resource extension_rom_resource = {
156 .name = "Extension ROM",
157 .start = 0xe0000,
158 .end = 0xeffff,
159 .flags = IORESOURCE_ROM,
162 static struct resource adapter_rom_resources[] = {
163 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
164 .flags = IORESOURCE_ROM },
165 { .name = "Adapter ROM", .start = 0, .end = 0,
166 .flags = IORESOURCE_ROM },
167 { .name = "Adapter ROM", .start = 0, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM },
173 { .name = "Adapter ROM", .start = 0, .end = 0,
174 .flags = IORESOURCE_ROM }
177 #define ADAPTER_ROM_RESOURCES \
178 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
180 static struct resource video_rom_resource = {
181 .name = "Video ROM",
182 .start = 0xc0000,
183 .end = 0xc7fff,
184 .flags = IORESOURCE_ROM,
187 static struct resource video_ram_resource = {
188 .name = "Video RAM area",
189 .start = 0xa0000,
190 .end = 0xbffff,
191 .flags = IORESOURCE_RAM,
194 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
196 static int __init romchecksum(unsigned char *rom, unsigned long length)
198 unsigned char *p, sum = 0;
200 for (p = rom; p < rom + length; p++)
201 sum += *p;
202 return sum == 0;
205 static void __init probe_roms(void)
207 unsigned long start, length, upper;
208 unsigned char *rom;
209 int i;
211 /* video rom */
212 upper = adapter_rom_resources[0].start;
213 for (start = video_rom_resource.start; start < upper; start += 2048) {
214 rom = isa_bus_to_virt(start);
215 if (!romsignature(rom))
216 continue;
218 video_rom_resource.start = start;
220 /* 0 < length <= 0x7f * 512, historically */
221 length = rom[2] * 512;
223 /* if checksum okay, trust length byte */
224 if (length && romchecksum(rom, length))
225 video_rom_resource.end = start + length - 1;
227 request_resource(&iomem_resource, &video_rom_resource);
228 break;
231 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
232 if (start < upper)
233 start = upper;
235 /* system rom */
236 request_resource(&iomem_resource, &system_rom_resource);
237 upper = system_rom_resource.start;
239 /* check for extension rom (ignore length byte!) */
240 rom = isa_bus_to_virt(extension_rom_resource.start);
241 if (romsignature(rom)) {
242 length = extension_rom_resource.end - extension_rom_resource.start + 1;
243 if (romchecksum(rom, length)) {
244 request_resource(&iomem_resource, &extension_rom_resource);
245 upper = extension_rom_resource.start;
249 /* check for adapter roms on 2k boundaries */
250 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
251 rom = isa_bus_to_virt(start);
252 if (!romsignature(rom))
253 continue;
255 /* 0 < length <= 0x7f * 512, historically */
256 length = rom[2] * 512;
258 /* but accept any length that fits if checksum okay */
259 if (!length || start + length > upper || !romchecksum(rom, length))
260 continue;
262 adapter_rom_resources[i].start = start;
263 adapter_rom_resources[i].end = start + length - 1;
264 request_resource(&iomem_resource, &adapter_rom_resources[i]);
266 start = adapter_rom_resources[i++].end & ~2047UL;
270 static __init void parse_cmdline_early (char ** cmdline_p)
272 char c = ' ', *to = command_line, *from = COMMAND_LINE;
273 int len = 0;
275 /* Save unparsed command line copy for /proc/cmdline */
276 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
277 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
279 for (;;) {
280 if (c != ' ')
281 goto next_char;
283 #ifdef CONFIG_SMP
285 * If the BIOS enumerates physical processors before logical,
286 * maxcpus=N at enumeration-time can be used to disable HT.
288 else if (!memcmp(from, "maxcpus=", 8)) {
289 extern unsigned int maxcpus;
291 maxcpus = simple_strtoul(from + 8, NULL, 0);
293 #endif
294 #ifdef CONFIG_ACPI_BOOT
295 /* "acpi=off" disables both ACPI table parsing and interpreter init */
296 if (!memcmp(from, "acpi=off", 8))
297 disable_acpi();
299 if (!memcmp(from, "acpi=force", 10)) {
300 /* add later when we do DMI horrors: */
301 acpi_force = 1;
302 acpi_disabled = 0;
305 /* acpi=ht just means: do ACPI MADT parsing
306 at bootup, but don't enable the full ACPI interpreter */
307 if (!memcmp(from, "acpi=ht", 7)) {
308 if (!acpi_force)
309 disable_acpi();
310 acpi_ht = 1;
312 else if (!memcmp(from, "pci=noacpi", 10))
313 acpi_disable_pci();
314 else if (!memcmp(from, "acpi=noirq", 10))
315 acpi_noirq_set();
317 else if (!memcmp(from, "acpi_sci=edge", 13))
318 acpi_sci_flags.trigger = 1;
319 else if (!memcmp(from, "acpi_sci=level", 14))
320 acpi_sci_flags.trigger = 3;
321 else if (!memcmp(from, "acpi_sci=high", 13))
322 acpi_sci_flags.polarity = 1;
323 else if (!memcmp(from, "acpi_sci=low", 12))
324 acpi_sci_flags.polarity = 3;
326 /* acpi=strict disables out-of-spec workarounds */
327 else if (!memcmp(from, "acpi=strict", 11)) {
328 acpi_strict = 1;
330 #endif
332 if (!memcmp(from, "nolapic", 7) ||
333 !memcmp(from, "disableapic", 11))
334 disable_apic = 1;
336 if (!memcmp(from, "noapic", 6))
337 skip_ioapic_setup = 1;
339 if (!memcmp(from, "apic", 4)) {
340 skip_ioapic_setup = 0;
341 ioapic_force = 1;
344 if (!memcmp(from, "mem=", 4))
345 parse_memopt(from+4, &from);
347 #ifdef CONFIG_DISCONTIGMEM
348 if (!memcmp(from, "numa=", 5))
349 numa_setup(from+5);
350 #endif
352 #ifdef CONFIG_GART_IOMMU
353 if (!memcmp(from,"iommu=",6)) {
354 iommu_setup(from+6);
356 #endif
358 if (!memcmp(from,"oops=panic", 10))
359 panic_on_oops = 1;
361 if (!memcmp(from, "noexec=", 7))
362 nonx_setup(from + 7);
364 next_char:
365 c = *(from++);
366 if (!c)
367 break;
368 if (COMMAND_LINE_SIZE <= ++len)
369 break;
370 *(to++) = c;
372 *to = '\0';
373 *cmdline_p = command_line;
376 #ifndef CONFIG_DISCONTIGMEM
377 static void __init contig_initmem_init(void)
379 unsigned long bootmap_size, bootmap;
380 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
381 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
382 if (bootmap == -1L)
383 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
384 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
385 e820_bootmem_free(&contig_page_data, 0, end_pfn << PAGE_SHIFT);
386 reserve_bootmem(bootmap, bootmap_size);
388 #endif
390 /* Use inline assembly to define this because the nops are defined
391 as inline assembly strings in the include files and we cannot
392 get them easily into strings. */
393 asm("\t.data\nk8nops: "
394 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
395 K8_NOP7 K8_NOP8);
397 extern unsigned char k8nops[];
398 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
399 NULL,
400 k8nops,
401 k8nops + 1,
402 k8nops + 1 + 2,
403 k8nops + 1 + 2 + 3,
404 k8nops + 1 + 2 + 3 + 4,
405 k8nops + 1 + 2 + 3 + 4 + 5,
406 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
407 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
410 /* Replace instructions with better alternatives for this CPU type.
412 This runs before SMP is initialized to avoid SMP problems with
413 self modifying code. This implies that assymetric systems where
414 APs have less capabilities than the boot processor are not handled.
415 In this case boot with "noreplacement". */
416 void apply_alternatives(void *start, void *end)
418 struct alt_instr *a;
419 int diff, i, k;
420 for (a = start; (void *)a < end; a++) {
421 if (!boot_cpu_has(a->cpuid))
422 continue;
424 BUG_ON(a->replacementlen > a->instrlen);
425 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
426 diff = a->instrlen - a->replacementlen;
428 /* Pad the rest with nops */
429 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
430 k = diff;
431 if (k > ASM_NOP_MAX)
432 k = ASM_NOP_MAX;
433 __inline_memcpy(a->instr + i, k8_nops[k], k);
438 static int no_replacement __initdata = 0;
440 void __init alternative_instructions(void)
442 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
443 if (no_replacement)
444 return;
445 apply_alternatives(__alt_instructions, __alt_instructions_end);
448 static int __init noreplacement_setup(char *s)
450 no_replacement = 1;
451 return 0;
454 __setup("noreplacement", noreplacement_setup);
456 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
457 struct edd edd;
458 #ifdef CONFIG_EDD_MODULE
459 EXPORT_SYMBOL(edd);
460 #endif
462 * copy_edd() - Copy the BIOS EDD information
463 * from boot_params into a safe place.
466 static inline void copy_edd(void)
468 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
469 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
470 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
471 edd.edd_info_nr = EDD_NR;
473 #else
474 static inline void copy_edd(void)
477 #endif
479 #define EBDA_ADDR_POINTER 0x40E
480 static void __init reserve_ebda_region(void)
482 unsigned int addr;
483 /**
484 * there is a real-mode segmented pointer pointing to the
485 * 4K EBDA area at 0x40E
487 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
488 addr <<= 4;
489 if (addr)
490 reserve_bootmem_generic(addr, PAGE_SIZE);
493 void __init setup_arch(char **cmdline_p)
495 unsigned long kernel_end;
497 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
498 drive_info = DRIVE_INFO;
499 screen_info = SCREEN_INFO;
500 edid_info = EDID_INFO;
501 saved_video_mode = SAVED_VIDEO_MODE;
502 bootloader_type = LOADER_TYPE;
504 #ifdef CONFIG_BLK_DEV_RAM
505 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
506 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
507 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
508 #endif
509 setup_memory_region();
510 copy_edd();
512 if (!MOUNT_ROOT_RDONLY)
513 root_mountflags &= ~MS_RDONLY;
514 init_mm.start_code = (unsigned long) &_text;
515 init_mm.end_code = (unsigned long) &_etext;
516 init_mm.end_data = (unsigned long) &_edata;
517 init_mm.brk = (unsigned long) &_end;
519 code_resource.start = virt_to_phys(&_text);
520 code_resource.end = virt_to_phys(&_etext)-1;
521 data_resource.start = virt_to_phys(&_etext);
522 data_resource.end = virt_to_phys(&_edata)-1;
524 parse_cmdline_early(cmdline_p);
526 early_identify_cpu(&boot_cpu_data);
529 * partially used pages are not usable - thus
530 * we are rounding upwards:
532 end_pfn = e820_end_of_ram();
534 check_efer();
536 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
538 #ifdef CONFIG_ACPI_BOOT
540 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
541 * Call this early for SRAT node setup.
543 acpi_boot_table_init();
544 #endif
546 #ifdef CONFIG_ACPI_NUMA
548 * Parse SRAT to discover nodes.
550 acpi_numa_init();
551 #endif
553 #ifdef CONFIG_DISCONTIGMEM
554 numa_initmem_init(0, end_pfn);
555 #else
556 contig_initmem_init();
557 #endif
559 /* Reserve direct mapping */
560 reserve_bootmem_generic(table_start << PAGE_SHIFT,
561 (table_end - table_start) << PAGE_SHIFT);
563 /* reserve kernel */
564 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
565 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
568 * reserve physical page 0 - it's a special BIOS page on many boxes,
569 * enabling clean reboots, SMP operation, laptop functions.
571 reserve_bootmem_generic(0, PAGE_SIZE);
573 /* reserve ebda region */
574 reserve_ebda_region();
576 #ifdef CONFIG_SMP
578 * But first pinch a few for the stack/trampoline stuff
579 * FIXME: Don't need the extra page at 4K, but need to fix
580 * trampoline before removing it. (see the GDT stuff)
582 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
584 /* Reserve SMP trampoline */
585 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
586 #endif
588 #ifdef CONFIG_ACPI_SLEEP
590 * Reserve low memory region for sleep support.
592 acpi_reserve_bootmem();
593 #endif
594 #ifdef CONFIG_X86_LOCAL_APIC
596 * Find and reserve possible boot-time SMP configuration:
598 find_smp_config();
599 #endif
600 #ifdef CONFIG_BLK_DEV_INITRD
601 if (LOADER_TYPE && INITRD_START) {
602 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
603 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
604 initrd_start =
605 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
606 initrd_end = initrd_start+INITRD_SIZE;
608 else {
609 printk(KERN_ERR "initrd extends beyond end of memory "
610 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
611 (unsigned long)(INITRD_START + INITRD_SIZE),
612 (unsigned long)(end_pfn << PAGE_SHIFT));
613 initrd_start = 0;
616 #endif
617 paging_init();
619 check_ioapic();
621 #ifdef CONFIG_ACPI_BOOT
623 * Read APIC and some other early information from ACPI tables.
625 acpi_boot_init();
626 #endif
628 #ifdef CONFIG_X86_LOCAL_APIC
630 * get boot-time SMP configuration:
632 if (smp_found_config)
633 get_smp_config();
634 init_apic_mappings();
635 #endif
638 * Request address space for all standard RAM and ROM resources
639 * and also for regions reported as reserved by the e820.
641 probe_roms();
642 e820_reserve_resources();
644 request_resource(&iomem_resource, &video_ram_resource);
647 unsigned i;
648 /* request I/O space for devices used on all i[345]86 PCs */
649 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
650 request_resource(&ioport_resource, &standard_io_resources[i]);
653 e820_setup_gap();
655 #ifdef CONFIG_GART_IOMMU
656 iommu_hole_init();
657 #endif
659 #ifdef CONFIG_VT
660 #if defined(CONFIG_VGA_CONSOLE)
661 conswitchp = &vga_con;
662 #elif defined(CONFIG_DUMMY_CONSOLE)
663 conswitchp = &dummy_con;
664 #endif
665 #endif
668 static int __init get_model_name(struct cpuinfo_x86 *c)
670 unsigned int *v;
672 if (c->x86_cpuid_level < 0x80000004)
673 return 0;
675 v = (unsigned int *) c->x86_model_id;
676 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
677 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
678 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
679 c->x86_model_id[48] = 0;
680 return 1;
684 static void __init display_cacheinfo(struct cpuinfo_x86 *c)
686 unsigned int n, dummy, eax, ebx, ecx, edx;
688 n = c->x86_cpuid_level;
690 if (n >= 0x80000005) {
691 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
692 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
693 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
694 c->x86_cache_size=(ecx>>24)+(edx>>24);
695 /* On K8 L1 TLB is inclusive, so don't count it */
696 c->x86_tlbsize = 0;
699 if (n >= 0x80000006) {
700 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
701 ecx = cpuid_ecx(0x80000006);
702 c->x86_cache_size = ecx >> 16;
703 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
705 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
706 c->x86_cache_size, ecx & 0xFF);
709 if (n >= 0x80000007)
710 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
711 if (n >= 0x80000008) {
712 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
713 c->x86_virt_bits = (eax >> 8) & 0xff;
714 c->x86_phys_bits = eax & 0xff;
719 static int __init init_amd(struct cpuinfo_x86 *c)
721 int r;
722 int level;
723 #ifdef CONFIG_NUMA
724 int cpu;
725 #endif
727 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
728 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
729 clear_bit(0*32+31, &c->x86_capability);
731 /* C-stepping K8? */
732 level = cpuid_eax(1);
733 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
734 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
736 r = get_model_name(c);
737 if (!r) {
738 switch (c->x86) {
739 case 15:
740 /* Should distinguish Models here, but this is only
741 a fallback anyways. */
742 strcpy(c->x86_model_id, "Hammer");
743 break;
746 display_cacheinfo(c);
748 if (c->x86_cpuid_level >= 0x80000008) {
749 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
750 if (c->x86_num_cores & (c->x86_num_cores - 1))
751 c->x86_num_cores = 1;
753 #ifdef CONFIG_NUMA
754 /* On a dual core setup the lower bits of apic id
755 distingush the cores. Fix up the CPU<->node mappings
756 here based on that.
757 Assumes number of cores is a power of two.
758 When using SRAT use mapping from SRAT. */
759 cpu = c->x86_apicid;
760 if (acpi_numa <= 0 && c->x86_num_cores > 1) {
761 cpu_to_node[cpu] = cpu >> hweight32(c->x86_num_cores - 1);
762 if (!node_online(cpu_to_node[cpu]))
763 cpu_to_node[cpu] = first_node(node_online_map);
765 printk(KERN_INFO "CPU %d(%d) -> Node %d\n",
766 cpu, c->x86_num_cores, cpu_to_node[cpu]);
767 #endif
770 return r;
773 static void __init detect_ht(struct cpuinfo_x86 *c)
775 #ifdef CONFIG_SMP
776 u32 eax, ebx, ecx, edx;
777 int index_lsb, index_msb, tmp;
778 int cpu = smp_processor_id();
780 if (!cpu_has(c, X86_FEATURE_HT))
781 return;
783 cpuid(1, &eax, &ebx, &ecx, &edx);
784 smp_num_siblings = (ebx & 0xff0000) >> 16;
786 if (smp_num_siblings == 1) {
787 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
788 } else if (smp_num_siblings > 1) {
789 index_lsb = 0;
790 index_msb = 31;
792 * At this point we only support two siblings per
793 * processor package.
795 if (smp_num_siblings > NR_CPUS) {
796 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
797 smp_num_siblings = 1;
798 return;
800 tmp = smp_num_siblings;
801 while ((tmp & 1) == 0) {
802 tmp >>=1 ;
803 index_lsb++;
805 tmp = smp_num_siblings;
806 while ((tmp & 0x80000000 ) == 0) {
807 tmp <<=1 ;
808 index_msb--;
810 if (index_lsb != index_msb )
811 index_msb++;
812 phys_proc_id[cpu] = phys_pkg_id(index_msb);
814 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
815 phys_proc_id[cpu]);
817 #endif
820 static void __init sched_cmp_hack(struct cpuinfo_x86 *c)
822 #ifdef CONFIG_SMP
823 /* AMD dual core looks like HT but isn't really. Hide it from the
824 scheduler. This works around problems with the domain scheduler.
825 Also probably gives slightly better scheduling and disables
826 SMT nice which is harmful on dual core.
827 TBD tune the domain scheduler for dual core. */
828 if (c->x86_vendor == X86_VENDOR_AMD && cpu_has(c, X86_FEATURE_CMP_LEGACY))
829 smp_num_siblings = 1;
830 #endif
833 static void __init init_intel(struct cpuinfo_x86 *c)
835 /* Cache sizes */
836 unsigned n;
838 init_intel_cacheinfo(c);
839 n = c->x86_cpuid_level;
840 if (n >= 0x80000008) {
841 unsigned eax = cpuid_eax(0x80000008);
842 c->x86_virt_bits = (eax >> 8) & 0xff;
843 c->x86_phys_bits = eax & 0xff;
846 if (c->x86 == 15)
847 c->x86_cache_alignment = c->x86_clflush_size * 2;
848 if (c->x86 >= 15)
849 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
852 void __init get_cpu_vendor(struct cpuinfo_x86 *c)
854 char *v = c->x86_vendor_id;
856 if (!strcmp(v, "AuthenticAMD"))
857 c->x86_vendor = X86_VENDOR_AMD;
858 else if (!strcmp(v, "GenuineIntel"))
859 c->x86_vendor = X86_VENDOR_INTEL;
860 else
861 c->x86_vendor = X86_VENDOR_UNKNOWN;
864 struct cpu_model_info {
865 int vendor;
866 int family;
867 char *model_names[16];
870 /* Do some early cpuid on the boot CPU to get some parameter that are
871 needed before check_bugs. Everything advanced is in identify_cpu
872 below. */
873 void __init early_identify_cpu(struct cpuinfo_x86 *c)
875 u32 tfms;
877 c->loops_per_jiffy = loops_per_jiffy;
878 c->x86_cache_size = -1;
879 c->x86_vendor = X86_VENDOR_UNKNOWN;
880 c->x86_model = c->x86_mask = 0; /* So far unknown... */
881 c->x86_vendor_id[0] = '\0'; /* Unset */
882 c->x86_model_id[0] = '\0'; /* Unset */
883 c->x86_clflush_size = 64;
884 c->x86_cache_alignment = c->x86_clflush_size;
885 c->x86_num_cores = 1;
886 c->x86_apicid = c == &boot_cpu_data ? 0 : c - cpu_data;
887 c->x86_cpuid_level = 0;
888 memset(&c->x86_capability, 0, sizeof c->x86_capability);
890 /* Get vendor name */
891 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
892 (unsigned int *)&c->x86_vendor_id[0],
893 (unsigned int *)&c->x86_vendor_id[8],
894 (unsigned int *)&c->x86_vendor_id[4]);
896 get_cpu_vendor(c);
898 /* Initialize the standard set of capabilities */
899 /* Note that the vendor-specific code below might override */
901 /* Intel-defined flags: level 0x00000001 */
902 if (c->cpuid_level >= 0x00000001) {
903 __u32 misc;
904 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
905 &c->x86_capability[0]);
906 c->x86 = (tfms >> 8) & 0xf;
907 c->x86_model = (tfms >> 4) & 0xf;
908 c->x86_mask = tfms & 0xf;
909 if (c->x86 == 0xf) {
910 c->x86 += (tfms >> 20) & 0xff;
911 c->x86_model += ((tfms >> 16) & 0xF) << 4;
913 if (c->x86_capability[0] & (1<<19))
914 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
915 c->x86_apicid = misc >> 24;
916 } else {
917 /* Have CPUID level 0 only - unheard of */
918 c->x86 = 4;
923 * This does the hard work of actually picking apart the CPU stuff...
925 void __init identify_cpu(struct cpuinfo_x86 *c)
927 int i;
928 u32 xlvl;
930 early_identify_cpu(c);
932 /* AMD-defined flags: level 0x80000001 */
933 xlvl = cpuid_eax(0x80000000);
934 c->x86_cpuid_level = xlvl;
935 if ((xlvl & 0xffff0000) == 0x80000000) {
936 if (xlvl >= 0x80000001) {
937 c->x86_capability[1] = cpuid_edx(0x80000001);
938 c->x86_capability[5] = cpuid_ecx(0x80000001);
940 if (xlvl >= 0x80000004)
941 get_model_name(c); /* Default name */
944 /* Transmeta-defined flags: level 0x80860001 */
945 xlvl = cpuid_eax(0x80860000);
946 if ((xlvl & 0xffff0000) == 0x80860000) {
947 /* Don't set x86_cpuid_level here for now to not confuse. */
948 if (xlvl >= 0x80860001)
949 c->x86_capability[2] = cpuid_edx(0x80860001);
953 * Vendor-specific initialization. In this section we
954 * canonicalize the feature flags, meaning if there are
955 * features a certain CPU supports which CPUID doesn't
956 * tell us, CPUID claiming incorrect flags, or other bugs,
957 * we handle them here.
959 * At the end of this section, c->x86_capability better
960 * indicate the features this CPU genuinely supports!
962 switch (c->x86_vendor) {
963 case X86_VENDOR_AMD:
964 init_amd(c);
965 break;
967 case X86_VENDOR_INTEL:
968 init_intel(c);
969 break;
971 case X86_VENDOR_UNKNOWN:
972 default:
973 display_cacheinfo(c);
974 break;
977 select_idle_routine(c);
978 detect_ht(c);
979 sched_cmp_hack(c);
982 * On SMP, boot_cpu_data holds the common feature set between
983 * all CPUs; so make sure that we indicate which features are
984 * common between the CPUs. The first time this routine gets
985 * executed, c == &boot_cpu_data.
987 if (c != &boot_cpu_data) {
988 /* AND the already accumulated flags with these */
989 for (i = 0 ; i < NCAPINTS ; i++)
990 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
993 #ifdef CONFIG_X86_MCE
994 mcheck_init(c);
995 #endif
996 #ifdef CONFIG_NUMA
997 if (c != &boot_cpu_data)
998 numa_add_cpu(c - cpu_data);
999 #endif
1003 void __init print_cpu_info(struct cpuinfo_x86 *c)
1005 if (c->x86_model_id[0])
1006 printk("%s", c->x86_model_id);
1008 if (c->x86_mask || c->cpuid_level >= 0)
1009 printk(" stepping %02x\n", c->x86_mask);
1010 else
1011 printk("\n");
1015 * Get CPU information for use by the procfs.
1018 static int show_cpuinfo(struct seq_file *m, void *v)
1020 struct cpuinfo_x86 *c = v;
1023 * These flag bits must match the definitions in <asm/cpufeature.h>.
1024 * NULL means this bit is undefined or reserved; either way it doesn't
1025 * have meaning as far as Linux is concerned. Note that it's important
1026 * to realize there is a difference between this table and CPUID -- if
1027 * applications want to get the raw CPUID data, they should access
1028 * /dev/cpu/<cpu_nr>/cpuid instead.
1030 static char *x86_cap_flags[] = {
1031 /* Intel-defined */
1032 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1033 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1034 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1035 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1037 /* AMD-defined */
1038 "pni", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1039 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1040 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1041 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1043 /* Transmeta-defined */
1044 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1045 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1046 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1047 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1049 /* Other (Linux-defined) */
1050 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", "k8c+",
1051 "constant_tsc", NULL, NULL,
1052 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1053 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1054 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1056 /* Intel-defined (#2) */
1057 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
1058 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1059 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1060 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1062 /* AMD-defined (#2) */
1063 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1064 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1065 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1066 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL
1068 static char *x86_power_flags[] = {
1069 "ts", /* temperature sensor */
1070 "fid", /* frequency id control */
1071 "vid", /* voltage id control */
1072 "ttp", /* thermal trip */
1073 "tm",
1074 "stc"
1078 #ifdef CONFIG_SMP
1079 if (!cpu_online(c-cpu_data))
1080 return 0;
1081 #endif
1083 seq_printf(m,"processor\t: %u\n"
1084 "vendor_id\t: %s\n"
1085 "cpu family\t: %d\n"
1086 "model\t\t: %d\n"
1087 "model name\t: %s\n",
1088 (unsigned)(c-cpu_data),
1089 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1090 c->x86,
1091 (int)c->x86_model,
1092 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1094 if (c->x86_mask || c->cpuid_level >= 0)
1095 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1096 else
1097 seq_printf(m, "stepping\t: unknown\n");
1099 if (cpu_has(c,X86_FEATURE_TSC)) {
1100 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1101 cpu_khz / 1000, (cpu_khz % 1000));
1104 /* Cache size */
1105 if (c->x86_cache_size >= 0)
1106 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1108 #ifdef CONFIG_SMP
1109 if (smp_num_siblings * c->x86_num_cores > 1) {
1110 int cpu = c - cpu_data;
1111 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1112 seq_printf(m, "siblings\t: %d\n",
1113 c->x86_num_cores * smp_num_siblings);
1115 #endif
1117 seq_printf(m,
1118 "fpu\t\t: yes\n"
1119 "fpu_exception\t: yes\n"
1120 "cpuid level\t: %d\n"
1121 "wp\t\t: yes\n"
1122 "flags\t\t:",
1123 c->cpuid_level);
1126 int i;
1127 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1128 if ( test_bit(i, &c->x86_capability) &&
1129 x86_cap_flags[i] != NULL )
1130 seq_printf(m, " %s", x86_cap_flags[i]);
1133 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1134 c->loops_per_jiffy/(500000/HZ),
1135 (c->loops_per_jiffy/(5000/HZ)) % 100);
1137 if (c->x86_tlbsize > 0)
1138 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1139 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1140 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1142 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1143 c->x86_phys_bits, c->x86_virt_bits);
1145 seq_printf(m, "power management:");
1147 unsigned i;
1148 for (i = 0; i < 32; i++)
1149 if (c->x86_power & (1 << i)) {
1150 if (i < ARRAY_SIZE(x86_power_flags))
1151 seq_printf(m, " %s", x86_power_flags[i]);
1152 else
1153 seq_printf(m, " [%d]", i);
1156 seq_printf(m, "\n");
1158 if (c->x86_num_cores > 1)
1159 seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
1161 seq_printf(m, "\n\n");
1163 return 0;
1166 static void *c_start(struct seq_file *m, loff_t *pos)
1168 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1171 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1173 ++*pos;
1174 return c_start(m, pos);
1177 static void c_stop(struct seq_file *m, void *v)
1181 struct seq_operations cpuinfo_op = {
1182 .start =c_start,
1183 .next = c_next,
1184 .stop = c_stop,
1185 .show = show_cpuinfo,