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[linux-2.6/linux-mips.git] / drivers / serial / sunsu.c
blob8a42e34130f51b6a5a65ee0f8a8e88f6159428a4
1 /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
3 *
4 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
6 *
7 * This is mainly a variation of 8250.c, credits go to authors mentioned
8 * therein. In fact this driver should be merged into the generic 8250.c
9 * infrastructure perhaps using a 8250_sparc.c module.
10 *
11 * Fixed to use tty_get_baud_rate().
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 *
14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29
16 */
17
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/spinlock.h>
23 #include <linux/errno.h>
24 #include <linux/tty.h>
25 #include <linux/tty_flip.h>
26 #include <linux/major.h>
27 #include <linux/string.h>
28 #include <linux/ptrace.h>
29 #include <linux/ioport.h>
30 #include <linux/circ_buf.h>
31 #include <linux/serial.h>
32 #include <linux/sysrq.h>
33 #include <linux/console.h>
34 #ifdef CONFIG_SERIO
35 #include <linux/serio.h>
36 #endif
37 #include <linux/serial_reg.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40
41 #include <asm/io.h>
42 #include <asm/irq.h>
43 #include <asm/oplib.h>
44 #include <asm/ebus.h>
45 #ifdef CONFIG_SPARC64
46 #include <asm/isa.h>
47 #endif
48
49 /* #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) */
50 #if defined(CONFIG_MAGIC_SYSRQ)
51 #define SUPPORT_SYSRQ
52 #endif
53
54 #include <linux/serial_core.h>
55
56 #include "suncore.h"
57
58 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
59 * in a UART clock of 1.8462 MHz.
60 */
61 #define SU_BASE_BAUD (1846200 / 16)
62
63 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
64 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
65
66 /*
67 * Here we define the default xmit fifo size used for each type of UART.
68 */
69 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
70 { "unknown", 1, 0 },
71 { "8250", 1, 0 },
72 { "16450", 1, 0 },
73 { "16550", 1, 0 },
74 { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
75 { "Cirrus", 1, 0 },
76 { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
77 { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
78 { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
79 { "Startech", 1, 0 },
80 { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
81 { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
82 { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
83 { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
84 };
85
86 struct uart_sunsu_port {
87 struct uart_port port;
88 unsigned char acr;
89 unsigned char ier;
90 unsigned char rev;
91 unsigned char lcr;
92 unsigned int lsr_break_flag;
93 unsigned int cflag;
94
95 /* Probing information. */
96 enum su_type su_type;
97 unsigned int type_probed; /* XXX Stupid */
98 int port_node;
99 unsigned int irq;
100
101 /* L1-A keyboard break state. */
102 int kbd_id;
103 int l1_down;
104 #ifdef CONFIG_SERIO
105 struct serio serio;
106 #endif
107 };
108
109 #define _INLINE_
110
111 static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
112 {
113 offset <<= up->port.regshift;
114
115 switch (up->port.iotype) {
116 case SERIAL_IO_HUB6:
117 outb(up->port.hub6 - 1 + offset, up->port.iobase);
118 return inb(up->port.iobase + 1);
119
120 case SERIAL_IO_MEM:
121 return readb(up->port.membase + offset);
122
123 default:
124 return inb(up->port.iobase + offset);
125 }
126 }
127
128 static _INLINE_ void
129 serial_out(struct uart_sunsu_port *up, int offset, int value)
130 {
131 #ifndef CONFIG_SPARC64
132 /*
133 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
134 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
135 * gate outputs a logical one. Since we use level triggered interrupts
136 * we have lockup and watchdog reset. We cannot mask IRQ because
137 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
138 * This problem is similar to what Alpha people suffer, see serial.c.
139 */
140 if (offset == UART_MCR)
141 value |= UART_MCR_OUT2;
142 #endif
143 offset <<= up->port.regshift;
144
145 switch (up->port.iotype) {
146 case SERIAL_IO_HUB6:
147 outb(up->port.hub6 - 1 + offset, up->port.iobase);
148 outb(value, up->port.iobase + 1);
149 break;
150
151 case SERIAL_IO_MEM:
152 writeb(value, up->port.membase + offset);
153 break;
154
155 default:
156 outb(value, up->port.iobase + offset);
157 }
158 }
159
160 /*
161 * We used to support using pause I/O for certain machines. We
162 * haven't supported this for a while, but just in case it's badly
163 * needed for certain old 386 machines, I've left these #define's
164 * in....
165 */
166 #define serial_inp(up, offset) serial_in(up, offset)
167 #define serial_outp(up, offset, value) serial_out(up, offset, value)
168
169
170 /*
171 * For the 16C950
172 */
173 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
174 {
175 serial_out(up, UART_SCR, offset);
176 serial_out(up, UART_ICR, value);
177 }
178
179 #if 0 /* Unused currently */
180 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
181 {
182 unsigned int value;
183
184 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
185 serial_out(up, UART_SCR, offset);
186 value = serial_in(up, UART_ICR);
187 serial_icr_write(up, UART_ACR, up->acr);
188
189 return value;
190 }
191 #endif
192
193 #ifdef CONFIG_SERIAL_8250_RSA
194 /*
195 * Attempts to turn on the RSA FIFO. Returns zero on failure.
196 * We set the port uart clock rate if we succeed.
197 */
198 static int __enable_rsa(struct uart_sunsu_port *up)
199 {
200 unsigned char mode;
201 int result;
202
203 mode = serial_inp(up, UART_RSA_MSR);
204 result = mode & UART_RSA_MSR_FIFO;
205
206 if (!result) {
207 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
208 mode = serial_inp(up, UART_RSA_MSR);
209 result = mode & UART_RSA_MSR_FIFO;
210 }
211
212 if (result)
213 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
214
215 return result;
216 }
217
218 static void enable_rsa(struct uart_sunsu_port *up)
219 {
220 if (up->port.type == PORT_RSA) {
221 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
222 spin_lock_irq(&up->port.lock);
223 __enable_rsa(up);
224 spin_unlock_irq(&up->port.lock);
225 }
226 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
227 serial_outp(up, UART_RSA_FRR, 0);
228 }
229 }
230
231 /*
232 * Attempts to turn off the RSA FIFO. Returns zero on failure.
233 * It is unknown why interrupts were disabled in here. However,
234 * the caller is expected to preserve this behaviour by grabbing
235 * the spinlock before calling this function.
236 */
237 static void disable_rsa(struct uart_sunsu_port *up)
238 {
239 unsigned char mode;
240 int result;
241
242 if (up->port.type == PORT_RSA &&
243 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
244 spin_lock_irq(&up->port.lock);
245
246 mode = serial_inp(up, UART_RSA_MSR);
247 result = !(mode & UART_RSA_MSR_FIFO);
248
249 if (!result) {
250 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
251 mode = serial_inp(up, UART_RSA_MSR);
252 result = !(mode & UART_RSA_MSR_FIFO);
253 }
254
255 if (result)
256 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
257 spin_unlock_irq(&up->port.lock);
258 }
259 }
260 #endif /* CONFIG_SERIAL_8250_RSA */
261
262 static void sunsu_stop_tx(struct uart_port *port, unsigned int tty_stop)
263 {
264 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
265
266 if (up->ier & UART_IER_THRI) {
267 up->ier &= ~UART_IER_THRI;
268 serial_out(up, UART_IER, up->ier);
269 }
270 if (up->port.type == PORT_16C950 && tty_stop) {
271 up->acr |= UART_ACR_TXDIS;
272 serial_icr_write(up, UART_ACR, up->acr);
273 }
274 }
275
276 static void sunsu_start_tx(struct uart_port *port, unsigned int tty_start)
277 {
278 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
279
280 if (!(up->ier & UART_IER_THRI)) {
281 up->ier |= UART_IER_THRI;
282 serial_out(up, UART_IER, up->ier);
283 }
284 /*
285 * We only do this from uart_start
286 */
287 if (tty_start && up->port.type == PORT_16C950) {
288 up->acr &= ~UART_ACR_TXDIS;
289 serial_icr_write(up, UART_ACR, up->acr);
290 }
291 }
292
293 static void sunsu_stop_rx(struct uart_port *port)
294 {
295 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
296 unsigned long flags;
297
298 spin_lock_irqsave(&up->port.lock, flags);
299 up->ier &= ~UART_IER_RLSI;
300 up->port.read_status_mask &= ~UART_LSR_DR;
301 serial_out(up, UART_IER, up->ier);
302 spin_unlock_irqrestore(&up->port.lock, flags);
303 }
304
305 static void sunsu_enable_ms(struct uart_port *port)
306 {
307 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
308 unsigned long flags;
309
310 spin_lock_irqsave(&up->port.lock, flags);
311 up->ier |= UART_IER_MSI;
312 serial_out(up, UART_IER, up->ier);
313 spin_unlock_irqrestore(&up->port.lock, flags);
314 }
315
316 static _INLINE_ void
317 receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
318 {
319 struct tty_struct *tty = up->port.info->tty;
320 unsigned char ch;
321 int max_count = 256;
322 int saw_console_brk = 0;
323
324 do {
325 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
326 tty->flip.work.func((void *)tty);
327 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
328 return; // if TTY_DONT_FLIP is set
329 }
330 ch = serial_inp(up, UART_RX);
331 *tty->flip.char_buf_ptr = ch;
332 *tty->flip.flag_buf_ptr = TTY_NORMAL;
333 up->port.icount.rx++;
334
335 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
336 UART_LSR_FE | UART_LSR_OE))) {
337 /*
338 * For statistics only
339 */
340 if (*status & UART_LSR_BI) {
341 *status &= ~(UART_LSR_FE | UART_LSR_PE);
342 up->port.icount.brk++;
343 if (up->port.cons != NULL &&
344 up->port.line == up->port.cons->index)
345 saw_console_brk = 1;
346 /*
347 * We do the SysRQ and SAK checking
348 * here because otherwise the break
349 * may get masked by ignore_status_mask
350 * or read_status_mask.
351 */
352 if (uart_handle_break(&up->port))
353 goto ignore_char;
354 } else if (*status & UART_LSR_PE)
355 up->port.icount.parity++;
356 else if (*status & UART_LSR_FE)
357 up->port.icount.frame++;
358 if (*status & UART_LSR_OE)
359 up->port.icount.overrun++;
360
361 /*
362 * Mask off conditions which should be ingored.
363 */
364 *status &= up->port.read_status_mask;
365
366 if (up->port.cons != NULL &&
367 up->port.line == up->port.cons->index) {
368 /* Recover the break flag from console xmit */
369 *status |= up->lsr_break_flag;
370 up->lsr_break_flag = 0;
371 }
372
373 if (*status & UART_LSR_BI) {
374 *tty->flip.flag_buf_ptr = TTY_BREAK;
375 } else if (*status & UART_LSR_PE)
376 *tty->flip.flag_buf_ptr = TTY_PARITY;
377 else if (*status & UART_LSR_FE)
378 *tty->flip.flag_buf_ptr = TTY_FRAME;
379 }
380 if (uart_handle_sysrq_char(&up->port, ch, regs))
381 goto ignore_char;
382 if ((*status & up->port.ignore_status_mask) == 0) {
383 tty->flip.flag_buf_ptr++;
384 tty->flip.char_buf_ptr++;
385 tty->flip.count++;
386 }
387 if ((*status & UART_LSR_OE) &&
388 tty->flip.count < TTY_FLIPBUF_SIZE) {
389 /*
390 * Overrun is special, since it's reported
391 * immediately, and doesn't affect the current
392 * character.
393 */
394 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
395 tty->flip.flag_buf_ptr++;
396 tty->flip.char_buf_ptr++;
397 tty->flip.count++;
398 }
399 ignore_char:
400 *status = serial_inp(up, UART_LSR);
401 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
402 tty_flip_buffer_push(tty);
403
404 if (saw_console_brk)
405 sun_do_break();
406 }
407
408 static _INLINE_ void transmit_chars(struct uart_sunsu_port *up)
409 {
410 struct circ_buf *xmit = &up->port.info->xmit;
411 int count;
412
413 if (up->port.x_char) {
414 serial_outp(up, UART_TX, up->port.x_char);
415 up->port.icount.tx++;
416 up->port.x_char = 0;
417 return;
418 }
419 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
420 sunsu_stop_tx(&up->port, 0);
421 return;
422 }
423
424 count = up->port.fifosize;
425 do {
426 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
427 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
428 up->port.icount.tx++;
429 if (uart_circ_empty(xmit))
430 break;
431 } while (--count > 0);
432
433 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
434 uart_write_wakeup(&up->port);
435
436 if (uart_circ_empty(xmit))
437 sunsu_stop_tx(&up->port, 0);
438 }
439
440 static _INLINE_ void check_modem_status(struct uart_sunsu_port *up)
441 {
442 int status;
443
444 status = serial_in(up, UART_MSR);
445
446 if ((status & UART_MSR_ANY_DELTA) == 0)
447 return;
448
449 if (status & UART_MSR_TERI)
450 up->port.icount.rng++;
451 if (status & UART_MSR_DDSR)
452 up->port.icount.dsr++;
453 if (status & UART_MSR_DDCD)
454 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
455 if (status & UART_MSR_DCTS)
456 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
457
458 wake_up_interruptible(&up->port.info->delta_msr_wait);
459 }
460
461 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
462 {
463 struct uart_sunsu_port *up = dev_id;
464 unsigned long flags;
465 unsigned char status;
466
467 spin_lock_irqsave(&up->port.lock, flags);
468
469 do {
470 status = serial_inp(up, UART_LSR);
471 if (status & UART_LSR_DR)
472 receive_chars(up, &status, regs);
473 check_modem_status(up);
474 if (status & UART_LSR_THRE)
475 transmit_chars(up);
476 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
477
478 spin_unlock_irqrestore(&up->port.lock, flags);
479
480 return IRQ_HANDLED;
481 }
482
483 /* Separate interrupt handling path for keyboard/mouse ports. */
484
485 static void
486 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
487 unsigned int iflag, unsigned int quot);
488
489 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
490 {
491 unsigned int cur_cflag = up->cflag;
492 int quot, new_baud;
493
494 up->cflag &= ~CBAUD;
495 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
496
497 quot = up->port.uartclk / (16 * new_baud);
498
499 spin_unlock(&up->port.lock);
500
501 sunsu_change_speed(&up->port, up->cflag, 0, quot);
502
503 spin_lock(&up->port.lock);
504 }
505
506 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
507 {
508 do {
509 unsigned char ch = serial_inp(up, UART_RX);
510
511 if (up->su_type == SU_PORT_KBD) {
512 if (ch == SUNKBD_RESET) {
513 up->kbd_id = 1;
514 up->l1_down = 0;
515 } else if (up->kbd_id) {
516 up->kbd_id = 0;
517 } else if (ch == SUNKBD_L1) {
518 up->l1_down = 1;
519 } else if (ch == (SUNKBD_L1|SUNKBD_UP)) {
520 up->l1_down = 0;
521 } else if (ch == SUNKBD_A && up->l1_down) {
522 /* whee... */
523 sun_do_break();
524
525 /* Continue execution... */
526 up->l1_down = 0;
527 up->kbd_id = 0;
528 return;
529 }
530 #ifdef CONFIG_SERIO
531 serio_interrupt(&up->serio, ch, 0, regs);
532 #endif
533 } else if (up->su_type == SU_PORT_MS) {
534 int ret = suncore_mouse_baud_detection(ch, is_break);
535
536 switch (ret) {
537 case 2:
538 sunsu_change_mouse_baud(up);
539 /* fallthru */
540 case 1:
541 break;
542
543 case 0:
544 #ifdef CONFIG_SERIO
545 serio_interrupt(&up->serio, ch, 0, regs);
546 #endif
547 break;
548 };
549 }
550 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
551 }
552
553 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
554 {
555 struct uart_sunsu_port *up = dev_id;
556
557 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
558 unsigned char status = serial_inp(up, UART_LSR);
559
560 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
561 receive_kbd_ms_chars(up, regs,
562 (status & UART_LSR_BI) != 0);
563 }
564
565 return IRQ_HANDLED;
566 }
567
568 static unsigned int sunsu_tx_empty(struct uart_port *port)
569 {
570 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
571 unsigned long flags;
572 unsigned int ret;
573
574 spin_lock_irqsave(&up->port.lock, flags);
575 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
576 spin_unlock_irqrestore(&up->port.lock, flags);
577
578 return ret;
579 }
580
581 static unsigned int sunsu_get_mctrl(struct uart_port *port)
582 {
583 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
584 unsigned long flags;
585 unsigned char status;
586 unsigned int ret;
587
588 spin_lock_irqsave(&up->port.lock, flags);
589 status = serial_in(up, UART_MSR);
590 spin_unlock_irqrestore(&up->port.lock, flags);
591
592 ret = 0;
593 if (status & UART_MSR_DCD)
594 ret |= TIOCM_CAR;
595 if (status & UART_MSR_RI)
596 ret |= TIOCM_RNG;
597 if (status & UART_MSR_DSR)
598 ret |= TIOCM_DSR;
599 if (status & UART_MSR_CTS)
600 ret |= TIOCM_CTS;
601 return ret;
602 }
603
604 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
605 {
606 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
607 unsigned char mcr = 0;
608
609 if (mctrl & TIOCM_RTS)
610 mcr |= UART_MCR_RTS;
611 if (mctrl & TIOCM_DTR)
612 mcr |= UART_MCR_DTR;
613 if (mctrl & TIOCM_OUT1)
614 mcr |= UART_MCR_OUT1;
615 if (mctrl & TIOCM_OUT2)
616 mcr |= UART_MCR_OUT2;
617 if (mctrl & TIOCM_LOOP)
618 mcr |= UART_MCR_LOOP;
619
620 serial_out(up, UART_MCR, mcr);
621 }
622
623 static void sunsu_break_ctl(struct uart_port *port, int break_state)
624 {
625 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
626 unsigned long flags;
627
628 spin_lock_irqsave(&up->port.lock, flags);
629 if (break_state == -1)
630 up->lcr |= UART_LCR_SBC;
631 else
632 up->lcr &= ~UART_LCR_SBC;
633 serial_out(up, UART_LCR, up->lcr);
634 spin_unlock_irqrestore(&up->port.lock, flags);
635 }
636
637 static int sunsu_startup(struct uart_port *port)
638 {
639 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
640 unsigned long flags;
641 int retval;
642
643 if (up->port.type == PORT_16C950) {
644 /* Wake up and initialize UART */
645 up->acr = 0;
646 serial_outp(up, UART_LCR, 0xBF);
647 serial_outp(up, UART_EFR, UART_EFR_ECB);
648 serial_outp(up, UART_IER, 0);
649 serial_outp(up, UART_LCR, 0);
650 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
651 serial_outp(up, UART_LCR, 0xBF);
652 serial_outp(up, UART_EFR, UART_EFR_ECB);
653 serial_outp(up, UART_LCR, 0);
654 }
655
656 #ifdef CONFIG_SERIAL_8250_RSA
657 /*
658 * If this is an RSA port, see if we can kick it up to the
659 * higher speed clock.
660 */
661 enable_rsa(up);
662 #endif
663
664 /*
665 * Clear the FIFO buffers and disable them.
666 * (they will be reeanbled in set_termios())
667 */
668 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
669 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
670 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
671 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
672 serial_outp(up, UART_FCR, 0);
673 }
674
675 /*
676 * Clear the interrupt registers.
677 */
678 (void) serial_inp(up, UART_LSR);
679 (void) serial_inp(up, UART_RX);
680 (void) serial_inp(up, UART_IIR);
681 (void) serial_inp(up, UART_MSR);
682
683 /*
684 * At this point, there's no way the LSR could still be 0xff;
685 * if it is, then bail out, because there's likely no UART
686 * here.
687 */
688 if (!(up->port.flags & ASYNC_BUGGY_UART) &&
689 (serial_inp(up, UART_LSR) == 0xff)) {
690 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
691 return -ENODEV;
692 }
693
694 if (up->su_type != SU_PORT_PORT) {
695 retval = request_irq(up->irq, sunsu_kbd_ms_interrupt,
696 SA_SHIRQ, su_typev[up->su_type], up);
697 } else {
698 retval = request_irq(up->irq, sunsu_serial_interrupt,
699 SA_SHIRQ, su_typev[up->su_type], up);
700 }
701 if (retval) {
702 printk("su: Cannot register IRQ %d\n", up->irq);
703 return retval;
704 }
705
706 /*
707 * Now, initialize the UART
708 */
709 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
710
711 spin_lock_irqsave(&up->port.lock, flags);
712
713 up->port.mctrl |= TIOCM_OUT2;
714
715 sunsu_set_mctrl(&up->port, up->port.mctrl);
716 spin_unlock_irqrestore(&up->port.lock, flags);
717
718 /*
719 * Finally, enable interrupts. Note: Modem status interrupts
720 * are set via set_termios(), which will be occurring imminently
721 * anyway, so we don't enable them here.
722 */
723 up->ier = UART_IER_RLSI | UART_IER_RDI;
724 serial_outp(up, UART_IER, up->ier);
725
726 if (up->port.flags & ASYNC_FOURPORT) {
727 unsigned int icp;
728 /*
729 * Enable interrupts on the AST Fourport board
730 */
731 icp = (up->port.iobase & 0xfe0) | 0x01f;
732 outb_p(0x80, icp);
733 (void) inb_p(icp);
734 }
735
736 /*
737 * And clear the interrupt registers again for luck.
738 */
739 (void) serial_inp(up, UART_LSR);
740 (void) serial_inp(up, UART_RX);
741 (void) serial_inp(up, UART_IIR);
742 (void) serial_inp(up, UART_MSR);
743
744 return 0;
745 }
746
747 static void sunsu_shutdown(struct uart_port *port)
748 {
749 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
750 unsigned long flags;
751
752 /*
753 * Disable interrupts from this port
754 */
755 up->ier = 0;
756 serial_outp(up, UART_IER, 0);
757
758 spin_lock_irqsave(&up->port.lock, flags);
759 if (up->port.flags & ASYNC_FOURPORT) {
760 /* reset interrupts on the AST Fourport board */
761 inb((up->port.iobase & 0xfe0) | 0x1f);
762 up->port.mctrl |= TIOCM_OUT1;
763 } else
764 up->port.mctrl &= ~TIOCM_OUT2;
765
766 sunsu_set_mctrl(&up->port, up->port.mctrl);
767 spin_unlock_irqrestore(&up->port.lock, flags);
768
769 /*
770 * Disable break condition and FIFOs
771 */
772 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
773 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
774 UART_FCR_CLEAR_RCVR |
775 UART_FCR_CLEAR_XMIT);
776 serial_outp(up, UART_FCR, 0);
777
778 #ifdef CONFIG_SERIAL_8250_RSA
779 /*
780 * Reset the RSA board back to 115kbps compat mode.
781 */
782 disable_rsa(up);
783 #endif
784
785 /*
786 * Read data port to reset things.
787 */
788 (void) serial_in(up, UART_RX);
789
790 free_irq(up->irq, up);
791 }
792
793 static void
794 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
795 unsigned int iflag, unsigned int quot)
796 {
797 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
798 unsigned char cval, fcr = 0;
799 unsigned long flags;
800
801 switch (cflag & CSIZE) {
802 case CS5:
803 cval = 0x00;
804 break;
805 case CS6:
806 cval = 0x01;
807 break;
808 case CS7:
809 cval = 0x02;
810 break;
811 default:
812 case CS8:
813 cval = 0x03;
814 break;
815 }
816
817 if (cflag & CSTOPB)
818 cval |= 0x04;
819 if (cflag & PARENB)
820 cval |= UART_LCR_PARITY;
821 if (!(cflag & PARODD))
822 cval |= UART_LCR_EPAR;
823 #ifdef CMSPAR
824 if (cflag & CMSPAR)
825 cval |= UART_LCR_SPAR;
826 #endif
827
828 /*
829 * Work around a bug in the Oxford Semiconductor 952 rev B
830 * chip which causes it to seriously miscalculate baud rates
831 * when DLL is 0.
832 */
833 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
834 up->rev == 0x5201)
835 quot ++;
836
837 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
838 if ((up->port.uartclk / quot) < (2400 * 16))
839 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
840 #ifdef CONFIG_SERIAL_8250_RSA
841 else if (up->port.type == PORT_RSA)
842 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
843 #endif
844 else
845 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
846 }
847 if (up->port.type == PORT_16750)
848 fcr |= UART_FCR7_64BYTE;
849
850 /*
851 * Ok, we're now changing the port state. Do it with
852 * interrupts disabled.
853 */
854 spin_lock_irqsave(&up->port.lock, flags);
855
856 /*
857 * Update the per-port timeout.
858 */
859 uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
860
861 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
862 if (iflag & INPCK)
863 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
864 if (iflag & (BRKINT | PARMRK))
865 up->port.read_status_mask |= UART_LSR_BI;
866
867 /*
868 * Characteres to ignore
869 */
870 up->port.ignore_status_mask = 0;
871 if (iflag & IGNPAR)
872 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
873 if (iflag & IGNBRK) {
874 up->port.ignore_status_mask |= UART_LSR_BI;
875 /*
876 * If we're ignoring parity and break indicators,
877 * ignore overruns too (for real raw support).
878 */
879 if (iflag & IGNPAR)
880 up->port.ignore_status_mask |= UART_LSR_OE;
881 }
882
883 /*
884 * ignore all characters if CREAD is not set
885 */
886 if ((cflag & CREAD) == 0)
887 up->port.ignore_status_mask |= UART_LSR_DR;
888
889 /*
890 * CTS flow control flag and modem status interrupts
891 */
892 up->ier &= ~UART_IER_MSI;
893 if (UART_ENABLE_MS(&up->port, cflag))
894 up->ier |= UART_IER_MSI;
895
896 serial_out(up, UART_IER, up->ier);
897
898 if (uart_config[up->port.type].flags & UART_STARTECH) {
899 serial_outp(up, UART_LCR, 0xBF);
900 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
901 }
902 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
903 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
904 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
905 if (up->port.type == PORT_16750)
906 serial_outp(up, UART_FCR, fcr); /* set fcr */
907 serial_outp(up, UART_LCR, cval); /* reset DLAB */
908 up->lcr = cval; /* Save LCR */
909 if (up->port.type != PORT_16750) {
910 if (fcr & UART_FCR_ENABLE_FIFO) {
911 /* emulated UARTs (Lucent Venus 167x) need two steps */
912 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
913 }
914 serial_outp(up, UART_FCR, fcr); /* set fcr */
915 }
916
917 up->cflag = cflag;
918
919 spin_unlock_irqrestore(&up->port.lock, flags);
920 }
921
922 static void
923 sunsu_set_termios(struct uart_port *port, struct termios *termios,
924 struct termios *old)
925 {
926 unsigned int baud, quot;
927
928 /*
929 * Ask the core to calculate the divisor for us.
930 */
931 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
932 quot = uart_get_divisor(port, baud);
933
934 sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
935 }
936
937 static void sunsu_release_port(struct uart_port *port)
938 {
939 }
940
941 static int sunsu_request_port(struct uart_port *port)
942 {
943 return 0;
944 }
945
946 static void sunsu_config_port(struct uart_port *port, int flags)
947 {
948 struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
949
950 if (flags & UART_CONFIG_TYPE) {
951 /*
952 * We are supposed to call autoconfig here, but this requires
953 * splitting all the OBP probing crap from the UART probing.
954 * We'll do it when we kill sunsu.c altogether.
955 */
956 port->type = up->type_probed; /* XXX */
957 }
958 }
959
960 static int
961 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
962 {
963 return -EINVAL;
964 }
965
966 static const char *
967 sunsu_type(struct uart_port *port)
968 {
969 int type = port->type;
970
971 if (type >= ARRAY_SIZE(uart_config))
972 type = 0;
973 return uart_config[type].name;
974 }
975
976 static struct uart_ops sunsu_pops = {
977 .tx_empty = sunsu_tx_empty,
978 .set_mctrl = sunsu_set_mctrl,
979 .get_mctrl = sunsu_get_mctrl,
980 .stop_tx = sunsu_stop_tx,
981 .start_tx = sunsu_start_tx,
982 .stop_rx = sunsu_stop_rx,
983 .enable_ms = sunsu_enable_ms,
984 .break_ctl = sunsu_break_ctl,
985 .startup = sunsu_startup,
986 .shutdown = sunsu_shutdown,
987 .set_termios = sunsu_set_termios,
988 .type = sunsu_type,
989 .release_port = sunsu_release_port,
990 .request_port = sunsu_request_port,
991 .config_port = sunsu_config_port,
992 .verify_port = sunsu_verify_port,
993 };
994
995 #define UART_NR 4
996
997 static struct uart_sunsu_port sunsu_ports[UART_NR];
998
999 #ifdef CONFIG_SERIO
1000
1001 static spinlock_t sunsu_serio_lock = SPIN_LOCK_UNLOCKED;
1002
1003 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
1004 {
1005 struct uart_sunsu_port *up = serio->driver;
1006 unsigned long flags;
1007 int lsr;
1008
1009 spin_lock_irqsave(&sunsu_serio_lock, flags);
1010
1011 do {
1012 lsr = serial_in(up, UART_LSR);
1013 } while (!(lsr & UART_LSR_THRE));
1014
1015 /* Send the character out. */
1016 serial_out(up, UART_TX, ch);
1017
1018 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1019
1020 return 0;
1021 }
1022
1023 static int sunsu_serio_open(struct serio *serio)
1024 {
1025 unsigned long flags;
1026 int ret;
1027
1028 spin_lock_irqsave(&sunsu_serio_lock, flags);
1029 if (serio->private == NULL) {
1030 serio->private = (void *) -1L;
1031 ret = 0;
1032 } else
1033 ret = -EBUSY;
1034 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1035
1036 return ret;
1037 }
1038
1039 static void sunsu_serio_close(struct serio *serio)
1040 {
1041 unsigned long flags;
1042
1043 spin_lock_irqsave(&sunsu_serio_lock, flags);
1044 serio->private = NULL;
1045 spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1046 }
1047
1048 #endif /* CONFIG_SERIO */
1049
1050 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1051 {
1052 unsigned char status1, status2, scratch, scratch2, scratch3;
1053 unsigned char save_lcr, save_mcr;
1054 struct linux_ebus_device *dev = 0;
1055 struct linux_ebus *ebus;
1056 #ifdef CONFIG_SPARC64
1057 struct sparc_isa_bridge *isa_br;
1058 struct sparc_isa_device *isa_dev;
1059 #endif
1060 #ifndef CONFIG_SPARC64
1061 struct linux_prom_registers reg0;
1062 #endif
1063 unsigned long flags;
1064
1065 if (!up->port_node || !up->su_type)
1066 return;
1067
1068 up->type_probed = PORT_UNKNOWN;
1069 up->port.iotype = SERIAL_IO_MEM;
1070
1071 /*
1072 * First we look for Ebus-bases su's
1073 */
1074 for_each_ebus(ebus) {
1075 for_each_ebusdev(dev, ebus) {
1076 if (dev->prom_node == up->port_node) {
1077 /*
1078 * The EBus is broken on sparc; it delivers
1079 * virtual addresses in resources. Oh well...
1080 * This is correct on sparc64, though.
1081 */
1082 up->port.membase = (char *) dev->resource[0].start;
1083 /*
1084 * This is correct on both architectures.
1085 */
1086 up->port.mapbase = dev->resource[0].start;
1087 up->irq = dev->irqs[0];
1088 goto ebus_done;
1089 }
1090 }
1091 }
1092
1093 #ifdef CONFIG_SPARC64
1094 for_each_isa(isa_br) {
1095 for_each_isadev(isa_dev, isa_br) {
1096 if (isa_dev->prom_node == up->port_node) {
1097 /* Same on sparc64. Cool architecure... */
1098 up->port.membase = (char *) isa_dev->resource.start;
1099 up->port.mapbase = isa_dev->resource.start;
1100 up->irq = isa_dev->irq;
1101 goto ebus_done;
1102 }
1103 }
1104 }
1105 #endif
1106
1107 #ifdef CONFIG_SPARC64
1108 /*
1109 * Not on Ebus, bailing.
1110 */
1111 return;
1112 #else
1113 /*
1114 * Not on Ebus, must be OBIO.
1115 */
1116 if (prom_getproperty(up->port_node, "reg",
1117 (char *)&reg0, sizeof(reg0)) == -1) {
1118 prom_printf("sunsu: no \"reg\" property\n");
1119 return;
1120 }
1121 prom_apply_obio_ranges(&reg0, 1);
1122 if (reg0.which_io != 0) { /* Just in case... */
1123 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1124 reg0.which_io, reg0.phys_addr);
1125 return;
1126 }
1127 up->port.mapbase = reg0.phys_addr;
1128 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1129 prom_printf("sunsu: Cannot map registers.\n");
1130 return;
1131 }
1132
1133 /*
1134 * 0x20 is sun4m thing, Dave Redman heritage.
1135 * See arch/sparc/kernel/irq.c.
1136 */
1137 #define IRQ_4M(n) ((n)|0x20)
1138
1139 /*
1140 * There is no intr property on MrCoffee, so hardwire it.
1141 */
1142 up->irq = IRQ_4M(13);
1143 #endif
1144
1145 ebus_done:
1146
1147 spin_lock_irqsave(&up->port.lock, flags);
1148
1149 if (!(up->port.flags & ASYNC_BUGGY_UART)) {
1150 /*
1151 * Do a simple existence test first; if we fail this, there's
1152 * no point trying anything else.
1153 *
1154 * 0x80 is used as a nonsense port to prevent against false
1155 * positives due to ISA bus float. The assumption is that
1156 * 0x80 is a non-existent port; which should be safe since
1157 * include/asm/io.h also makes this assumption.
1158 */
1159 scratch = serial_inp(up, UART_IER);
1160 serial_outp(up, UART_IER, 0);
1161 #ifdef __i386__
1162 outb(0xff, 0x080);
1163 #endif
1164 scratch2 = serial_inp(up, UART_IER);
1165 serial_outp(up, UART_IER, 0x0f);
1166 #ifdef __i386__
1167 outb(0, 0x080);
1168 #endif
1169 scratch3 = serial_inp(up, UART_IER);
1170 serial_outp(up, UART_IER, scratch);
1171 if (scratch2 != 0 || scratch3 != 0x0F)
1172 goto out; /* We failed; there's nothing here */
1173 }
1174
1175 save_mcr = serial_in(up, UART_MCR);
1176 save_lcr = serial_in(up, UART_LCR);
1177
1178 /*
1179 * Check to see if a UART is really there. Certain broken
1180 * internal modems based on the Rockwell chipset fail this
1181 * test, because they apparently don't implement the loopback
1182 * test mode. So this test is skipped on the COM 1 through
1183 * COM 4 ports. This *should* be safe, since no board
1184 * manufacturer would be stupid enough to design a board
1185 * that conflicts with COM 1-4 --- we hope!
1186 */
1187 if (!(up->port.flags & ASYNC_SKIP_TEST)) {
1188 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1189 status1 = serial_inp(up, UART_MSR) & 0xF0;
1190 serial_outp(up, UART_MCR, save_mcr);
1191 if (status1 != 0x90)
1192 goto out; /* We failed loopback test */
1193 }
1194 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1195 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1196 serial_outp(up, UART_LCR, 0);
1197 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1198 scratch = serial_in(up, UART_IIR) >> 6;
1199 switch (scratch) {
1200 case 0:
1201 up->port.type = PORT_16450;
1202 break;
1203 case 1:
1204 up->port.type = PORT_UNKNOWN;
1205 break;
1206 case 2:
1207 up->port.type = PORT_16550;
1208 break;
1209 case 3:
1210 up->port.type = PORT_16550A;
1211 break;
1212 }
1213 if (up->port.type == PORT_16550A) {
1214 /* Check for Startech UART's */
1215 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1216 if (serial_in(up, UART_EFR) == 0) {
1217 up->port.type = PORT_16650;
1218 } else {
1219 serial_outp(up, UART_LCR, 0xBF);
1220 if (serial_in(up, UART_EFR) == 0)
1221 up->port.type = PORT_16650V2;
1222 }
1223 }
1224 if (up->port.type == PORT_16550A) {
1225 /* Check for TI 16750 */
1226 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1227 serial_outp(up, UART_FCR,
1228 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1229 scratch = serial_in(up, UART_IIR) >> 5;
1230 if (scratch == 7) {
1231 /*
1232 * If this is a 16750, and not a cheap UART
1233 * clone, then it should only go into 64 byte
1234 * mode if the UART_FCR7_64BYTE bit was set
1235 * while UART_LCR_DLAB was latched.
1236 */
1237 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1238 serial_outp(up, UART_LCR, 0);
1239 serial_outp(up, UART_FCR,
1240 UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1241 scratch = serial_in(up, UART_IIR) >> 5;
1242 if (scratch == 6)
1243 up->port.type = PORT_16750;
1244 }
1245 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1246 }
1247 serial_outp(up, UART_LCR, save_lcr);
1248 if (up->port.type == PORT_16450) {
1249 scratch = serial_in(up, UART_SCR);
1250 serial_outp(up, UART_SCR, 0xa5);
1251 status1 = serial_in(up, UART_SCR);
1252 serial_outp(up, UART_SCR, 0x5a);
1253 status2 = serial_in(up, UART_SCR);
1254 serial_outp(up, UART_SCR, scratch);
1255
1256 if ((status1 != 0xa5) || (status2 != 0x5a))
1257 up->port.type = PORT_8250;
1258 }
1259
1260 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1261
1262 if (up->port.type == PORT_UNKNOWN)
1263 goto out;
1264 up->type_probed = up->port.type; /* XXX */
1265
1266 /*
1267 * Reset the UART.
1268 */
1269 #ifdef CONFIG_SERIAL_8250_RSA
1270 if (up->port.type == PORT_RSA)
1271 serial_outp(up, UART_RSA_FRR, 0);
1272 #endif
1273 serial_outp(up, UART_MCR, save_mcr);
1274 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1275 UART_FCR_CLEAR_RCVR |
1276 UART_FCR_CLEAR_XMIT));
1277 serial_outp(up, UART_FCR, 0);
1278 (void)serial_in(up, UART_RX);
1279 serial_outp(up, UART_IER, 0);
1280
1281 out:
1282 spin_unlock_irqrestore(&up->port.lock, flags);
1283 }
1284
1285 static struct uart_driver sunsu_reg = {
1286 .owner = THIS_MODULE,
1287 .driver_name = "serial",
1288 .devfs_name = "tts/",
1289 .dev_name = "ttyS",
1290 .major = TTY_MAJOR,
1291 };
1292
1293 static int __init sunsu_kbd_ms_init(void)
1294 {
1295 struct uart_sunsu_port *up;
1296 int i;
1297
1298 for (i = 0, up = sunsu_ports; i < 2; i++, up++) {
1299 up->port.line = i;
1300 up->port.type = PORT_UNKNOWN;
1301 up->port.uartclk = (SU_BASE_BAUD * 16);
1302
1303 if (up->su_type == SU_PORT_KBD)
1304 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1305 else
1306 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1307
1308 sunsu_autoconfig(up);
1309 if (up->port.type == PORT_UNKNOWN)
1310 continue;
1311
1312 printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
1313 i,
1314 up->port.membase, __irq_itoa(up->irq),
1315 sunsu_type(&up->port));
1316
1317 #ifdef CONFIG_SERIO
1318 memset(&up->serio, 0, sizeof(up->serio));
1319
1320 up->serio.driver = up;
1321
1322 up->serio.type = SERIO_RS232;
1323 if (up->su_type == SU_PORT_KBD) {
1324 up->serio.type |= SERIO_SUNKBD;
1325 up->serio.name = "sukbd";
1326 } else {
1327 up->serio.type |= SERIO_SUN;
1328 up->serio.name = "sums";
1329 }
1330 up->serio.phys = (i == 0 ? "su/serio0" : "su/serio1");
1331
1332 up->serio.write = sunsu_serio_write;
1333 up->serio.open = sunsu_serio_open;
1334 up->serio.close = sunsu_serio_close;
1335
1336 serio_register_port(&up->serio);
1337 #endif
1338
1339 sunsu_startup(&up->port);
1340 }
1341 return 0;
1342 }
1343
1344 /*
1345 * ------------------------------------------------------------
1346 * Serial console driver
1347 * ------------------------------------------------------------
1348 */
1349
1350 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1351
1352 /*
1353 * Wait for transmitter & holding register to empty
1354 */
1355 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1356 {
1357 unsigned int status, tmout = 10000;
1358
1359 /* Wait up to 10ms for the character(s) to be sent. */
1360 do {
1361 status = serial_in(up, UART_LSR);
1362
1363 if (status & UART_LSR_BI)
1364 up->lsr_break_flag = UART_LSR_BI;
1365
1366 if (--tmout == 0)
1367 break;
1368 udelay(1);
1369 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1370
1371 /* Wait up to 1s for flow control if necessary */
1372 if (up->port.flags & ASYNC_CONS_FLOW) {
1373 tmout = 1000000;
1374 while (--tmout &&
1375 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1376 udelay(1);
1377 }
1378 }
1379
1380 /*
1381 * Print a string to the serial port trying not to disturb
1382 * any possible real use of the port...
1383 */
1384 static void sunsu_console_write(struct console *co, const char *s,
1385 unsigned int count)
1386 {
1387 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1388 unsigned int ier;
1389 int i;
1390
1391 /*
1392 * First save the UER then disable the interrupts
1393 */
1394 ier = serial_in(up, UART_IER);
1395 serial_out(up, UART_IER, 0);
1396
1397 /*
1398 * Now, do each character
1399 */
1400 for (i = 0; i < count; i++, s++) {
1401 wait_for_xmitr(up);
1402
1403 /*
1404 * Send the character out.
1405 * If a LF, also do CR...
1406 */
1407 serial_out(up, UART_TX, *s);
1408 if (*s == 10) {
1409 wait_for_xmitr(up);
1410 serial_out(up, UART_TX, 13);
1411 }
1412 }
1413
1414 /*
1415 * Finally, wait for transmitter to become empty
1416 * and restore the IER
1417 */
1418 wait_for_xmitr(up);
1419 serial_out(up, UART_IER, ier);
1420 }
1421
1422 /*
1423 * Setup initial baud/bits/parity. We do two things here:
1424 * - construct a cflag setting for the first su_open()
1425 * - initialize the serial port
1426 * Return non-zero if we didn't find a serial port.
1427 */
1428 static int __init sunsu_console_setup(struct console *co, char *options)
1429 {
1430 struct uart_port *port;
1431 int baud = 9600;
1432 int bits = 8;
1433 int parity = 'n';
1434 int flow = 'n';
1435
1436 printk("Console: ttyS%d (SU)\n",
1437 (sunsu_reg.minor - 64) + co->index);
1438
1439 /*
1440 * Check whether an invalid uart number has been specified, and
1441 * if so, search for the first available port that does have
1442 * console support.
1443 */
1444 if (co->index >= UART_NR)
1445 co->index = 0;
1446 port = &sunsu_ports[co->index].port;
1447
1448 /*
1449 * Temporary fix.
1450 */
1451 spin_lock_init(&port->lock);
1452
1453 if (options)
1454 uart_parse_options(options, &baud, &parity, &bits, &flow);
1455
1456 return uart_set_options(port, co, baud, parity, bits, flow);
1457 }
1458
1459 static struct console sunsu_cons = {
1460 .name = "ttyS",
1461 .write = sunsu_console_write,
1462 .device = uart_console_device,
1463 .setup = sunsu_console_setup,
1464 .flags = CON_PRINTBUFFER,
1465 .index = -1,
1466 .data = &sunsu_reg,
1467 };
1468
1469 /*
1470 * Register console.
1471 */
1472
1473 static int __init sunsu_serial_console_init(void)
1474 {
1475 int i;
1476
1477 if (con_is_present())
1478 return 0;
1479
1480 for (i = 0; i < UART_NR; i++) {
1481 int this_minor = sunsu_reg.minor + i;
1482
1483 if ((this_minor - 64) == (serial_console - 1))
1484 break;
1485 }
1486 if (i == UART_NR)
1487 return 0;
1488 if (sunsu_ports[i].port_node == 0)
1489 return 0;
1490
1491 sunsu_cons.index = i;
1492 register_console(&sunsu_cons);
1493 return 0;
1494 }
1495
1496 static int __init sunsu_serial_init(void)
1497 {
1498 int instance, ret, i;
1499
1500 /* How many instances do we need? */
1501 instance = 0;
1502 for (i = 0; i < UART_NR; i++) {
1503 struct uart_sunsu_port *up = &sunsu_ports[i];
1504
1505 if (up->su_type == SU_PORT_MS ||
1506 up->su_type == SU_PORT_KBD)
1507 continue;
1508
1509 up->port.flags |= ASYNC_BOOT_AUTOCONF;
1510 up->port.type = PORT_UNKNOWN;
1511 up->port.uartclk = (SU_BASE_BAUD * 16);
1512
1513 sunsu_autoconfig(up);
1514 if (up->port.type == PORT_UNKNOWN)
1515 continue;
1516
1517 up->port.line = instance++;
1518 up->port.ops = &sunsu_pops;
1519 }
1520
1521 sunsu_reg.minor = sunserial_current_minor;
1522 sunserial_current_minor += instance;
1523
1524 sunsu_reg.nr = instance;
1525 sunsu_reg.cons = &sunsu_cons;
1526
1527 ret = uart_register_driver(&sunsu_reg);
1528 if (ret < 0)
1529 return ret;
1530
1531 for (i = 0; i < UART_NR; i++) {
1532 struct uart_sunsu_port *up = &sunsu_ports[i];
1533
1534 /* Do not register Keyboard/Mouse lines with UART
1535 * layer.
1536 */
1537 if (up->su_type == SU_PORT_MS ||
1538 up->su_type == SU_PORT_KBD)
1539 continue;
1540
1541 if (up->port.type == PORT_UNKNOWN)
1542 continue;
1543
1544 uart_add_one_port(&sunsu_reg, &up->port);
1545 }
1546
1547 return 0;
1548 }
1549
1550 static int su_node_ok(int node, char *name, int namelen)
1551 {
1552 if (strncmp(name, "su", namelen) == 0 ||
1553 strncmp(name, "su_pnp", namelen) == 0)
1554 return 1;
1555
1556 if (strncmp(name, "serial", namelen) == 0) {
1557 char compat[32];
1558 int clen;
1559
1560 /* Is it _really_ a 'su' device? */
1561 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1562 if (clen > 0) {
1563 if (strncmp(compat, "sab82532", 8) == 0) {
1564 /* Nope, Siemens serial, not for us. */
1565 return 0;
1566 }
1567 }
1568 return 1;
1569 }
1570
1571 return 0;
1572 }
1573
1574 #define SU_PROPSIZE 128
1575
1576 /*
1577 * Scan status structure.
1578 * "prop" is a local variable but it eats stack to keep it in each
1579 * stack frame of a recursive procedure.
1580 */
1581 struct su_probe_scan {
1582 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1583 int msx, kbx; /* minors for mouse and keyboard */
1584 int devices; /* scan index */
1585 char prop[SU_PROPSIZE];
1586 };
1587
1588 /*
1589 * We have several platforms which present 'su' in different parts
1590 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1591 * We walk over the tree and find them wherever PROM hides them.
1592 */
1593 static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1594 {
1595 struct uart_sunsu_port *up;
1596 int len;
1597
1598 if (t->devices >= UART_NR)
1599 return;
1600
1601 for (; sunode != 0; sunode = prom_getsibling(sunode)) {
1602 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
1603 if (len <= 1)
1604 continue; /* Broken PROM node */
1605
1606 if (su_node_ok(sunode, t->prop, len)) {
1607 up = &sunsu_ports[t->devices];
1608 if (t->kbnode != 0 && sunode == t->kbnode) {
1609 t->kbx = t->devices;
1610 up->su_type = SU_PORT_KBD;
1611 } else if (t->msnode != 0 && sunode == t->msnode) {
1612 t->msx = t->devices;
1613 up->su_type = SU_PORT_MS;
1614 } else {
1615 #ifdef CONFIG_SPARC64
1616 /*
1617 * Do not attempt to use the truncated
1618 * keyboard/mouse ports as serial ports
1619 * on Ultras with PC keyboard attached.
1620 */
1621 if (prom_getbool(sunode, "mouse"))
1622 continue;
1623 if (prom_getbool(sunode, "keyboard"))
1624 continue;
1625 #endif
1626 up->su_type = SU_PORT_PORT;
1627 }
1628 up->port_node = sunode;
1629 ++t->devices;
1630 } else {
1631 su_probe_any(t, prom_getchild(sunode));
1632 }
1633 }
1634 }
1635
1636 static int __init sunsu_probe(void)
1637 {
1638 int node;
1639 int len;
1640 struct su_probe_scan scan;
1641
1642 /*
1643 * First, we scan the tree.
1644 */
1645 scan.devices = 0;
1646 scan.msx = -1;
1647 scan.kbx = -1;
1648 scan.kbnode = 0;
1649 scan.msnode = 0;
1650
1651 /*
1652 * Get the nodes for keyboard and mouse from 'aliases'...
1653 */
1654 node = prom_getchild(prom_root_node);
1655 node = prom_searchsiblings(node, "aliases");
1656 if (node != 0) {
1657 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1658 if (len > 0) {
1659 scan.prop[len] = 0;
1660 scan.kbnode = prom_finddevice(scan.prop);
1661 }
1662
1663 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
1664 if (len > 0) {
1665 scan.prop[len] = 0;
1666 scan.msnode = prom_finddevice(scan.prop);
1667 }
1668 }
1669
1670 su_probe_any(&scan, prom_getchild(prom_root_node));
1671
1672 /*
1673 * Second, we process the special case of keyboard and mouse.
1674 *
1675 * Currently if we got keyboard and mouse hooked to "su" ports
1676 * we do not use any possible remaining "su" as a serial port.
1677 * Thus, we ignore values of .msx and .kbx, then compact ports.
1678 */
1679 if (scan.msx != -1 && scan.kbx != -1) {
1680 sunsu_ports[0].su_type = SU_PORT_MS;
1681 sunsu_ports[0].port_node = scan.msnode;
1682 sunsu_ports[1].su_type = SU_PORT_KBD;
1683 sunsu_ports[1].port_node = scan.kbnode;
1684
1685 sunsu_kbd_ms_init();
1686 return 0;
1687 }
1688
1689 if (scan.msx != -1 || scan.kbx != -1) {
1690 printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
1691 return -ENODEV;
1692 }
1693
1694 if (scan.devices == 0)
1695 return -ENODEV;
1696
1697 /*
1698 * Console must be initiated after the generic initialization.
1699 */
1700 sunsu_serial_init();
1701 sunsu_serial_console_init();
1702
1703 return 0;
1704 }
1705
1706 static void __exit sunsu_exit(void)
1707 {
1708 int i, saw_uart;
1709
1710 saw_uart = 0;
1711 for (i = 0; i < UART_NR; i++) {
1712 struct uart_sunsu_port *up = &sunsu_ports[i];
1713
1714 if (up->su_type == SU_PORT_MS ||
1715 up->su_type == SU_PORT_KBD) {
1716 #ifdef CONFIG_SERIO
1717 serio_unregister_port(&up->serio);
1718 #endif
1719 } else if (up->port.type != PORT_UNKNOWN) {
1720 uart_remove_one_port(&sunsu_reg, &up->port);
1721 saw_uart++;
1722 }
1723 }
1724
1725 if (saw_uart)
1726 uart_unregister_driver(&sunsu_reg);
1727 }
1728
1729 module_init(sunsu_probe);
1730 module_exit(sunsu_exit);
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