2 * linux/drivers/char/clps711x.c
4 * Driver for CLPS711x serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * $Id: clps711x.c,v 1.42 2002/07/28 10:03:28 rmk Exp $
28 #include <linux/config.h>
29 #include <linux/module.h>
30 #include <linux/tty.h>
31 #include <linux/ioport.h>
32 #include <linux/init.h>
33 #include <linux/serial.h>
34 #include <linux/console.h>
35 #include <linux/sysrq.h>
36 #include <linux/spinlock.h>
38 #include <asm/hardware.h>
42 #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
46 #include <linux/serial_core.h>
48 #include <asm/hardware/clps7111.h>
52 #ifndef CONFIG_SERIAL_CLPS711X_OLD_NAME
53 #define SERIAL_CLPS711X_MAJOR 204
54 #define SERIAL_CLPS711X_MINOR 40
55 #define SERIAL_CLPS711X_NR UART_NR
58 #warning The old names/device number for this driver if compatabity is needed
59 #define SERIAL_CLPS711X_MAJOR 204
60 #define SERIAL_CLPS711X_MINOR 16
61 #define SERIAL_CLPS711X_NR UART_NR
66 * We use the relevant SYSCON register as a base address for these ports.
68 #define UBRLCR(port) ((port)->iobase + UBRLCR1 - SYSCON1)
69 #define UARTDR(port) ((port)->iobase + UARTDR1 - SYSCON1)
70 #define SYSFLG(port) ((port)->iobase + SYSFLG1 - SYSCON1)
71 #define SYSCON(port) ((port)->iobase + SYSCON1 - SYSCON1)
73 #define TX_IRQ(port) ((port)->irq)
74 #define RX_IRQ(port) ((port)->irq + 1)
76 #define UART_ANY_ERR (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)
78 #define tx_enabled(port) ((port)->unused[0])
81 clps711xuart_stop_tx(struct uart_port
*port
, unsigned int tty_stop
)
83 if (tx_enabled(port
)) {
84 disable_irq(TX_IRQ(port
));
90 clps711xuart_start_tx(struct uart_port
*port
, unsigned int tty_start
)
92 if (!tx_enabled(port
)) {
93 enable_irq(TX_IRQ(port
));
98 static void clps711xuart_stop_rx(struct uart_port
*port
)
100 disable_irq(RX_IRQ(port
));
103 static void clps711xuart_enable_ms(struct uart_port
*port
)
107 static void clps711xuart_int_rx(int irq
, void *dev_id
, struct pt_regs
*regs
)
109 struct uart_port
*port
= dev_id
;
110 struct tty_struct
*tty
= port
->info
->tty
;
111 unsigned int status
, ch
, flg
, ignored
= 0;
113 status
= clps_readl(SYSFLG(port
));
114 while (!(status
& SYSFLG_URXFE
)) {
115 ch
= clps_readl(UARTDR(port
));
117 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
)
124 * Note that the error handling code is
125 * out of the main execution path
127 if (ch
& UART_ANY_ERR
)
130 if (uart_handle_sysrq_char(port
, ch
, regs
))
134 *tty
->flip
.flag_buf_ptr
++ = flg
;
135 *tty
->flip
.char_buf_ptr
++ = ch
;
138 status
= clps_readl(SYSFLG(port
));
141 tty_flip_buffer_push(tty
);
145 if (ch
& UARTDR_PARERR
)
146 port
->icount
.parity
++;
147 else if (ch
& UARTDR_FRMERR
)
148 port
->icount
.frame
++;
149 if (ch
& UARTDR_OVERR
)
150 port
->icount
.overrun
++;
152 if (ch
& port
->ignore_status_mask
) {
157 ch
&= port
->read_status_mask
;
159 if (ch
& UARTDR_PARERR
)
161 else if (ch
& UARTDR_FRMERR
)
164 if (ch
& UARTDR_OVERR
) {
166 * CHECK: does overrun affect the current character?
167 * ASSUMPTION: it does not.
169 *tty
->flip
.flag_buf_ptr
++ = flg
;
170 *tty
->flip
.char_buf_ptr
++ = ch
;
172 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
)
183 static void clps711xuart_int_tx(int irq
, void *dev_id
, struct pt_regs
*regs
)
185 struct uart_port
*port
= dev_id
;
186 struct circ_buf
*xmit
= &port
->info
->xmit
;
190 clps_writel(port
->x_char
, UARTDR(port
));
195 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
196 clps711xuart_stop_tx(port
, 0);
200 count
= port
->fifosize
>> 1;
202 clps_writel(xmit
->buf
[xmit
->tail
], UARTDR(port
));
203 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
205 if (uart_circ_empty(xmit
))
207 } while (--count
> 0);
209 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
210 uart_write_wakeup(port
);
212 if (uart_circ_empty(xmit
))
213 clps711xuart_stop_tx(port
, 0);
216 static unsigned int clps711xuart_tx_empty(struct uart_port
*port
)
218 unsigned int status
= clps_readl(SYSFLG(port
));
219 return status
& SYSFLG_UBUSY
? 0 : TIOCSER_TEMT
;
222 static unsigned int clps711xuart_get_mctrl(struct uart_port
*port
)
224 unsigned int port_addr
;
225 unsigned int result
= 0;
228 port_addr
= SYSFLG(port
);
229 if (port_addr
== SYSFLG1
) {
230 status
= clps_readl(SYSFLG1
);
231 if (status
& SYSFLG1_DCD
)
233 if (status
& SYSFLG1_DSR
)
235 if (status
& SYSFLG1_CTS
)
243 clps711xuart_set_mctrl_null(struct uart_port
*port
, unsigned int mctrl
)
247 static void clps711xuart_break_ctl(struct uart_port
*port
, int break_state
)
252 spin_lock_irqsave(&port
->lock
, flags
);
253 ubrlcr
= clps_readl(UBRLCR(port
));
254 if (break_state
== -1)
255 ubrlcr
|= UBRLCR_BREAK
;
257 ubrlcr
&= ~UBRLCR_BREAK
;
258 clps_writel(ubrlcr
, UBRLCR(port
));
259 spin_unlock_irqrestore(&port
->lock
, flags
);
262 static int clps711xuart_startup(struct uart_port
*port
)
267 tx_enabled(port
) = 1;
272 retval
= request_irq(TX_IRQ(port
), clps711xuart_int_tx
, 0,
273 "clps711xuart_tx", port
);
277 retval
= request_irq(RX_IRQ(port
), clps711xuart_int_rx
, 0,
278 "clps711xuart_rx", port
);
280 free_irq(TX_IRQ(port
), port
);
287 syscon
= clps_readl(SYSCON(port
));
288 syscon
|= SYSCON_UARTEN
;
289 clps_writel(syscon
, SYSCON(port
));
294 static void clps711xuart_shutdown(struct uart_port
*port
)
296 unsigned int ubrlcr
, syscon
;
301 free_irq(TX_IRQ(port
), port
); /* TX interrupt */
302 free_irq(RX_IRQ(port
), port
); /* RX interrupt */
307 syscon
= clps_readl(SYSCON(port
));
308 syscon
&= ~SYSCON_UARTEN
;
309 clps_writel(syscon
, SYSCON(port
));
312 * disable break condition and fifos
314 ubrlcr
= clps_readl(UBRLCR(port
));
315 ubrlcr
&= ~(UBRLCR_FIFOEN
| UBRLCR_BREAK
);
316 clps_writel(ubrlcr
, UBRLCR(port
));
320 clps711xuart_set_termios(struct uart_port
*port
, struct termios
*termios
,
323 unsigned int ubrlcr
, baud
, quot
;
327 * We don't implement CREAD.
329 termios
->c_cflag
|= CREAD
;
332 * Ask the core to calculate the divisor for us.
334 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
335 quot
= uart_get_divisor(port
, baud
);
337 switch (termios
->c_cflag
& CSIZE
) {
339 ubrlcr
= UBRLCR_WRDLEN5
;
342 ubrlcr
= UBRLCR_WRDLEN6
;
345 ubrlcr
= UBRLCR_WRDLEN7
;
348 ubrlcr
= UBRLCR_WRDLEN8
;
351 if (termios
->c_cflag
& CSTOPB
)
352 ubrlcr
|= UBRLCR_XSTOP
;
353 if (termios
->c_cflag
& PARENB
) {
354 ubrlcr
|= UBRLCR_PRTEN
;
355 if (!(termios
->c_cflag
& PARODD
))
356 ubrlcr
|= UBRLCR_EVENPRT
;
358 if (port
->fifosize
> 1)
359 ubrlcr
|= UBRLCR_FIFOEN
;
361 spin_lock_irqsave(&port
->lock
, flags
);
364 * Update the per-port timeout.
366 uart_update_timeout(port
, termios
->c_cflag
, baud
);
368 port
->read_status_mask
= UARTDR_OVERR
;
369 if (termios
->c_iflag
& INPCK
)
370 port
->read_status_mask
|= UARTDR_PARERR
| UARTDR_FRMERR
;
373 * Characters to ignore
375 port
->ignore_status_mask
= 0;
376 if (termios
->c_iflag
& IGNPAR
)
377 port
->ignore_status_mask
|= UARTDR_FRMERR
| UARTDR_PARERR
;
378 if (termios
->c_iflag
& IGNBRK
) {
380 * If we're ignoring parity and break indicators,
381 * ignore overruns to (for real raw support).
383 if (termios
->c_iflag
& IGNPAR
)
384 port
->ignore_status_mask
|= UARTDR_OVERR
;
389 clps_writel(ubrlcr
| quot
, UBRLCR(port
));
391 spin_unlock_irqrestore(&port
->lock
, flags
);
394 static const char *clps711xuart_type(struct uart_port
*port
)
396 return port
->type
== PORT_CLPS711X
? "CLPS711x" : NULL
;
400 * Configure/autoconfigure the port.
402 static void clps711xuart_config_port(struct uart_port
*port
, int flags
)
404 if (flags
& UART_CONFIG_TYPE
)
405 port
->type
= PORT_CLPS711X
;
408 static void clps711xuart_release_port(struct uart_port
*port
)
412 static int clps711xuart_request_port(struct uart_port
*port
)
417 static struct uart_ops clps711x_pops
= {
418 .tx_empty
= clps711xuart_tx_empty
,
419 .set_mctrl
= clps711xuart_set_mctrl_null
,
420 .get_mctrl
= clps711xuart_get_mctrl
,
421 .stop_tx
= clps711xuart_stop_tx
,
422 .start_tx
= clps711xuart_start_tx
,
423 .stop_rx
= clps711xuart_stop_rx
,
424 .enable_ms
= clps711xuart_enable_ms
,
425 .break_ctl
= clps711xuart_break_ctl
,
426 .startup
= clps711xuart_startup
,
427 .shutdown
= clps711xuart_shutdown
,
428 .set_termios
= clps711xuart_set_termios
,
429 .type
= clps711xuart_type
,
430 .config_port
= clps711xuart_config_port
,
431 .release_port
= clps711xuart_release_port
,
432 .request_port
= clps711xuart_request_port
,
435 static struct uart_port clps711x_ports
[UART_NR
] = {
438 .irq
= IRQ_UTXINT1
, /* IRQ_URXINT1, IRQ_UMSINT */
441 .ops
= &clps711x_pops
,
443 .flags
= ASYNC_BOOT_AUTOCONF
,
447 .irq
= IRQ_UTXINT2
, /* IRQ_URXINT2 */
450 .ops
= &clps711x_pops
,
452 .flags
= ASYNC_BOOT_AUTOCONF
,
456 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
458 * Print a string to the serial port trying not to disturb
459 * any possible real use of the port...
461 * The console_lock must be held when we get here.
463 * Note that this is called with interrupts already disabled
466 clps711xuart_console_write(struct console
*co
, const char *s
,
469 struct uart_port
*port
= clps711x_ports
+ co
->index
;
470 unsigned int status
, syscon
;
474 * Ensure that the port is enabled.
476 syscon
= clps_readl(SYSCON(port
));
477 clps_writel(syscon
| SYSCON_UARTEN
, SYSCON(port
));
480 * Now, do each character
482 for (i
= 0; i
< count
; i
++) {
484 status
= clps_readl(SYSFLG(port
));
485 } while (status
& SYSFLG_UTXFF
);
486 clps_writel(s
[i
], UARTDR(port
));
489 status
= clps_readl(SYSFLG(port
));
490 } while (status
& SYSFLG_UTXFF
);
491 clps_writel('\r', UARTDR(port
));
496 * Finally, wait for transmitter to become empty
497 * and restore the uart state.
500 status
= clps_readl(SYSFLG(port
));
501 } while (status
& SYSFLG_UBUSY
);
503 clps_writel(syscon
, SYSCON(port
));
507 clps711xuart_console_get_options(struct uart_port
*port
, int *baud
,
508 int *parity
, int *bits
)
510 if (clps_readl(SYSCON(port
)) & SYSCON_UARTEN
) {
511 unsigned int ubrlcr
, quot
;
513 ubrlcr
= clps_readl(UBRLCR(port
));
516 if (ubrlcr
& UBRLCR_PRTEN
) {
517 if (ubrlcr
& UBRLCR_EVENPRT
)
523 if ((ubrlcr
& UBRLCR_WRDLEN_MASK
) == UBRLCR_WRDLEN7
)
528 quot
= ubrlcr
& UBRLCR_BAUD_MASK
;
529 *baud
= port
->uartclk
/ (16 * (quot
+ 1));
533 static int __init
clps711xuart_console_setup(struct console
*co
, char *options
)
535 struct uart_port
*port
;
542 * Check whether an invalid uart number has been specified, and
543 * if so, search for the first available port that does have
546 port
= uart_get_console(clps711x_ports
, UART_NR
, co
);
549 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
551 clps711xuart_console_get_options(port
, &baud
, &parity
, &bits
);
553 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
556 extern struct uart_driver clps711x_reg
;
557 static struct console clps711x_console
= {
559 .write
= clps711xuart_console_write
,
560 .device
= uart_console_device
,
561 .setup
= clps711xuart_console_setup
,
562 .flags
= CON_PRINTBUFFER
,
564 .data
= &clps711x_reg
,
567 static int __init
clps711xuart_console_init(void)
569 register_console(&clps711x_console
);
572 console_initcall(clps711xuart_console_init
);
574 #define CLPS711X_CONSOLE &clps711x_console
576 #define CLPS711X_CONSOLE NULL
579 static struct uart_driver clps711x_reg
= {
580 .driver_name
= "ttyCL",
582 .major
= SERIAL_CLPS711X_MAJOR
,
583 .minor
= SERIAL_CLPS711X_MINOR
,
586 .cons
= CLPS711X_CONSOLE
,
589 static int __init
clps711xuart_init(void)
593 printk(KERN_INFO
"Serial: CLPS711x driver $Revision: 1.42 $\n");
595 ret
= uart_register_driver(&clps711x_reg
);
599 for (i
= 0; i
< UART_NR
; i
++)
600 uart_add_one_port(&clps711x_reg
, &clps711x_ports
[i
]);
605 static void __exit
clps711xuart_exit(void)
609 for (i
= 0; i
< UART_NR
; i
++)
610 uart_remove_one_port(&clps711x_reg
, &clps711x_ports
[i
]);
612 uart_unregister_driver(&clps711x_reg
);
615 module_init(clps711xuart_init
);
616 module_exit(clps711xuart_exit
);
618 MODULE_AUTHOR("Deep Blue Solutions Ltd");
619 MODULE_DESCRIPTION("CLPS-711x generic serial driver $Revision: 1.42 $");
620 MODULE_LICENSE("GPL");