2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port. Currently, we don't
20 * support this very well, and it may well be dropped from this driver
21 * in future. As such, mapbase should be NULL.
23 * membase is an 'ioremapped' cookie. This is compatible with the old
24 * serial.c driver, and is currently the preferred form.
26 #include <linux/config.h>
27 #include <linux/module.h>
28 #include <linux/tty.h>
29 #include <linux/ioport.h>
30 #include <linux/init.h>
31 #include <linux/console.h>
32 #include <linux/sysrq.h>
33 #include <linux/serial_reg.h>
34 #include <linux/serial.h>
35 #include <linux/serialP.h>
36 #include <linux/delay.h>
41 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
45 #include <linux/serial_core.h>
50 * share_irqs - whether we pass SA_SHIRQ to request_irq(). This option
51 * is unsafe when used on edge-triggered interrupts.
53 unsigned int share_irqs
= SERIAL8250_SHARE_IRQS
;
59 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
61 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
65 #define DEBUG_INTR(fmt...) printk(fmt)
67 #define DEBUG_INTR(fmt...) do { } while (0)
70 #define PASS_LIMIT 256
73 * We default to IRQ0 for the "no irq" hack. Some
74 * machine types want others as well - they're free
75 * to redefine this in their header file.
77 #define is_real_interrupt(irq) ((irq) != 0)
80 * This converts from our new CONFIG_ symbols to the symbols
81 * that asm/serial.h expects. You _NEED_ to comment out the
82 * linux/config.h include contained inside asm/serial.h for
85 #undef CONFIG_SERIAL_MANY_PORTS
86 #undef CONFIG_SERIAL_DETECT_IRQ
87 #undef CONFIG_SERIAL_MULTIPORT
90 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
91 #define CONFIG_SERIAL_DETECT_IRQ 1
93 #ifdef CONFIG_SERIAL_8250_MULTIPORT
94 #define CONFIG_SERIAL_MULTIPORT 1
96 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
97 #define CONFIG_SERIAL_MANY_PORTS 1
101 * HUB6 is always on. This will be removed once the header
102 * files have been cleaned.
104 #define CONFIG_HUB6 1
106 #include <asm/serial.h>
108 static struct old_serial_port old_serial_port
[] = {
109 SERIAL_PORT_DFNS
/* defined in asm/serial.h */
112 #define UART_NR ARRAY_SIZE(old_serial_port)
114 #if defined(CONFIG_SERIAL_8250_RSA) && defined(MODULE)
116 #define PORT_RSA_MAX 4
117 static int probe_rsa
[PORT_RSA_MAX
];
118 static int force_rsa
[PORT_RSA_MAX
];
119 #endif /* CONFIG_SERIAL_8250_RSA */
121 struct uart_8250_port
{
122 struct uart_port port
;
123 struct timer_list timer
; /* "no irq" timer */
124 struct list_head list
; /* ports on this IRQ */
129 unsigned char mcr_mask
; /* mask of user bits */
130 unsigned char mcr_force
; /* mask of forced bits */
131 unsigned int lsr_break_flag
;
134 * We provide a per-port pm hook.
136 void (*pm
)(struct uart_port
*port
,
137 unsigned int state
, unsigned int old
);
142 struct list_head
*head
;
145 static struct irq_info irq_lists
[NR_IRQS
];
148 * Here we define the default xmit fifo size used for each type of UART.
150 static const struct serial_uart_config uart_config
[PORT_MAX_8250
+1] = {
155 { "16550A", 16, UART_CLEAR_FIFO
| UART_USE_FIFO
},
157 { "ST16650", 1, UART_CLEAR_FIFO
| UART_STARTECH
},
158 { "ST16650V2", 32, UART_CLEAR_FIFO
| UART_USE_FIFO
| UART_STARTECH
},
159 { "TI16750", 64, UART_CLEAR_FIFO
| UART_USE_FIFO
},
160 { "Startech", 1, 0 },
161 { "16C950/954", 128, UART_CLEAR_FIFO
| UART_USE_FIFO
},
162 { "ST16654", 64, UART_CLEAR_FIFO
| UART_USE_FIFO
| UART_STARTECH
},
163 { "XR16850", 128, UART_CLEAR_FIFO
| UART_USE_FIFO
| UART_STARTECH
},
164 { "RSA", 2048, UART_CLEAR_FIFO
| UART_USE_FIFO
},
165 { "NS16550A", 16, UART_CLEAR_FIFO
| UART_USE_FIFO
| UART_NATSEMI
}
168 #if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_SEAD)
170 static _INLINE_
unsigned int serial_in(struct uart_8250_port
*info
, int offset
)
172 unsigned long reg
= mips_io_port_base
+ info
->port
.iobase
+ offset
* 8;
174 return 0xff & *(volatile unsigned int *) reg
;
178 serial_out(struct uart_8250_port
*info
, int offset
, int value
)
180 unsigned long reg
= mips_io_port_base
+ info
->port
.iobase
+ offset
* 8;
182 *(volatile unsigned int *) reg
= value
;
187 static _INLINE_
unsigned int serial_in(struct uart_8250_port
*up
, int offset
)
189 offset
<<= up
->port
.regshift
;
191 switch (up
->port
.iotype
) {
193 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
194 return inb(up
->port
.iobase
+ 1);
197 return readb(up
->port
.membase
+ offset
);
200 return inb(up
->port
.iobase
+ offset
);
205 serial_out(struct uart_8250_port
*up
, int offset
, int value
)
207 offset
<<= up
->port
.regshift
;
209 switch (up
->port
.iotype
) {
211 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
212 outb(value
, up
->port
.iobase
+ 1);
216 writeb(value
, up
->port
.membase
+ offset
);
220 outb(value
, up
->port
.iobase
+ offset
);
226 * We used to support using pause I/O for certain machines. We
227 * haven't supported this for a while, but just in case it's badly
228 * needed for certain old 386 machines, I've left these #define's
231 #define serial_inp(up, offset) serial_in(up, offset)
232 #define serial_outp(up, offset, value) serial_out(up, offset, value)
238 static void serial_icr_write(struct uart_8250_port
*up
, int offset
, int value
)
240 serial_out(up
, UART_SCR
, offset
);
241 serial_out(up
, UART_ICR
, value
);
244 static unsigned int serial_icr_read(struct uart_8250_port
*up
, int offset
)
248 serial_icr_write(up
, UART_ACR
, up
->acr
| UART_ACR_ICRRD
);
249 serial_out(up
, UART_SCR
, offset
);
250 value
= serial_in(up
, UART_ICR
);
251 serial_icr_write(up
, UART_ACR
, up
->acr
);
256 #ifdef CONFIG_SERIAL_8250_RSA
258 * Attempts to turn on the RSA FIFO. Returns zero on failure.
259 * We set the port uart clock rate if we succeed.
261 static int __enable_rsa(struct uart_8250_port
*up
)
266 mode
= serial_inp(up
, UART_RSA_MSR
);
267 result
= mode
& UART_RSA_MSR_FIFO
;
270 serial_outp(up
, UART_RSA_MSR
, mode
| UART_RSA_MSR_FIFO
);
271 mode
= serial_inp(up
, UART_RSA_MSR
);
272 result
= mode
& UART_RSA_MSR_FIFO
;
276 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE
* 16;
281 static void enable_rsa(struct uart_8250_port
*up
)
283 if (up
->port
.type
== PORT_RSA
) {
284 if (up
->port
.uartclk
!= SERIAL_RSA_BAUD_BASE
* 16) {
285 spin_lock_irq(&up
->port
.lock
);
287 spin_unlock_irq(&up
->port
.lock
);
289 if (up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16)
290 serial_outp(up
, UART_RSA_FRR
, 0);
295 * Attempts to turn off the RSA FIFO. Returns zero on failure.
296 * It is unknown why interrupts were disabled in here. However,
297 * the caller is expected to preserve this behaviour by grabbing
298 * the spinlock before calling this function.
300 static void disable_rsa(struct uart_8250_port
*up
)
305 if (up
->port
.type
== PORT_RSA
&&
306 up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16) {
307 spin_lock_irq(&up
->port
.lock
);
309 mode
= serial_inp(up
, UART_RSA_MSR
);
310 result
= !(mode
& UART_RSA_MSR_FIFO
);
313 serial_outp(up
, UART_RSA_MSR
, mode
& ~UART_RSA_MSR_FIFO
);
314 mode
= serial_inp(up
, UART_RSA_MSR
);
315 result
= !(mode
& UART_RSA_MSR_FIFO
);
319 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE_LO
* 16;
320 spin_unlock_irq(&up
->port
.lock
);
323 #endif /* CONFIG_SERIAL_8250_RSA */
326 * This is a quickie test to see how big the FIFO is.
327 * It doesn't work at all the time, more's the pity.
329 static int size_fifo(struct uart_8250_port
*up
)
331 unsigned char old_fcr
, old_mcr
, old_dll
, old_dlm
;
334 old_fcr
= serial_inp(up
, UART_FCR
);
335 old_mcr
= serial_inp(up
, UART_MCR
);
336 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
337 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
338 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
);
339 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
340 old_dll
= serial_inp(up
, UART_DLL
);
341 old_dlm
= serial_inp(up
, UART_DLM
);
342 serial_outp(up
, UART_DLL
, 0x01);
343 serial_outp(up
, UART_DLM
, 0x00);
344 serial_outp(up
, UART_LCR
, 0x03);
345 for (count
= 0; count
< 256; count
++)
346 serial_outp(up
, UART_TX
, count
);
347 mdelay(20);/* FIXME - schedule_timeout */
348 for (count
= 0; (serial_inp(up
, UART_LSR
) & UART_LSR_DR
) &&
349 (count
< 256); count
++)
350 serial_inp(up
, UART_RX
);
351 serial_outp(up
, UART_FCR
, old_fcr
);
352 serial_outp(up
, UART_MCR
, old_mcr
);
353 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
354 serial_outp(up
, UART_DLL
, old_dll
);
355 serial_outp(up
, UART_DLM
, old_dlm
);
361 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
362 * When this function is called we know it is at least a StarTech
363 * 16650 V2, but it might be one of several StarTech UARTs, or one of
364 * its clones. (We treat the broken original StarTech 16650 V1 as a
365 * 16550, and why not? Startech doesn't seem to even acknowledge its
368 * What evil have men's minds wrought...
370 static void autoconfig_has_efr(struct uart_8250_port
*up
)
372 unsigned char id1
, id2
, id3
, rev
, saved_dll
, saved_dlm
;
375 * First we check to see if it's an Oxford Semiconductor UART.
377 * If we have to do this here because some non-National
378 * Semiconductor clone chips lock up if you try writing to the
379 * LSR register (which serial_icr_read does)
383 * Check for Oxford Semiconductor 16C950.
385 * EFR [4] must be set else this test fails.
387 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
388 * claims that it's needed for 952 dual UART's (which are not
389 * recommended for new designs).
392 serial_out(up
, UART_LCR
, 0xBF);
393 serial_out(up
, UART_EFR
, UART_EFR_ECB
);
394 serial_out(up
, UART_LCR
, 0x00);
395 id1
= serial_icr_read(up
, UART_ID1
);
396 id2
= serial_icr_read(up
, UART_ID2
);
397 id3
= serial_icr_read(up
, UART_ID3
);
398 rev
= serial_icr_read(up
, UART_REV
);
400 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1
, id2
, id3
, rev
);
402 if (id1
== 0x16 && id2
== 0xC9 &&
403 (id3
== 0x50 || id3
== 0x52 || id3
== 0x54)) {
404 up
->port
.type
= PORT_16C950
;
405 up
->rev
= rev
| (id3
<< 8);
410 * We check for a XR16C850 by setting DLL and DLM to 0, and then
411 * reading back DLL and DLM. The chip type depends on the DLM
413 * 0x10 - XR16C850 and the DLL contains the chip revision.
417 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
418 saved_dll
= serial_inp(up
, UART_DLL
);
419 saved_dlm
= serial_inp(up
, UART_DLM
);
420 serial_outp(up
, UART_DLL
, 0);
421 serial_outp(up
, UART_DLM
, 0);
422 id2
= serial_inp(up
, UART_DLL
);
423 id1
= serial_inp(up
, UART_DLM
);
424 serial_outp(up
, UART_DLL
, saved_dll
);
425 serial_outp(up
, UART_DLM
, saved_dlm
);
427 DEBUG_AUTOCONF("850id=%02x:%02x ", id1
, id2
);
429 if (id1
== 0x10 || id1
== 0x12 || id1
== 0x14) {
432 up
->port
.type
= PORT_16850
;
437 * It wasn't an XR16C850.
439 * We distinguish between the '654 and the '650 by counting
440 * how many bytes are in the FIFO. I'm using this for now,
441 * since that's the technique that was sent to me in the
442 * serial driver update, but I'm not convinced this works.
443 * I've had problems doing this in the past. -TYT
445 if (size_fifo(up
) == 64)
446 up
->port
.type
= PORT_16654
;
448 up
->port
.type
= PORT_16650V2
;
452 * We detected a chip without a FIFO. Only two fall into
453 * this category - the original 8250 and the 16450. The
454 * 16450 has a scratch register (accessible with LCR=0)
456 static void autoconfig_8250(struct uart_8250_port
*up
)
458 unsigned char scratch
, status1
, status2
;
460 up
->port
.type
= PORT_8250
;
462 scratch
= serial_in(up
, UART_SCR
);
463 serial_outp(up
, UART_SCR
, 0xa5);
464 status1
= serial_in(up
, UART_SCR
);
465 serial_outp(up
, UART_SCR
, 0x5a);
466 status2
= serial_in(up
, UART_SCR
);
467 serial_outp(up
, UART_SCR
, scratch
);
469 if (status1
== 0xa5 && status2
== 0x5a)
470 up
->port
.type
= PORT_16450
;
474 * We know that the chip has FIFOs. Does it have an EFR? The
475 * EFR is located in the same register position as the IIR and
476 * we know the top two bits of the IIR are currently set. The
477 * EFR should contain zero. Try to read the EFR.
479 static void autoconfig_16550a(struct uart_8250_port
*up
)
481 unsigned char status1
, status2
;
483 up
->port
.type
= PORT_16550A
;
486 * Check for presence of the EFR when DLAB is set.
487 * Only ST16C650V1 UARTs pass this test.
489 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
490 if (serial_in(up
, UART_EFR
) == 0) {
491 DEBUG_AUTOCONF("EFRv1 ");
492 up
->port
.type
= PORT_16650
;
497 * Maybe it requires 0xbf to be written to the LCR.
498 * (other ST16C650V2 UARTs, TI16C752A, etc)
500 serial_outp(up
, UART_LCR
, 0xBF);
501 if (serial_in(up
, UART_EFR
) == 0) {
502 DEBUG_AUTOCONF("EFRv2 ");
503 autoconfig_has_efr(up
);
508 * Check for a National Semiconductor SuperIO chip.
509 * Attempt to switch to bank 2, read the value of the LOOP bit
510 * from EXCR1. Switch back to bank 0, change it in MCR. Then
511 * switch back to bank 2, read it from EXCR1 again and check
512 * it's changed. If so, set baud_base in EXCR2 to 921600.
514 serial_outp(up
, UART_LCR
, 0);
515 status1
= serial_in(up
, UART_MCR
);
516 serial_outp(up
, UART_LCR
, 0xE0);
517 status2
= serial_in(up
, 0x02); /* EXCR1 */
519 if (!((status2
^ status1
) & UART_MCR_LOOP
)) {
520 serial_outp(up
, UART_LCR
, 0);
521 serial_outp(up
, UART_MCR
, status1
^ UART_MCR_LOOP
);
522 serial_outp(up
, UART_LCR
, 0xE0);
523 status2
= serial_in(up
, 0x02); /* EXCR1 */
524 serial_outp(up
, UART_LCR
, 0);
525 serial_outp(up
, UART_MCR
, status1
);
527 if ((status2
^ status1
) & UART_MCR_LOOP
) {
528 serial_outp(up
, UART_LCR
, 0xE0);
529 status1
= serial_in(up
, 0x04); /* EXCR1 */
530 status1
&= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
531 status1
|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
532 serial_outp(up
, 0x04, status1
);
533 serial_outp(up
, UART_LCR
, 0);
535 up
->port
.type
= PORT_NS16550A
;
536 up
->port
.uartclk
= 921600*16;
542 * No EFR. Try to detect a TI16750, which only sets bit 5 of
543 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
544 * Try setting it with and without DLAB set. Cheap clones
545 * set bit 5 without DLAB set.
547 serial_outp(up
, UART_LCR
, 0);
548 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
549 status1
= serial_in(up
, UART_IIR
) >> 5;
550 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
551 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
552 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
553 status2
= serial_in(up
, UART_IIR
) >> 5;
554 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
556 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1
, status2
);
558 if (status1
== 6 && status2
== 7) {
559 up
->port
.type
= PORT_16750
;
565 * This routine is called by rs_init() to initialize a specific serial
566 * port. It determines what type of UART chip this serial port is
567 * using: 8250, 16450, 16550, 16550A. The important question is
568 * whether or not this UART is a 16550A or not, since this will
569 * determine whether or not we can use its FIFO features or not.
571 static void autoconfig(struct uart_8250_port
*up
, unsigned int probeflags
)
573 unsigned char status1
, scratch
, scratch2
, scratch3
;
574 unsigned char save_lcr
, save_mcr
;
577 if (!up
->port
.iobase
&& !up
->port
.mapbase
&& !up
->port
.membase
)
580 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%08lx): ",
581 up
->port
.line
, up
->port
.iobase
, up
->port
.membase
);
584 * We really do need global IRQs disabled here - we're going to
585 * be frobbing the chips IRQ enable register to see if it exists.
587 spin_lock_irqsave(&up
->port
.lock
, flags
);
588 // save_flags(flags); cli();
590 if (!(up
->port
.flags
& UPF_BUGGY_UART
)) {
592 * Do a simple existence test first; if we fail this,
593 * there's no point trying anything else.
595 * 0x80 is used as a nonsense port to prevent against
596 * false positives due to ISA bus float. The
597 * assumption is that 0x80 is a non-existent port;
598 * which should be safe since include/asm/io.h also
599 * makes this assumption.
601 * Note: this is safe as long as MCR bit 4 is clear
602 * and the device is in "PC" mode.
604 scratch
= serial_inp(up
, UART_IER
);
605 serial_outp(up
, UART_IER
, 0);
609 scratch2
= serial_inp(up
, UART_IER
);
610 serial_outp(up
, UART_IER
, 0x0F);
614 scratch3
= serial_inp(up
, UART_IER
);
615 serial_outp(up
, UART_IER
, scratch
);
616 if (scratch2
!= 0 || scratch3
!= 0x0F) {
618 * We failed; there's nothing here
620 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
626 save_mcr
= serial_in(up
, UART_MCR
);
627 save_lcr
= serial_in(up
, UART_LCR
);
630 * Check to see if a UART is really there. Certain broken
631 * internal modems based on the Rockwell chipset fail this
632 * test, because they apparently don't implement the loopback
633 * test mode. So this test is skipped on the COM 1 through
634 * COM 4 ports. This *should* be safe, since no board
635 * manufacturer would be stupid enough to design a board
636 * that conflicts with COM 1-4 --- we hope!
638 if (!(up
->port
.flags
& UPF_SKIP_TEST
)) {
639 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
| 0x0A);
640 status1
= serial_inp(up
, UART_MSR
) & 0xF0;
641 serial_outp(up
, UART_MCR
, save_mcr
);
642 if (status1
!= 0x90) {
643 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
650 * We're pretty sure there's a port here. Lets find out what
651 * type of port it is. The IIR top two bits allows us to find
652 * out if its 8250 or 16450, 16550, 16550A or later. This
653 * determines what we test for next.
655 * We also initialise the EFR (if any) to zero for later. The
656 * EFR occupies the same register location as the FCR and IIR.
658 serial_outp(up
, UART_LCR
, 0xBF);
659 serial_outp(up
, UART_EFR
, 0);
660 serial_outp(up
, UART_LCR
, 0);
662 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
663 scratch
= serial_in(up
, UART_IIR
) >> 6;
665 DEBUG_AUTOCONF("iir=%d ", scratch
);
672 up
->port
.type
= PORT_UNKNOWN
;
675 up
->port
.type
= PORT_16550
;
678 autoconfig_16550a(up
);
682 #if defined(CONFIG_SERIAL_8250_RSA) && defined(MODULE)
684 * Only probe for RSA ports if we got the region.
686 if (up
->port
.type
== PORT_16550A
&& probeflags
& PROBE_RSA
) {
689 for (i
= 0 ; i
< PORT_RSA_MAX
; ++i
) {
690 if (!probe_rsa
[i
] && !force_rsa
[i
])
692 if (((probe_rsa
[i
] != up
->port
.iobase
) ||
693 check_region(up
->port
.iobase
+ UART_RSA_BASE
, 16)) &&
694 (force_rsa
[i
] != up
->port
.iobase
))
696 if (__enable_rsa(up
)) {
697 up
->port
.type
= PORT_RSA
;
703 serial_outp(up
, UART_LCR
, save_lcr
);
705 up
->port
.fifosize
= uart_config
[up
->port
.type
].dfl_xmit_fifo_size
;
707 if (up
->port
.type
== PORT_UNKNOWN
)
713 #ifdef CONFIG_SERIAL_8250_RSA
714 if (up
->port
.type
== PORT_RSA
)
715 serial_outp(up
, UART_RSA_FRR
, 0);
717 serial_outp(up
, UART_MCR
, save_mcr
);
718 serial_outp(up
, UART_FCR
, (UART_FCR_ENABLE_FIFO
|
719 UART_FCR_CLEAR_RCVR
|
720 UART_FCR_CLEAR_XMIT
));
721 serial_outp(up
, UART_FCR
, 0);
722 (void)serial_in(up
, UART_RX
);
723 serial_outp(up
, UART_IER
, 0);
726 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
727 // restore_flags(flags);
728 #ifdef CONFIG_SERIAL_8250_RSA
729 if (up
->port
.iobase
&& up
->port
.type
== PORT_RSA
) {
730 release_region(up
->port
.iobase
, 8);
731 request_region(up
->port
.iobase
+ UART_RSA_BASE
, 16,
735 DEBUG_AUTOCONF("type=%s\n", uart_config
[up
->port
.type
].name
);
738 static void autoconfig_irq(struct uart_8250_port
*up
)
740 unsigned char save_mcr
, save_ier
;
741 unsigned char save_ICP
= 0;
742 unsigned int ICP
= 0;
746 if (up
->port
.flags
& UPF_FOURPORT
) {
747 ICP
= (up
->port
.iobase
& 0xfe0) | 0x1f;
748 save_ICP
= inb_p(ICP
);
753 /* forget possible initially masked and pending IRQ */
754 probe_irq_off(probe_irq_on());
755 save_mcr
= serial_inp(up
, UART_MCR
);
756 save_ier
= serial_inp(up
, UART_IER
);
757 serial_outp(up
, UART_MCR
, UART_MCR_OUT1
| UART_MCR_OUT2
);
759 irqs
= probe_irq_on();
760 serial_outp(up
, UART_MCR
, 0);
762 if (up
->port
.flags
& UPF_FOURPORT
) {
763 serial_outp(up
, UART_MCR
,
764 UART_MCR_DTR
| UART_MCR_RTS
);
766 serial_outp(up
, UART_MCR
,
767 UART_MCR_DTR
| UART_MCR_RTS
| UART_MCR_OUT2
);
769 serial_outp(up
, UART_IER
, 0x0f); /* enable all intrs */
770 (void)serial_inp(up
, UART_LSR
);
771 (void)serial_inp(up
, UART_RX
);
772 (void)serial_inp(up
, UART_IIR
);
773 (void)serial_inp(up
, UART_MSR
);
774 serial_outp(up
, UART_TX
, 0xFF);
776 irq
= probe_irq_off(irqs
);
778 serial_outp(up
, UART_MCR
, save_mcr
);
779 serial_outp(up
, UART_IER
, save_ier
);
781 if (up
->port
.flags
& UPF_FOURPORT
)
782 outb_p(save_ICP
, ICP
);
784 up
->port
.irq
= (irq
> 0) ? irq
: 0;
787 static void serial8250_stop_tx(struct uart_port
*port
, unsigned int tty_stop
)
789 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
791 if (up
->ier
& UART_IER_THRI
) {
792 up
->ier
&= ~UART_IER_THRI
;
793 serial_out(up
, UART_IER
, up
->ier
);
795 if (up
->port
.type
== PORT_16C950
&& tty_stop
) {
796 up
->acr
|= UART_ACR_TXDIS
;
797 serial_icr_write(up
, UART_ACR
, up
->acr
);
801 static void serial8250_start_tx(struct uart_port
*port
, unsigned int tty_start
)
803 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
805 if (!(up
->ier
& UART_IER_THRI
)) {
806 up
->ier
|= UART_IER_THRI
;
807 serial_out(up
, UART_IER
, up
->ier
);
810 * We only do this from uart_start
812 if (tty_start
&& up
->port
.type
== PORT_16C950
) {
813 up
->acr
&= ~UART_ACR_TXDIS
;
814 serial_icr_write(up
, UART_ACR
, up
->acr
);
818 static void serial8250_stop_rx(struct uart_port
*port
)
820 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
822 up
->ier
&= ~UART_IER_RLSI
;
823 up
->port
.read_status_mask
&= ~UART_LSR_DR
;
824 serial_out(up
, UART_IER
, up
->ier
);
827 static void serial8250_enable_ms(struct uart_port
*port
)
829 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
831 up
->ier
|= UART_IER_MSI
;
832 serial_out(up
, UART_IER
, up
->ier
);
836 receive_chars(struct uart_8250_port
*up
, int *status
, struct pt_regs
*regs
)
838 struct tty_struct
*tty
= up
->port
.info
->tty
;
843 if (unlikely(tty
->flip
.count
>= TTY_FLIPBUF_SIZE
)) {
844 tty
->flip
.work
.func((void *)tty
);
845 if (tty
->flip
.count
>= TTY_FLIPBUF_SIZE
)
846 return; // if TTY_DONT_FLIP is set
848 ch
= serial_inp(up
, UART_RX
);
849 *tty
->flip
.char_buf_ptr
= ch
;
850 *tty
->flip
.flag_buf_ptr
= TTY_NORMAL
;
851 up
->port
.icount
.rx
++;
853 if (unlikely(*status
& (UART_LSR_BI
| UART_LSR_PE
|
854 UART_LSR_FE
| UART_LSR_OE
))) {
856 * For statistics only
858 if (*status
& UART_LSR_BI
) {
859 *status
&= ~(UART_LSR_FE
| UART_LSR_PE
);
860 up
->port
.icount
.brk
++;
862 * We do the SysRQ and SAK checking
863 * here because otherwise the break
864 * may get masked by ignore_status_mask
865 * or read_status_mask.
867 if (uart_handle_break(&up
->port
))
869 } else if (*status
& UART_LSR_PE
)
870 up
->port
.icount
.parity
++;
871 else if (*status
& UART_LSR_FE
)
872 up
->port
.icount
.frame
++;
873 if (*status
& UART_LSR_OE
)
874 up
->port
.icount
.overrun
++;
877 * Mask off conditions which should be ingored.
879 *status
&= up
->port
.read_status_mask
;
881 #ifdef CONFIG_SERIAL_8250_CONSOLE
882 if (up
->port
.line
== up
->port
.cons
->index
) {
883 /* Recover the break flag from console xmit */
884 *status
|= up
->lsr_break_flag
;
885 up
->lsr_break_flag
= 0;
888 if (*status
& UART_LSR_BI
) {
889 DEBUG_INTR("handling break....");
890 *tty
->flip
.flag_buf_ptr
= TTY_BREAK
;
891 } else if (*status
& UART_LSR_PE
)
892 *tty
->flip
.flag_buf_ptr
= TTY_PARITY
;
893 else if (*status
& UART_LSR_FE
)
894 *tty
->flip
.flag_buf_ptr
= TTY_FRAME
;
896 if (uart_handle_sysrq_char(&up
->port
, ch
, regs
))
898 if ((*status
& up
->port
.ignore_status_mask
) == 0) {
899 tty
->flip
.flag_buf_ptr
++;
900 tty
->flip
.char_buf_ptr
++;
903 if ((*status
& UART_LSR_OE
) &&
904 tty
->flip
.count
< TTY_FLIPBUF_SIZE
) {
906 * Overrun is special, since it's reported
907 * immediately, and doesn't affect the current
910 *tty
->flip
.flag_buf_ptr
= TTY_OVERRUN
;
911 tty
->flip
.flag_buf_ptr
++;
912 tty
->flip
.char_buf_ptr
++;
916 *status
= serial_inp(up
, UART_LSR
);
917 } while ((*status
& UART_LSR_DR
) && (max_count
-- > 0));
918 tty_flip_buffer_push(tty
);
921 static _INLINE_
void transmit_chars(struct uart_8250_port
*up
)
923 struct circ_buf
*xmit
= &up
->port
.info
->xmit
;
926 if (up
->port
.x_char
) {
927 serial_outp(up
, UART_TX
, up
->port
.x_char
);
928 up
->port
.icount
.tx
++;
932 if (uart_circ_empty(xmit
) || uart_tx_stopped(&up
->port
)) {
933 serial8250_stop_tx(&up
->port
, 0);
937 count
= up
->port
.fifosize
;
939 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
940 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
941 up
->port
.icount
.tx
++;
942 if (uart_circ_empty(xmit
))
944 } while (--count
> 0);
946 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
947 uart_write_wakeup(&up
->port
);
949 DEBUG_INTR("THRE...");
951 if (uart_circ_empty(xmit
))
952 serial8250_stop_tx(&up
->port
, 0);
955 static _INLINE_
void check_modem_status(struct uart_8250_port
*up
)
959 status
= serial_in(up
, UART_MSR
);
961 if ((status
& UART_MSR_ANY_DELTA
) == 0)
964 if (status
& UART_MSR_TERI
)
965 up
->port
.icount
.rng
++;
966 if (status
& UART_MSR_DDSR
)
967 up
->port
.icount
.dsr
++;
968 if (status
& UART_MSR_DDCD
)
969 uart_handle_dcd_change(&up
->port
, status
& UART_MSR_DCD
);
970 if (status
& UART_MSR_DCTS
)
971 uart_handle_cts_change(&up
->port
, status
& UART_MSR_CTS
);
973 wake_up_interruptible(&up
->port
.info
->delta_msr_wait
);
977 * This handles the interrupt from one port.
980 serial8250_handle_port(struct uart_8250_port
*up
, struct pt_regs
*regs
)
982 unsigned int status
= serial_inp(up
, UART_LSR
);
984 DEBUG_INTR("status = %x...", status
);
986 if (status
& UART_LSR_DR
)
987 receive_chars(up
, &status
, regs
);
988 check_modem_status(up
);
989 if (status
& UART_LSR_THRE
)
994 * This is the serial driver's interrupt routine.
996 * Arjan thinks the old way was overly complex, so it got simplified.
997 * Alan disagrees, saying that need the complexity to handle the weird
998 * nature of ISA shared interrupts. (This is a special exception.)
1000 * In order to handle ISA shared interrupts properly, we need to check
1001 * that all ports have been serviced, and therefore the ISA interrupt
1002 * line has been de-asserted.
1004 * This means we need to loop through all ports. checking that they
1005 * don't have an interrupt pending.
1007 static irqreturn_t
serial8250_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
1009 struct irq_info
*i
= dev_id
;
1010 struct list_head
*l
, *end
= NULL
;
1011 int pass_counter
= 0;
1013 DEBUG_INTR("serial8250_interrupt(%d)...", irq
);
1015 spin_lock(&i
->lock
);
1019 struct uart_8250_port
*up
;
1022 up
= list_entry(l
, struct uart_8250_port
, list
);
1024 iir
= serial_in(up
, UART_IIR
);
1025 if (!(iir
& UART_IIR_NO_INT
)) {
1026 spin_lock(&up
->port
.lock
);
1027 serial8250_handle_port(up
, regs
);
1028 spin_unlock(&up
->port
.lock
);
1031 } else if (end
== NULL
)
1036 if (l
== i
->head
&& pass_counter
++ > PASS_LIMIT
) {
1037 /* If we hit this, we're dead. */
1038 printk(KERN_ERR
"serial8250: too much work for "
1044 spin_unlock(&i
->lock
);
1046 DEBUG_INTR("end.\n");
1047 /* FIXME! Was it really ours? */
1052 * To support ISA shared interrupts, we need to have one interrupt
1053 * handler that ensures that the IRQ line has been deasserted
1054 * before returning. Failing to do this will result in the IRQ
1055 * line being stuck active, and, since ISA irqs are edge triggered,
1056 * no more IRQs will be seen.
1058 static void serial_do_unlink(struct irq_info
*i
, struct uart_8250_port
*up
)
1060 spin_lock_irq(&i
->lock
);
1062 if (!list_empty(i
->head
)) {
1063 if (i
->head
== &up
->list
)
1064 i
->head
= i
->head
->next
;
1065 list_del(&up
->list
);
1067 BUG_ON(i
->head
!= &up
->list
);
1071 spin_unlock_irq(&i
->lock
);
1074 static int serial_link_irq_chain(struct uart_8250_port
*up
)
1076 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1077 int ret
, irq_flags
= up
->port
.flags
& UPF_SHARE_IRQ
? SA_SHIRQ
: 0;
1079 spin_lock_irq(&i
->lock
);
1082 list_add(&up
->list
, i
->head
);
1083 spin_unlock_irq(&i
->lock
);
1087 INIT_LIST_HEAD(&up
->list
);
1088 i
->head
= &up
->list
;
1089 spin_unlock_irq(&i
->lock
);
1091 ret
= request_irq(up
->port
.irq
, serial8250_interrupt
,
1092 irq_flags
, "serial", i
);
1094 serial_do_unlink(i
, up
);
1100 static void serial_unlink_irq_chain(struct uart_8250_port
*up
)
1102 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1104 BUG_ON(i
->head
== NULL
);
1106 if (list_empty(i
->head
))
1107 free_irq(up
->port
.irq
, i
);
1109 serial_do_unlink(i
, up
);
1113 * This function is used to handle ports that do not have an
1114 * interrupt. This doesn't work very well for 16450's, but gives
1115 * barely passable results for a 16550A. (Although at the expense
1116 * of much CPU overhead).
1118 static void serial8250_timeout(unsigned long data
)
1120 struct uart_8250_port
*up
= (struct uart_8250_port
*)data
;
1121 unsigned int timeout
;
1124 iir
= serial_in(up
, UART_IIR
);
1125 if (!(iir
& UART_IIR_NO_INT
)) {
1126 spin_lock(&up
->port
.lock
);
1127 serial8250_handle_port(up
, NULL
);
1128 spin_unlock(&up
->port
.lock
);
1131 timeout
= up
->port
.timeout
;
1132 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1133 mod_timer(&up
->timer
, jiffies
+ timeout
);
1136 static unsigned int serial8250_tx_empty(struct uart_port
*port
)
1138 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1139 unsigned long flags
;
1142 spin_lock_irqsave(&up
->port
.lock
, flags
);
1143 ret
= serial_in(up
, UART_LSR
) & UART_LSR_TEMT
? TIOCSER_TEMT
: 0;
1144 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1149 static unsigned int serial8250_get_mctrl(struct uart_port
*port
)
1151 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1152 unsigned long flags
;
1153 unsigned char status
;
1156 spin_lock_irqsave(&up
->port
.lock
, flags
);
1157 status
= serial_in(up
, UART_MSR
);
1158 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1161 if (status
& UART_MSR_DCD
)
1163 if (status
& UART_MSR_RI
)
1165 if (status
& UART_MSR_DSR
)
1167 if (status
& UART_MSR_CTS
)
1172 static void serial8250_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
1174 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1175 unsigned char mcr
= 0;
1177 if (mctrl
& TIOCM_RTS
)
1178 mcr
|= UART_MCR_RTS
;
1179 if (mctrl
& TIOCM_DTR
)
1180 mcr
|= UART_MCR_DTR
;
1181 if (mctrl
& TIOCM_OUT1
)
1182 mcr
|= UART_MCR_OUT1
;
1183 if (mctrl
& TIOCM_OUT2
)
1184 mcr
|= UART_MCR_OUT2
;
1185 if (mctrl
& TIOCM_LOOP
)
1186 mcr
|= UART_MCR_LOOP
;
1188 mcr
= (mcr
& up
->mcr_mask
) | up
->mcr_force
;
1190 serial_out(up
, UART_MCR
, mcr
);
1193 static void serial8250_break_ctl(struct uart_port
*port
, int break_state
)
1195 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1196 unsigned long flags
;
1198 spin_lock_irqsave(&up
->port
.lock
, flags
);
1199 if (break_state
== -1)
1200 up
->lcr
|= UART_LCR_SBC
;
1202 up
->lcr
&= ~UART_LCR_SBC
;
1203 serial_out(up
, UART_LCR
, up
->lcr
);
1204 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1207 static int serial8250_startup(struct uart_port
*port
)
1209 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1210 unsigned long flags
;
1213 if (up
->port
.type
== PORT_16C950
) {
1214 /* Wake up and initialize UART */
1216 serial_outp(up
, UART_LCR
, 0xBF);
1217 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1218 serial_outp(up
, UART_IER
, 0);
1219 serial_outp(up
, UART_LCR
, 0);
1220 serial_icr_write(up
, UART_CSR
, 0); /* Reset the UART */
1221 serial_outp(up
, UART_LCR
, 0xBF);
1222 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1223 serial_outp(up
, UART_LCR
, 0);
1226 #ifdef CONFIG_SERIAL_8250_RSA
1228 * If this is an RSA port, see if we can kick it up to the
1229 * higher speed clock.
1235 * Clear the FIFO buffers and disable them.
1236 * (they will be reeanbled in set_termios())
1238 if (uart_config
[up
->port
.type
].flags
& UART_CLEAR_FIFO
) {
1239 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
1240 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
1241 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
1242 serial_outp(up
, UART_FCR
, 0);
1246 * Clear the interrupt registers.
1248 (void) serial_inp(up
, UART_LSR
);
1249 (void) serial_inp(up
, UART_RX
);
1250 (void) serial_inp(up
, UART_IIR
);
1251 (void) serial_inp(up
, UART_MSR
);
1254 * At this point, there's no way the LSR could still be 0xff;
1255 * if it is, then bail out, because there's likely no UART
1258 if (!(up
->port
.flags
& UPF_BUGGY_UART
) &&
1259 (serial_inp(up
, UART_LSR
) == 0xff)) {
1260 printk("ttyS%d: LSR safety check engaged!\n", up
->port
.line
);
1265 * If the "interrupt" for this port doesn't correspond with any
1266 * hardware interrupt, we use a timer-based system. The original
1267 * driver used to do this with IRQ0.
1269 if (!is_real_interrupt(up
->port
.irq
)) {
1270 unsigned int timeout
= up
->port
.timeout
;
1272 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1274 up
->timer
.data
= (unsigned long)up
;
1275 mod_timer(&up
->timer
, jiffies
+ timeout
);
1277 retval
= serial_link_irq_chain(up
);
1283 * Now, initialize the UART
1285 serial_outp(up
, UART_LCR
, UART_LCR_WLEN8
);
1287 spin_lock_irqsave(&up
->port
.lock
, flags
);
1288 if (up
->port
.flags
& UPF_FOURPORT
) {
1289 if (!is_real_interrupt(up
->port
.irq
))
1290 up
->port
.mctrl
|= TIOCM_OUT1
;
1293 * Most PC uarts need OUT2 raised to enable interrupts.
1295 if (is_real_interrupt(up
->port
.irq
))
1296 up
->port
.mctrl
|= TIOCM_OUT2
;
1298 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1299 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1302 * Finally, enable interrupts. Note: Modem status interrupts
1303 * are set via set_termios(), which will be occurring imminently
1304 * anyway, so we don't enable them here.
1306 up
->ier
= UART_IER_RLSI
| UART_IER_RDI
;
1307 serial_outp(up
, UART_IER
, up
->ier
);
1309 if (up
->port
.flags
& UPF_FOURPORT
) {
1312 * Enable interrupts on the AST Fourport board
1314 icp
= (up
->port
.iobase
& 0xfe0) | 0x01f;
1320 * And clear the interrupt registers again for luck.
1322 (void) serial_inp(up
, UART_LSR
);
1323 (void) serial_inp(up
, UART_RX
);
1324 (void) serial_inp(up
, UART_IIR
);
1325 (void) serial_inp(up
, UART_MSR
);
1330 static void serial8250_shutdown(struct uart_port
*port
)
1332 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1333 unsigned long flags
;
1336 * Disable interrupts from this port
1339 serial_outp(up
, UART_IER
, 0);
1341 spin_lock_irqsave(&up
->port
.lock
, flags
);
1342 if (up
->port
.flags
& UPF_FOURPORT
) {
1343 /* reset interrupts on the AST Fourport board */
1344 inb((up
->port
.iobase
& 0xfe0) | 0x1f);
1345 up
->port
.mctrl
|= TIOCM_OUT1
;
1347 up
->port
.mctrl
&= ~TIOCM_OUT2
;
1349 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1350 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1353 * Disable break condition and FIFOs
1355 serial_out(up
, UART_LCR
, serial_inp(up
, UART_LCR
) & ~UART_LCR_SBC
);
1356 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
1357 UART_FCR_CLEAR_RCVR
|
1358 UART_FCR_CLEAR_XMIT
);
1359 serial_outp(up
, UART_FCR
, 0);
1361 #ifdef CONFIG_SERIAL_8250_RSA
1363 * Reset the RSA board back to 115kbps compat mode.
1369 * Read data port to reset things, and then unlink from
1372 (void) serial_in(up
, UART_RX
);
1374 if (!is_real_interrupt(up
->port
.irq
))
1375 del_timer_sync(&up
->timer
);
1377 serial_unlink_irq_chain(up
);
1380 static unsigned int serial8250_get_divisor(struct uart_port
*port
, unsigned int baud
)
1385 * Handle magic divisors for baud rates above baud_base on
1386 * SMSC SuperIO chips.
1388 if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1389 baud
== (port
->uartclk
/4))
1391 else if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1392 baud
== (port
->uartclk
/8))
1395 quot
= uart_get_divisor(port
, baud
);
1401 serial8250_set_termios(struct uart_port
*port
, struct termios
*termios
,
1402 struct termios
*old
)
1404 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1405 unsigned char cval
, fcr
= 0;
1406 unsigned long flags
;
1407 unsigned int baud
, quot
;
1409 switch (termios
->c_cflag
& CSIZE
) {
1425 if (termios
->c_cflag
& CSTOPB
)
1427 if (termios
->c_cflag
& PARENB
)
1428 cval
|= UART_LCR_PARITY
;
1429 if (!(termios
->c_cflag
& PARODD
))
1430 cval
|= UART_LCR_EPAR
;
1432 if (termios
->c_cflag
& CMSPAR
)
1433 cval
|= UART_LCR_SPAR
;
1437 * Ask the core to calculate the divisor for us.
1439 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
1440 quot
= serial8250_get_divisor(port
, baud
);
1443 * Work around a bug in the Oxford Semiconductor 952 rev B
1444 * chip which causes it to seriously miscalculate baud rates
1447 if ((quot
& 0xff) == 0 && up
->port
.type
== PORT_16C950
&&
1451 if (uart_config
[up
->port
.type
].flags
& UART_USE_FIFO
) {
1453 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_TRIGGER_1
;
1454 #ifdef CONFIG_SERIAL_8250_RSA
1455 else if (up
->port
.type
== PORT_RSA
)
1456 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_TRIGGER_14
;
1459 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_TRIGGER_8
;
1461 if (up
->port
.type
== PORT_16750
)
1462 fcr
|= UART_FCR7_64BYTE
;
1465 * Ok, we're now changing the port state. Do it with
1466 * interrupts disabled.
1468 spin_lock_irqsave(&up
->port
.lock
, flags
);
1471 * Update the per-port timeout.
1473 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1475 up
->port
.read_status_mask
= UART_LSR_OE
| UART_LSR_THRE
| UART_LSR_DR
;
1476 if (termios
->c_iflag
& INPCK
)
1477 up
->port
.read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
1478 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
1479 up
->port
.read_status_mask
|= UART_LSR_BI
;
1482 * Characteres to ignore
1484 up
->port
.ignore_status_mask
= 0;
1485 if (termios
->c_iflag
& IGNPAR
)
1486 up
->port
.ignore_status_mask
|= UART_LSR_PE
| UART_LSR_FE
;
1487 if (termios
->c_iflag
& IGNBRK
) {
1488 up
->port
.ignore_status_mask
|= UART_LSR_BI
;
1490 * If we're ignoring parity and break indicators,
1491 * ignore overruns too (for real raw support).
1493 if (termios
->c_iflag
& IGNPAR
)
1494 up
->port
.ignore_status_mask
|= UART_LSR_OE
;
1498 * ignore all characters if CREAD is not set
1500 if ((termios
->c_cflag
& CREAD
) == 0)
1501 up
->port
.ignore_status_mask
|= UART_LSR_DR
;
1504 * CTS flow control flag and modem status interrupts
1506 up
->ier
&= ~UART_IER_MSI
;
1507 if (UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
1508 up
->ier
|= UART_IER_MSI
;
1510 serial_out(up
, UART_IER
, up
->ier
);
1512 if (uart_config
[up
->port
.type
].flags
& UART_STARTECH
) {
1513 serial_outp(up
, UART_LCR
, 0xBF);
1514 serial_outp(up
, UART_EFR
,
1515 termios
->c_cflag
& CRTSCTS
? UART_EFR_CTS
:0);
1518 if (uart_config
[up
->port
.type
].flags
& UART_NATSEMI
) {
1519 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1520 serial_outp(up
, UART_LCR
, 0xe0);
1522 serial_outp(up
, UART_LCR
, cval
| UART_LCR_DLAB
);/* set DLAB */
1524 serial_outp(up
, UART_DLL
, quot
& 0xff); /* LS of divisor */
1525 serial_outp(up
, UART_DLM
, quot
>> 8); /* MS of divisor */
1526 if (up
->port
.type
== PORT_16750
)
1527 serial_outp(up
, UART_FCR
, fcr
); /* set fcr */
1528 serial_outp(up
, UART_LCR
, cval
); /* reset DLAB */
1529 up
->lcr
= cval
; /* Save LCR */
1530 if (up
->port
.type
!= PORT_16750
) {
1531 if (fcr
& UART_FCR_ENABLE_FIFO
) {
1532 /* emulated UARTs (Lucent Venus 167x) need two steps */
1533 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
1535 serial_outp(up
, UART_FCR
, fcr
); /* set fcr */
1537 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1541 serial8250_pm(struct uart_port
*port
, unsigned int state
,
1542 unsigned int oldstate
)
1544 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1547 if (uart_config
[up
->port
.type
].flags
& UART_STARTECH
) {
1548 /* Arrange to enter sleep mode */
1549 serial_outp(up
, UART_LCR
, 0xBF);
1550 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1551 serial_outp(up
, UART_LCR
, 0);
1552 serial_outp(up
, UART_IER
, UART_IERX_SLEEP
);
1553 serial_outp(up
, UART_LCR
, 0xBF);
1554 serial_outp(up
, UART_EFR
, 0);
1555 serial_outp(up
, UART_LCR
, 0);
1557 if (up
->port
.type
== PORT_16750
) {
1558 /* Arrange to enter sleep mode */
1559 serial_outp(up
, UART_IER
, UART_IERX_SLEEP
);
1563 up
->pm(port
, state
, oldstate
);
1566 if (uart_config
[up
->port
.type
].flags
& UART_STARTECH
) {
1568 serial_outp(up
, UART_LCR
, 0xBF);
1569 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1571 * Turn off LCR == 0xBF so we actually set the IER
1572 * register on the XR16C850
1574 serial_outp(up
, UART_LCR
, 0);
1575 serial_outp(up
, UART_IER
, 0);
1577 * Now reset LCR so we can turn off the ECB bit
1579 serial_outp(up
, UART_LCR
, 0xBF);
1580 serial_outp(up
, UART_EFR
, 0);
1582 * For a XR16C850, we need to set the trigger levels
1584 if (up
->port
.type
== PORT_16850
) {
1587 fctr
= serial_inp(up
, UART_FCTR
) &
1588 ~(UART_FCTR_RX
| UART_FCTR_TX
);
1589 serial_outp(up
, UART_FCTR
, fctr
|
1592 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1593 serial_outp(up
, UART_FCTR
, fctr
|
1596 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1598 serial_outp(up
, UART_LCR
, 0);
1601 if (up
->port
.type
== PORT_16750
) {
1603 serial_outp(up
, UART_IER
, 0);
1607 up
->pm(port
, state
, oldstate
);
1612 * Resource handling. This is complicated by the fact that resources
1613 * depend on the port type. Maybe we should be claiming the standard
1614 * 8250 ports, and then trying to get other resources as necessary?
1617 serial8250_request_std_resource(struct uart_8250_port
*up
, struct resource
**res
)
1619 unsigned int size
= 8 << up
->port
.regshift
;
1622 switch (up
->port
.iotype
) {
1624 if (up
->port
.mapbase
) {
1625 *res
= request_mem_region(up
->port
.mapbase
, size
, "serial");
1631 case SERIAL_IO_HUB6
:
1632 case SERIAL_IO_PORT
:
1633 *res
= request_region(up
->port
.iobase
, size
, "serial");
1642 serial8250_request_rsa_resource(struct uart_8250_port
*up
, struct resource
**res
)
1644 unsigned int size
= 8 << up
->port
.regshift
;
1645 unsigned long start
;
1648 switch (up
->port
.iotype
) {
1650 if (up
->port
.mapbase
) {
1651 start
= up
->port
.mapbase
;
1652 start
+= UART_RSA_BASE
<< up
->port
.regshift
;
1653 *res
= request_mem_region(start
, size
, "serial-rsa");
1659 case SERIAL_IO_HUB6
:
1660 case SERIAL_IO_PORT
:
1661 start
= up
->port
.iobase
;
1662 start
+= UART_RSA_BASE
<< up
->port
.regshift
;
1663 *res
= request_region(start
, size
, "serial-rsa");
1672 static void serial8250_release_port(struct uart_port
*port
)
1674 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1675 unsigned long start
, offset
= 0, size
= 0;
1677 if (up
->port
.type
== PORT_RSA
) {
1678 offset
= UART_RSA_BASE
<< up
->port
.regshift
;
1682 size
<<= up
->port
.regshift
;
1684 switch (up
->port
.iotype
) {
1686 if (up
->port
.mapbase
) {
1690 iounmap(up
->port
.membase
);
1691 up
->port
.membase
= NULL
;
1693 start
= up
->port
.mapbase
;
1696 release_mem_region(start
+ offset
, size
);
1697 release_mem_region(start
, 8 << up
->port
.regshift
);
1701 case SERIAL_IO_HUB6
:
1702 case SERIAL_IO_PORT
:
1703 start
= up
->port
.iobase
;
1706 release_region(start
+ offset
, size
);
1707 release_region(start
+ offset
, 8 << up
->port
.regshift
);
1715 static int serial8250_request_port(struct uart_port
*port
)
1717 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1718 struct resource
*res
= NULL
, *res_rsa
= NULL
;
1721 if (up
->port
.flags
& UPF_RESOURCES
) {
1722 if (up
->port
.type
== PORT_RSA
) {
1723 ret
= serial8250_request_rsa_resource(up
, &res_rsa
);
1728 ret
= serial8250_request_std_resource(up
, &res
);
1732 * If we have a mapbase, then request that as well.
1734 if (ret
== 0 && up
->port
.flags
& UPF_IOREMAP
) {
1735 int size
= res
->end
- res
->start
+ 1;
1737 up
->port
.membase
= ioremap(up
->port
.mapbase
, size
);
1738 if (!up
->port
.membase
)
1744 release_resource(res_rsa
);
1746 release_resource(res
);
1751 static void serial8250_config_port(struct uart_port
*port
, int flags
)
1753 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1754 struct resource
*res_std
= NULL
, *res_rsa
= NULL
;
1755 int probeflags
= PROBE_ANY
;
1760 * Don't probe for MCA ports on non-MCA machines.
1762 if (up
->port
.flags
& UPF_BOOT_ONLYMCA
&& !MCA_bus
)
1767 * Find the region that we can probe for. This in turn
1768 * tells us whether we can probe for the type of port.
1770 if (up
->port
.flags
& UPF_RESOURCES
) {
1771 ret
= serial8250_request_std_resource(up
, &res_std
);
1775 ret
= serial8250_request_rsa_resource(up
, &res_rsa
);
1777 probeflags
&= ~PROBE_RSA
;
1779 probeflags
&= ~PROBE_RSA
;
1782 if (flags
& UART_CONFIG_TYPE
)
1783 autoconfig(up
, probeflags
);
1784 if (up
->port
.type
!= PORT_UNKNOWN
&& flags
& UART_CONFIG_IRQ
)
1788 * If the port wasn't an RSA port, release the resource.
1790 if (up
->port
.type
!= PORT_RSA
&& res_rsa
)
1791 release_resource(res_rsa
);
1793 if (up
->port
.type
== PORT_UNKNOWN
&& res_std
)
1794 release_resource(res_std
);
1798 serial8250_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1800 if (ser
->irq
>= NR_IRQS
|| ser
->irq
< 0 ||
1801 ser
->baud_base
< 9600 || ser
->type
< PORT_UNKNOWN
||
1802 ser
->type
> PORT_MAX_8250
|| ser
->type
== PORT_CIRRUS
||
1803 ser
->type
== PORT_STARTECH
)
1809 serial8250_type(struct uart_port
*port
)
1811 int type
= port
->type
;
1813 if (type
>= ARRAY_SIZE(uart_config
))
1815 return uart_config
[type
].name
;
1818 static struct uart_ops serial8250_pops
= {
1819 .tx_empty
= serial8250_tx_empty
,
1820 .set_mctrl
= serial8250_set_mctrl
,
1821 .get_mctrl
= serial8250_get_mctrl
,
1822 .stop_tx
= serial8250_stop_tx
,
1823 .start_tx
= serial8250_start_tx
,
1824 .stop_rx
= serial8250_stop_rx
,
1825 .enable_ms
= serial8250_enable_ms
,
1826 .break_ctl
= serial8250_break_ctl
,
1827 .startup
= serial8250_startup
,
1828 .shutdown
= serial8250_shutdown
,
1829 .set_termios
= serial8250_set_termios
,
1830 .pm
= serial8250_pm
,
1831 .type
= serial8250_type
,
1832 .release_port
= serial8250_release_port
,
1833 .request_port
= serial8250_request_port
,
1834 .config_port
= serial8250_config_port
,
1835 .verify_port
= serial8250_verify_port
,
1838 static struct uart_8250_port serial8250_ports
[UART_NR
];
1840 static void __init
serial8250_isa_init_ports(void)
1842 struct uart_8250_port
*up
;
1843 static int first
= 1;
1850 for (i
= 0, up
= serial8250_ports
; i
< ARRAY_SIZE(old_serial_port
);
1852 up
->port
.iobase
= old_serial_port
[i
].port
;
1853 up
->port
.irq
= irq_canonicalize(old_serial_port
[i
].irq
);
1854 up
->port
.uartclk
= old_serial_port
[i
].baud_base
* 16;
1855 up
->port
.flags
= old_serial_port
[i
].flags
|
1857 up
->port
.hub6
= old_serial_port
[i
].hub6
;
1858 up
->port
.membase
= old_serial_port
[i
].iomem_base
;
1859 up
->port
.iotype
= old_serial_port
[i
].io_type
;
1860 up
->port
.regshift
= old_serial_port
[i
].iomem_reg_shift
;
1861 up
->port
.ops
= &serial8250_pops
;
1863 up
->port
.flags
|= UPF_SHARE_IRQ
;
1867 static void __init
serial8250_register_ports(struct uart_driver
*drv
)
1871 serial8250_isa_init_ports();
1873 for (i
= 0; i
< UART_NR
; i
++) {
1874 struct uart_8250_port
*up
= &serial8250_ports
[i
];
1877 up
->port
.ops
= &serial8250_pops
;
1878 init_timer(&up
->timer
);
1879 up
->timer
.function
= serial8250_timeout
;
1882 * ALPHA_KLUDGE_MCR needs to be killed.
1884 up
->mcr_mask
= ~ALPHA_KLUDGE_MCR
;
1885 up
->mcr_force
= ALPHA_KLUDGE_MCR
;
1887 uart_add_one_port(drv
, &up
->port
);
1891 #ifdef CONFIG_SERIAL_8250_CONSOLE
1893 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1896 * Wait for transmitter & holding register to empty
1898 static inline void wait_for_xmitr(struct uart_8250_port
*up
)
1900 unsigned int status
, tmout
= 10000;
1902 /* Wait up to 10ms for the character(s) to be sent. */
1904 status
= serial_in(up
, UART_LSR
);
1906 if (status
& UART_LSR_BI
)
1907 up
->lsr_break_flag
= UART_LSR_BI
;
1912 } while ((status
& BOTH_EMPTY
) != BOTH_EMPTY
);
1914 /* Wait up to 1s for flow control if necessary */
1915 if (up
->port
.flags
& UPF_CONS_FLOW
) {
1918 ((serial_in(up
, UART_MSR
) & UART_MSR_CTS
) == 0))
1924 * Print a string to the serial port trying not to disturb
1925 * any possible real use of the port...
1927 * The console_lock must be held when we get here.
1930 serial8250_console_write(struct console
*co
, const char *s
, unsigned int count
)
1932 struct uart_8250_port
*up
= &serial8250_ports
[co
->index
];
1937 * First save the UER then disable the interrupts
1939 ier
= serial_in(up
, UART_IER
);
1940 serial_out(up
, UART_IER
, 0);
1943 * Now, do each character
1945 for (i
= 0; i
< count
; i
++, s
++) {
1949 * Send the character out.
1950 * If a LF, also do CR...
1952 serial_out(up
, UART_TX
, *s
);
1955 serial_out(up
, UART_TX
, 13);
1960 * Finally, wait for transmitter to become empty
1961 * and restore the IER
1964 serial_out(up
, UART_IER
, ier
);
1967 static int __init
serial8250_console_setup(struct console
*co
, char *options
)
1969 struct uart_port
*port
;
1976 * Check whether an invalid uart number has been specified, and
1977 * if so, search for the first available port that does have
1980 if (co
->index
>= UART_NR
)
1982 port
= &serial8250_ports
[co
->index
].port
;
1987 spin_lock_init(&port
->lock
);
1990 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
1992 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
1995 extern struct uart_driver serial8250_reg
;
1996 static struct console serial8250_console
= {
1998 .write
= serial8250_console_write
,
1999 .device
= uart_console_device
,
2000 .setup
= serial8250_console_setup
,
2001 .flags
= CON_PRINTBUFFER
,
2003 .data
= &serial8250_reg
,
2006 static int __init
serial8250_console_init(void)
2008 serial8250_isa_init_ports();
2009 register_console(&serial8250_console
);
2012 console_initcall(serial8250_console_init
);
2014 #define SERIAL8250_CONSOLE &serial8250_console
2016 #define SERIAL8250_CONSOLE NULL
2019 static struct uart_driver serial8250_reg
= {
2020 .owner
= THIS_MODULE
,
2021 .driver_name
= "serial",
2022 .devfs_name
= "tts/",
2027 .cons
= SERIAL8250_CONSOLE
,
2031 * register_serial and unregister_serial allows for 16x50 serial ports to be
2032 * configured at run-time, to support PCMCIA modems.
2035 static int __register_serial(struct serial_struct
*req
, int line
)
2037 struct uart_port port
;
2039 port
.iobase
= req
->port
;
2040 port
.membase
= req
->iomem_base
;
2041 port
.irq
= req
->irq
;
2042 port
.uartclk
= req
->baud_base
* 16;
2043 port
.fifosize
= req
->xmit_fifo_size
;
2044 port
.regshift
= req
->iomem_reg_shift
;
2045 port
.iotype
= req
->io_type
;
2046 port
.flags
= req
->flags
| UPF_BOOT_AUTOCONF
;
2047 port
.mapbase
= req
->iomap_base
;
2051 port
.flags
|= UPF_SHARE_IRQ
;
2053 if (HIGH_BITS_OFFSET
)
2054 port
.iobase
|= (long) req
->port_high
<< HIGH_BITS_OFFSET
;
2057 * If a clock rate wasn't specified by the low level
2058 * driver, then default to the standard clock rate.
2060 if (port
.uartclk
== 0)
2061 port
.uartclk
= BASE_BAUD
* 16;
2063 return uart_register_port(&serial8250_reg
, &port
);
2067 * register_serial - configure a 16x50 serial port at runtime
2068 * @req: request structure
2070 * Configure the serial port specified by the request. If the
2071 * port exists and is in use an error is returned. If the port
2072 * is not currently in the table it is added.
2074 * The port is then probed and if necessary the IRQ is autodetected
2075 * If this fails an error is returned.
2077 * On success the port is ready to use and the line number is returned.
2079 int register_serial(struct serial_struct
*req
)
2081 return __register_serial(req
, -1);
2084 int __init
early_serial_setup(struct uart_port
*port
)
2086 serial8250_isa_init_ports();
2087 serial8250_ports
[port
->line
].port
= *port
;
2088 serial8250_ports
[port
->line
].port
.ops
= &serial8250_pops
;
2093 * unregister_serial - remove a 16x50 serial port at runtime
2094 * @line: serial line number
2096 * Remove one serial port. This may be called from interrupt
2099 void unregister_serial(int line
)
2101 uart_unregister_port(&serial8250_reg
, line
);
2105 * This is for ISAPNP only.
2107 void serial8250_get_irq_map(unsigned int *map
)
2111 for (i
= 0; i
< UART_NR
; i
++) {
2112 if (serial8250_ports
[i
].port
.type
!= PORT_UNKNOWN
&&
2113 serial8250_ports
[i
].port
.irq
< 16)
2114 *map
|= 1 << serial8250_ports
[i
].port
.irq
;
2119 * serial8250_suspend_port - suspend one serial port
2120 * @line: serial line number
2122 * Suspend one serial port.
2124 void serial8250_suspend_port(int line
, u32 level
)
2126 uart_suspend_port(&serial8250_reg
, &serial8250_ports
[line
].port
, level
);
2130 * serial8250_resume_port - resume one serial port
2131 * @line: serial line number
2133 * Resume one serial port.
2135 void serial8250_resume_port(int line
, u32 level
)
2137 uart_resume_port(&serial8250_reg
, &serial8250_ports
[line
].port
, level
);
2140 static int __init
serial8250_init(void)
2144 printk(KERN_INFO
"Serial: 8250/16550 driver $Revision: 1.90 $ "
2145 "IRQ sharing %sabled\n", share_irqs
? "en" : "dis");
2147 for (i
= 0; i
< NR_IRQS
; i
++)
2148 spin_lock_init(&irq_lists
[i
].lock
);
2150 ret
= uart_register_driver(&serial8250_reg
);
2152 serial8250_register_ports(&serial8250_reg
);
2157 static void __exit
serial8250_exit(void)
2161 for (i
= 0; i
< UART_NR
; i
++)
2162 uart_remove_one_port(&serial8250_reg
, &serial8250_ports
[i
].port
);
2164 uart_unregister_driver(&serial8250_reg
);
2167 module_init(serial8250_init
);
2168 module_exit(serial8250_exit
);
2170 EXPORT_SYMBOL(register_serial
);
2171 EXPORT_SYMBOL(unregister_serial
);
2172 EXPORT_SYMBOL(serial8250_get_irq_map
);
2173 EXPORT_SYMBOL(serial8250_suspend_port
);
2174 EXPORT_SYMBOL(serial8250_resume_port
);
2176 MODULE_LICENSE("GPL");
2177 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2179 MODULE_PARM(share_irqs
, "i");
2180 MODULE_PARM_DESC(share_irqs
, "Share IRQs with other non-8250/16x50 devices"
2183 #if defined(CONFIG_SERIAL_8250_RSA) && defined(MODULE)
2184 MODULE_PARM(probe_rsa
, "1-" __MODULE_STRING(PORT_RSA_MAX
) "i");
2185 MODULE_PARM_DESC(probe_rsa
, "Probe I/O ports for RSA");
2186 MODULE_PARM(force_rsa
, "1-" __MODULE_STRING(PORT_RSA_MAX
) "i");
2187 MODULE_PARM_DESC(force_rsa
, "Force I/O ports for RSA");