More meth updates.
[linux-2.6/linux-mips.git] / drivers / serial / 68360serial.c
blob96b54b2304262f261933d5512a2f31df2df6792f
1 /*
2 * UART driver for 68360 CPM SCC or SMC
3 * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
4 * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
5 * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
7 * I used the serial.c driver as the framework for this driver.
8 * Give credit to those guys.
9 * The original code was written for the MBX860 board. I tried to make
10 * it generic, but there may be some assumptions in the structures that
11 * have to be fixed later.
12 * To save porting time, I did not bother to change any object names
13 * that are not accessed outside of this file.
14 * It still needs lots of work........When it was easy, I included code
15 * to support the SCCs, but this has never been tested, nor is it complete.
16 * Only the SCCs support modem control, so that is not complete either.
18 * This module exports the following rs232 io functions:
20 * int rs_360_init(void);
23 #include <linux/config.h>
24 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/signal.h>
27 #include <linux/sched.h>
28 #include <linux/timer.h>
29 #include <linux/interrupt.h>
30 #include <linux/tty.h>
31 #include <linux/tty_flip.h>
32 #include <linux/serial.h>
33 #include <linux/serialP.h>
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fcntl.h>
37 #include <linux/ptrace.h>
38 #include <linux/mm.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <asm/irq.h>
42 #include <asm/m68360.h>
43 #include <asm/commproc.h>
46 #ifdef CONFIG_KGDB
47 extern void breakpoint(void);
48 extern void set_debug_traps(void);
49 extern int kgdb_output_string (const char* s, unsigned int count);
50 #endif
53 /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
54 #include <linux/console.h>
56 /* this defines the index into rs_table for the port to use
58 #ifndef CONFIG_SERIAL_CONSOLE_PORT
59 #define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */
60 #endif
61 /* #endif */
63 #if 0
64 /* SCC2 for console
66 #undef CONFIG_SERIAL_CONSOLE_PORT
67 #define CONFIG_SERIAL_CONSOLE_PORT 2
68 #endif
71 #define TX_WAKEUP ASYNC_SHARE_IRQ
73 static char *serial_name = "CPM UART driver";
74 static char *serial_version = "0.03";
76 static struct tty_driver *serial_driver;
77 int serial_console_setup(struct console *co, char *options);
80 * Serial driver configuration section. Here are the various options:
82 #define SERIAL_PARANOIA_CHECK
83 #define CONFIG_SERIAL_NOPAUSE_IO
84 #define SERIAL_DO_RESTART
86 /* Set of debugging defines */
88 #undef SERIAL_DEBUG_INTR
89 #undef SERIAL_DEBUG_OPEN
90 #undef SERIAL_DEBUG_FLOW
91 #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
93 #define _INLINE_ inline
95 #define DBG_CNT(s)
97 /* We overload some of the items in the data structure to meet our
98 * needs. For example, the port address is the CPM parameter ram
99 * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
100 * 2 SMCs. The "hub6" field is used to indicate the channel number, with
101 * a flag indicating SCC or SMC, and the number is used as an index into
102 * the CPM parameter area for this device.
103 * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
104 * not currently used. I should probably use it to indicate the port
105 * type of SMC or SCC.
106 * The SMCs do not support any modem control signals.
108 #define smc_scc_num hub6
109 #define NUM_IS_SCC ((int)0x00010000)
110 #define PORT_NUM(P) ((P) & 0x0000ffff)
113 #if defined (CONFIG_UCQUICC)
115 volatile extern void *_periph_base;
116 /* sipex transceiver
117 * mode bits for are on pins
119 * SCC2 d16..19
120 * SCC3 d20..23
121 * SCC4 d24..27
123 #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
125 static uint sipex_mode_bits = 0x00000000;
127 #endif
129 /* There is no `serial_state' defined back here in 2.0.
130 * Try to get by with serial_struct
132 /* #define serial_state serial_struct */
134 /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
135 * extras: */
137 #if 0
138 struct async_icount_24 {
139 __u32 cts, dsr, rng, dcd, tx, rx;
140 __u32 frame, parity, overrun, brk;
141 __u32 buf_overrun;
142 } icount;
143 #endif
145 #if 0
147 struct serial_state {
148 int magic;
149 int baud_base;
150 unsigned long port;
151 int irq;
152 int flags;
153 int hub6;
154 int type;
155 int line;
156 int revision; /* Chip revision (950) */
157 int xmit_fifo_size;
158 int custom_divisor;
159 int count;
160 u8 *iomem_base;
161 u16 iomem_reg_shift;
162 unsigned short close_delay;
163 unsigned short closing_wait; /* time to wait before closing */
164 struct async_icount_24 icount;
165 int io_type;
166 struct async_struct *info;
168 #endif
170 #define SSTATE_MAGIC 0x5302
174 /* SMC2 is sometimes used for low performance TDM interfaces. Define
175 * this as 1 if you want SMC2 as a serial port UART managed by this driver.
176 * Define this as 0 if you wish to use SMC2 for something else.
178 #define USE_SMC2 1
180 #if 0
181 /* Define SCC to ttySx mapping. */
182 #define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */
184 /* Define which SCC is the first one to use for a serial port. These
185 * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
186 * for Ethernet, and the first available SCC for serial UART is SCC2.
187 * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and
188 * interrupt vectors in the table below to match.
190 #define SCC_IDX_BASE 1 /* table index */
191 #endif
194 /* Processors other than the 860 only get SMCs configured by default.
195 * Either they don't have SCCs or they are allocated somewhere else.
196 * Of course, there are now 860s without some SCCs, so we will need to
197 * address that someday.
198 * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
199 * stereo codec parts, and we use SMC2 to help support that.
201 static struct serial_state rs_table[] = {
202 /* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */
203 { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */
204 #if USE_SMC2
205 ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */
206 #endif
208 #if defined(CONFIG_SERIAL_68360_SCC)
209 ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */
210 ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */
211 ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */
212 #endif
215 #define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
217 /* The number of buffer descriptors and their sizes.
219 #define RX_NUM_FIFO 4
220 #define RX_BUF_SIZE 32
221 #define TX_NUM_FIFO 4
222 #define TX_BUF_SIZE 32
224 #define CONSOLE_NUM_FIFO 2
225 #define CONSOLE_BUF_SIZE 4
227 char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
229 /* The async_struct in serial.h does not really give us what we
230 * need, so define our own here.
232 typedef struct serial_info {
233 int magic;
234 int flags;
236 struct serial_state *state;
237 /* struct serial_struct *state; */
238 /* struct async_struct *state; */
240 struct tty_struct *tty;
241 int read_status_mask;
242 int ignore_status_mask;
243 int timeout;
244 int line;
245 int x_char; /* xon/xoff character */
246 int close_delay;
247 unsigned short closing_wait;
248 unsigned short closing_wait2;
249 unsigned long event;
250 unsigned long last_active;
251 int blocked_open; /* # of blocked opens */
252 struct work_struct tqueue;
253 struct work_struct tqueue_hangup;
254 wait_queue_head_t open_wait;
255 wait_queue_head_t close_wait;
258 /* CPM Buffer Descriptor pointers.
260 QUICC_BD *rx_bd_base;
261 QUICC_BD *rx_cur;
262 QUICC_BD *tx_bd_base;
263 QUICC_BD *tx_cur;
264 } ser_info_t;
267 /* since kmalloc_init() does not get called until much after this initialization: */
268 static ser_info_t quicc_ser_info[NR_PORTS];
269 static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
270 static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
272 static void change_speed(ser_info_t *info);
273 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
275 static inline int serial_paranoia_check(ser_info_t *info,
276 char *name, const char *routine)
278 #ifdef SERIAL_PARANOIA_CHECK
279 static const char *badmagic =
280 "Warning: bad magic number for serial struct (%s) in %s\n";
281 static const char *badinfo =
282 "Warning: null async_struct for (%s) in %s\n";
284 if (!info) {
285 printk(badinfo, name, routine);
286 return 1;
288 if (info->magic != SERIAL_MAGIC) {
289 printk(badmagic, name, routine);
290 return 1;
292 #endif
293 return 0;
297 * This is used to figure out the divisor speeds and the timeouts,
298 * indexed by the termio value. The generic CPM functions are responsible
299 * for setting and assigning baud rate generators for us.
301 static int baud_table[] = {
302 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
303 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
305 /* This sucks. There is a better way: */
306 #if defined(CONFIG_CONSOLE_9600)
307 #define CONSOLE_BAUDRATE 9600
308 #elif defined(CONFIG_CONSOLE_19200)
309 #define CONSOLE_BAUDRATE 19200
310 #elif defined(CONFIG_CONSOLE_115200)
311 #define CONSOLE_BAUDRATE 115200
312 #else
313 #warning "console baud rate undefined"
314 #define CONSOLE_BAUDRATE 9600
315 #endif
318 * ------------------------------------------------------------
319 * rs_stop() and rs_start()
321 * This routines are called before setting or resetting tty->stopped.
322 * They enable or disable transmitter interrupts, as necessary.
323 * ------------------------------------------------------------
325 static void rs_360_stop(struct tty_struct *tty)
327 ser_info_t *info = (ser_info_t *)tty->driver_data;
328 int idx;
329 unsigned long flags;
330 volatile struct scc_regs *sccp;
331 volatile struct smc_regs *smcp;
333 if (serial_paranoia_check(info, tty->name, "rs_stop"))
334 return;
336 local_irq_save(flags);
337 idx = PORT_NUM(info->state->smc_scc_num);
338 if (info->state->smc_scc_num & NUM_IS_SCC) {
339 sccp = &pquicc->scc_regs[idx];
340 sccp->scc_sccm &= ~UART_SCCM_TX;
341 } else {
342 /* smcp = &cpmp->cp_smc[idx]; */
343 smcp = &pquicc->smc_regs[idx];
344 smcp->smc_smcm &= ~SMCM_TX;
346 local_irq_restore(flags);
350 static void rs_360_start(struct tty_struct *tty)
352 ser_info_t *info = (ser_info_t *)tty->driver_data;
353 int idx;
354 unsigned long flags;
355 volatile struct scc_regs *sccp;
356 volatile struct smc_regs *smcp;
358 if (serial_paranoia_check(info, tty->name, "rs_stop"))
359 return;
361 local_irq_save(flags);
362 idx = PORT_NUM(info->state->smc_scc_num);
363 if (info->state->smc_scc_num & NUM_IS_SCC) {
364 sccp = &pquicc->scc_regs[idx];
365 sccp->scc_sccm |= UART_SCCM_TX;
366 } else {
367 smcp = &pquicc->smc_regs[idx];
368 smcp->smc_smcm |= SMCM_TX;
370 local_irq_restore(flags);
374 * ----------------------------------------------------------------------
376 * Here starts the interrupt handling routines. All of the following
377 * subroutines are declared as inline and are folded into
378 * rs_interrupt(). They were separated out for readability's sake.
380 * Note: rs_interrupt() is a "fast" interrupt, which means that it
381 * runs with interrupts turned off. People who may want to modify
382 * rs_interrupt() should try to keep the interrupt handler as fast as
383 * possible. After you are done making modifications, it is not a bad
384 * idea to do:
386 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
388 * and look at the resulting assemble code in serial.s.
390 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
391 * -----------------------------------------------------------------------
394 static _INLINE_ void receive_chars(ser_info_t *info)
396 struct tty_struct *tty = info->tty;
397 unsigned char ch, *cp;
398 /*int ignored = 0;*/
399 int i;
400 ushort status;
401 struct async_icount *icount;
402 /* struct async_icount_24 *icount; */
403 volatile QUICC_BD *bdp;
405 icount = &info->state->icount;
407 /* Just loop through the closed BDs and copy the characters into
408 * the buffer.
410 bdp = info->rx_cur;
411 for (;;) {
412 if (bdp->status & BD_SC_EMPTY) /* If this one is empty */
413 break; /* we are all done */
415 /* The read status mask tell us what we should do with
416 * incoming characters, especially if errors occur.
417 * One special case is the use of BD_SC_EMPTY. If
418 * this is not set, we are supposed to be ignoring
419 * inputs. In this case, just mark the buffer empty and
420 * continue.
422 if (!(info->read_status_mask & BD_SC_EMPTY)) {
423 bdp->status |= BD_SC_EMPTY;
424 bdp->status &=
425 ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
427 if (bdp->status & BD_SC_WRAP)
428 bdp = info->rx_bd_base;
429 else
430 bdp++;
431 continue;
434 /* Get the number of characters and the buffer pointer.
436 i = bdp->length;
437 /* cp = (unsigned char *)__va(bdp->buf); */
438 cp = (char *)bdp->buf;
439 status = bdp->status;
441 /* Check to see if there is room in the tty buffer for
442 * the characters in our BD buffer. If not, we exit
443 * now, leaving the BD with the characters. We'll pick
444 * them up again on the next receive interrupt (which could
445 * be a timeout).
447 if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE)
448 break;
450 while (i-- > 0) {
451 ch = *cp++;
452 *tty->flip.char_buf_ptr = ch;
453 icount->rx++;
455 #ifdef SERIAL_DEBUG_INTR
456 printk("DR%02x:%02x...", ch, status);
457 #endif
458 *tty->flip.flag_buf_ptr = 0;
459 if (status & (BD_SC_BR | BD_SC_FR |
460 BD_SC_PR | BD_SC_OV)) {
462 * For statistics only
464 if (status & BD_SC_BR)
465 icount->brk++;
466 else if (status & BD_SC_PR)
467 icount->parity++;
468 else if (status & BD_SC_FR)
469 icount->frame++;
470 if (status & BD_SC_OV)
471 icount->overrun++;
474 * Now check to see if character should be
475 * ignored, and mask off conditions which
476 * should be ignored.
477 if (status & info->ignore_status_mask) {
478 if (++ignored > 100)
479 break;
480 continue;
483 status &= info->read_status_mask;
485 if (status & (BD_SC_BR)) {
486 #ifdef SERIAL_DEBUG_INTR
487 printk("handling break....");
488 #endif
489 *tty->flip.flag_buf_ptr = TTY_BREAK;
490 if (info->flags & ASYNC_SAK)
491 do_SAK(tty);
492 } else if (status & BD_SC_PR)
493 *tty->flip.flag_buf_ptr = TTY_PARITY;
494 else if (status & BD_SC_FR)
495 *tty->flip.flag_buf_ptr = TTY_FRAME;
496 if (status & BD_SC_OV) {
498 * Overrun is special, since it's
499 * reported immediately, and doesn't
500 * affect the current character
502 if (tty->flip.count < TTY_FLIPBUF_SIZE) {
503 tty->flip.count++;
504 tty->flip.flag_buf_ptr++;
505 tty->flip.char_buf_ptr++;
506 *tty->flip.flag_buf_ptr =
507 TTY_OVERRUN;
511 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
512 break;
514 tty->flip.flag_buf_ptr++;
515 tty->flip.char_buf_ptr++;
516 tty->flip.count++;
519 /* This BD is ready to be used again. Clear status.
520 * Get next BD.
522 bdp->status |= BD_SC_EMPTY;
523 bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
525 if (bdp->status & BD_SC_WRAP)
526 bdp = info->rx_bd_base;
527 else
528 bdp++;
531 info->rx_cur = (QUICC_BD *)bdp;
533 schedule_work(&tty->flip.work);
536 static _INLINE_ void receive_break(ser_info_t *info)
538 struct tty_struct *tty = info->tty;
540 info->state->icount.brk++;
541 /* Check to see if there is room in the tty buffer for
542 * the break. If not, we exit now, losing the break. FIXME
544 if ((tty->flip.count + 1) >= TTY_FLIPBUF_SIZE)
545 return;
546 *(tty->flip.flag_buf_ptr++) = TTY_BREAK;
547 *(tty->flip.char_buf_ptr++) = 0;
548 tty->flip.count++;
550 schedule_work(&tty->flip.work);
553 static _INLINE_ void transmit_chars(ser_info_t *info)
556 if ((info->flags & TX_WAKEUP) ||
557 (info->tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
558 schedule_work(&info->tqueue);
561 #ifdef SERIAL_DEBUG_INTR
562 printk("THRE...");
563 #endif
566 #ifdef notdef
567 /* I need to do this for the SCCs, so it is left as a reminder.
569 static _INLINE_ void check_modem_status(struct async_struct *info)
571 int status;
572 /* struct async_icount *icount; */
573 struct async_icount_24 *icount;
575 status = serial_in(info, UART_MSR);
577 if (status & UART_MSR_ANY_DELTA) {
578 icount = &info->state->icount;
579 /* update input line counters */
580 if (status & UART_MSR_TERI)
581 icount->rng++;
582 if (status & UART_MSR_DDSR)
583 icount->dsr++;
584 if (status & UART_MSR_DDCD) {
585 icount->dcd++;
586 #ifdef CONFIG_HARD_PPS
587 if ((info->flags & ASYNC_HARDPPS_CD) &&
588 (status & UART_MSR_DCD))
589 hardpps();
590 #endif
592 if (status & UART_MSR_DCTS)
593 icount->cts++;
594 wake_up_interruptible(&info->delta_msr_wait);
597 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
598 #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
599 printk("ttys%d CD now %s...", info->line,
600 (status & UART_MSR_DCD) ? "on" : "off");
601 #endif
602 if (status & UART_MSR_DCD)
603 wake_up_interruptible(&info->open_wait);
604 else {
605 #ifdef SERIAL_DEBUG_OPEN
606 printk("scheduling hangup...");
607 #endif
608 queue_task(&info->tqueue_hangup,
609 &tq_scheduler);
612 if (info->flags & ASYNC_CTS_FLOW) {
613 if (info->tty->hw_stopped) {
614 if (status & UART_MSR_CTS) {
615 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
616 printk("CTS tx start...");
617 #endif
618 info->tty->hw_stopped = 0;
619 info->IER |= UART_IER_THRI;
620 serial_out(info, UART_IER, info->IER);
621 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
622 return;
624 } else {
625 if (!(status & UART_MSR_CTS)) {
626 #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
627 printk("CTS tx stop...");
628 #endif
629 info->tty->hw_stopped = 1;
630 info->IER &= ~UART_IER_THRI;
631 serial_out(info, UART_IER, info->IER);
636 #endif
639 * This is the serial driver's interrupt routine for a single port
641 /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
642 static void rs_360_interrupt(int vec, void *dev_id, struct pt_regs *fp)
644 u_char events;
645 int idx;
646 ser_info_t *info;
647 volatile struct smc_regs *smcp;
648 volatile struct scc_regs *sccp;
650 info = (ser_info_t *)dev_id;
652 idx = PORT_NUM(info->state->smc_scc_num);
653 if (info->state->smc_scc_num & NUM_IS_SCC) {
654 sccp = &pquicc->scc_regs[idx];
655 events = sccp->scc_scce;
656 if (events & SCCM_RX)
657 receive_chars(info);
658 if (events & SCCM_TX)
659 transmit_chars(info);
660 sccp->scc_scce = events;
661 } else {
662 smcp = &pquicc->smc_regs[idx];
663 events = smcp->smc_smce;
664 if (events & SMCM_BRKE)
665 receive_break(info);
666 if (events & SMCM_RX)
667 receive_chars(info);
668 if (events & SMCM_TX)
669 transmit_chars(info);
670 smcp->smc_smce = events;
673 #ifdef SERIAL_DEBUG_INTR
674 printk("rs_interrupt_single(%d, %x)...",
675 info->state->smc_scc_num, events);
676 #endif
677 #ifdef modem_control
678 check_modem_status(info);
679 #endif
680 info->last_active = jiffies;
681 #ifdef SERIAL_DEBUG_INTR
682 printk("end.\n");
683 #endif
688 * -------------------------------------------------------------------
689 * Here ends the serial interrupt routines.
690 * -------------------------------------------------------------------
694 static void do_softint(void *private_)
696 ser_info_t *info = (ser_info_t *) private_;
697 struct tty_struct *tty;
699 tty = info->tty;
700 if (!tty)
701 return;
703 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
704 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
705 tty->ldisc.write_wakeup)
706 (tty->ldisc.write_wakeup)(tty);
707 wake_up_interruptible(&tty->write_wait);
713 * This routine is called from the scheduler tqueue when the interrupt
714 * routine has signalled that a hangup has occurred. The path of
715 * hangup processing is:
717 * serial interrupt routine -> (scheduler tqueue) ->
718 * do_serial_hangup() -> tty->hangup() -> rs_hangup()
721 static void do_serial_hangup(void *private_)
723 struct async_struct *info = (struct async_struct *) private_;
724 struct tty_struct *tty;
726 tty = info->tty;
727 if (!tty)
728 return;
730 tty_hangup(tty);
734 static int startup(ser_info_t *info)
736 unsigned long flags;
737 int retval=0;
738 int idx;
739 /*struct serial_state *state = info->state;*/
740 volatile struct smc_regs *smcp;
741 volatile struct scc_regs *sccp;
742 volatile struct smc_uart_pram *up;
743 volatile struct uart_pram *scup;
746 local_irq_save(flags);
748 if (info->flags & ASYNC_INITIALIZED) {
749 goto errout;
752 #ifdef maybe
753 if (!state->port || !state->type) {
754 if (info->tty)
755 set_bit(TTY_IO_ERROR, &info->tty->flags);
756 goto errout;
758 #endif
760 #ifdef SERIAL_DEBUG_OPEN
761 printk("starting up ttys%d (irq %d)...", info->line, state->irq);
762 #endif
765 #ifdef modem_control
766 info->MCR = 0;
767 if (info->tty->termios->c_cflag & CBAUD)
768 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
769 #endif
771 if (info->tty)
772 clear_bit(TTY_IO_ERROR, &info->tty->flags);
775 * and set the speed of the serial port
777 change_speed(info);
779 idx = PORT_NUM(info->state->smc_scc_num);
780 if (info->state->smc_scc_num & NUM_IS_SCC) {
781 sccp = &pquicc->scc_regs[idx];
782 scup = &pquicc->pram[info->state->port].scc.pscc.u;
784 scup->mrblr = RX_BUF_SIZE;
785 scup->max_idl = RX_BUF_SIZE;
787 sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
788 sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
790 } else {
791 smcp = &pquicc->smc_regs[idx];
793 /* Enable interrupts and I/O.
795 smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
796 smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
798 /* We can tune the buffer length and idle characters
799 * to take advantage of the entire incoming buffer size.
800 * If mrblr is something other than 1, maxidl has to be
801 * non-zero or we never get an interrupt. The maxidl
802 * is the number of character times we wait after reception
803 * of the last character before we decide no more characters
804 * are coming.
806 /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
807 /* holy unionized structures, Batman: */
808 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
810 up->mrblr = RX_BUF_SIZE;
811 up->max_idl = RX_BUF_SIZE;
813 up->brkcr = 1; /* number of break chars */
816 info->flags |= ASYNC_INITIALIZED;
817 local_irq_restore(flags);
818 return 0;
820 errout:
821 local_irq_restore(flags);
822 return retval;
826 * This routine will shutdown a serial port; interrupts are disabled, and
827 * DTR is dropped if the hangup on close termio flag is on.
829 static void shutdown(ser_info_t *info)
831 unsigned long flags;
832 struct serial_state *state;
833 int idx;
834 volatile struct smc_regs *smcp;
835 volatile struct scc_regs *sccp;
837 if (!(info->flags & ASYNC_INITIALIZED))
838 return;
840 state = info->state;
842 #ifdef SERIAL_DEBUG_OPEN
843 printk("Shutting down serial port %d (irq %d)....", info->line,
844 state->irq);
845 #endif
847 local_irq_save(flags);
849 idx = PORT_NUM(state->smc_scc_num);
850 if (state->smc_scc_num & NUM_IS_SCC) {
851 sccp = &pquicc->scc_regs[idx];
852 sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
853 #ifdef CONFIG_SERIAL_CONSOLE
854 /* We can't disable the transmitter if this is the
855 * system console.
857 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
858 #endif
859 sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
860 } else {
861 smcp = &pquicc->smc_regs[idx];
863 /* Disable interrupts and I/O.
865 smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
866 #ifdef CONFIG_SERIAL_CONSOLE
867 /* We can't disable the transmitter if this is the
868 * system console.
870 if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
871 #endif
872 smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
875 if (info->tty)
876 set_bit(TTY_IO_ERROR, &info->tty->flags);
878 info->flags &= ~ASYNC_INITIALIZED;
879 local_irq_restore(flags);
883 * This routine is called to set the UART divisor registers to match
884 * the specified baud rate for a serial port.
886 static void change_speed(ser_info_t *info)
888 int baud_rate;
889 unsigned cflag, cval, scval, prev_mode;
890 int i, bits, sbits, idx;
891 unsigned long flags;
892 struct serial_state *state;
893 volatile struct smc_regs *smcp;
894 volatile struct scc_regs *sccp;
896 if (!info->tty || !info->tty->termios)
897 return;
898 cflag = info->tty->termios->c_cflag;
900 state = info->state;
902 /* Character length programmed into the mode register is the
903 * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
904 * 1 or 2 stop bits, minus 1.
905 * The value 'bits' counts this for us.
907 cval = 0;
908 scval = 0;
910 /* byte size and parity */
911 switch (cflag & CSIZE) {
912 case CS5: bits = 5; break;
913 case CS6: bits = 6; break;
914 case CS7: bits = 7; break;
915 case CS8: bits = 8; break;
916 /* Never happens, but GCC is too dumb to figure it out */
917 default: bits = 8; break;
919 sbits = bits - 5;
921 if (cflag & CSTOPB) {
922 cval |= SMCMR_SL; /* Two stops */
923 scval |= SCU_PMSR_SL;
924 bits++;
926 if (cflag & PARENB) {
927 cval |= SMCMR_PEN;
928 scval |= SCU_PMSR_PEN;
929 bits++;
931 if (!(cflag & PARODD)) {
932 cval |= SMCMR_PM_EVEN;
933 scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
936 /* Determine divisor based on baud rate */
937 i = cflag & CBAUD;
938 if (i >= (sizeof(baud_table)/sizeof(int)))
939 baud_rate = 9600;
940 else
941 baud_rate = baud_table[i];
943 info->timeout = (TX_BUF_SIZE*HZ*bits);
944 info->timeout += HZ/50; /* Add .02 seconds of slop */
946 #ifdef modem_control
947 /* CTS flow control flag and modem status interrupts */
948 info->IER &= ~UART_IER_MSI;
949 if (info->flags & ASYNC_HARDPPS_CD)
950 info->IER |= UART_IER_MSI;
951 if (cflag & CRTSCTS) {
952 info->flags |= ASYNC_CTS_FLOW;
953 info->IER |= UART_IER_MSI;
954 } else
955 info->flags &= ~ASYNC_CTS_FLOW;
956 if (cflag & CLOCAL)
957 info->flags &= ~ASYNC_CHECK_CD;
958 else {
959 info->flags |= ASYNC_CHECK_CD;
960 info->IER |= UART_IER_MSI;
962 serial_out(info, UART_IER, info->IER);
963 #endif
966 * Set up parity check flag
968 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
970 info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
971 if (I_INPCK(info->tty))
972 info->read_status_mask |= BD_SC_FR | BD_SC_PR;
973 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
974 info->read_status_mask |= BD_SC_BR;
977 * Characters to ignore
979 info->ignore_status_mask = 0;
980 if (I_IGNPAR(info->tty))
981 info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
982 if (I_IGNBRK(info->tty)) {
983 info->ignore_status_mask |= BD_SC_BR;
985 * If we're ignore parity and break indicators, ignore
986 * overruns too. (For real raw support).
988 if (I_IGNPAR(info->tty))
989 info->ignore_status_mask |= BD_SC_OV;
992 * !!! ignore all characters if CREAD is not set
994 if ((cflag & CREAD) == 0)
995 info->read_status_mask &= ~BD_SC_EMPTY;
996 local_irq_save(flags);
998 /* Start bit has not been added (so don't, because we would just
999 * subtract it later), and we need to add one for the number of
1000 * stops bits (there is always at least one).
1002 bits++;
1003 idx = PORT_NUM(state->smc_scc_num);
1004 if (state->smc_scc_num & NUM_IS_SCC) {
1005 sccp = &pquicc->scc_regs[idx];
1006 sccp->scc_psmr = (sbits << 12) | scval;
1007 } else {
1008 smcp = &pquicc->smc_regs[idx];
1010 /* Set the mode register. We want to keep a copy of the
1011 * enables, because we want to put them back if they were
1012 * present.
1014 prev_mode = smcp->smc_smcmr;
1015 smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
1016 smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
1019 m360_cpm_setbrg((state - rs_table), baud_rate);
1021 local_irq_restore(flags);
1024 static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
1026 ser_info_t *info = (ser_info_t *)tty->driver_data;
1027 volatile QUICC_BD *bdp;
1029 if (serial_paranoia_check(info, tty->name, "rs_put_char"))
1030 return;
1032 if (!tty)
1033 return;
1035 bdp = info->tx_cur;
1036 while (bdp->status & BD_SC_READY);
1038 /* *((char *)__va(bdp->buf)) = ch; */
1039 *((char *)bdp->buf) = ch;
1040 bdp->length = 1;
1041 bdp->status |= BD_SC_READY;
1043 /* Get next BD.
1045 if (bdp->status & BD_SC_WRAP)
1046 bdp = info->tx_bd_base;
1047 else
1048 bdp++;
1050 info->tx_cur = (QUICC_BD *)bdp;
1054 static int rs_360_write(struct tty_struct * tty, int from_user,
1055 const unsigned char *buf, int count)
1057 int c, ret = 0;
1058 ser_info_t *info = (ser_info_t *)tty->driver_data;
1059 volatile QUICC_BD *bdp;
1061 #ifdef CONFIG_KGDB
1062 /* Try to let stub handle output. Returns true if it did. */
1063 if (kgdb_output_string(buf, count))
1064 return ret;
1065 #endif
1067 if (serial_paranoia_check(info, tty->name, "rs_write"))
1068 return 0;
1070 if (!tty)
1071 return 0;
1073 bdp = info->tx_cur;
1075 while (1) {
1076 c = min(count, TX_BUF_SIZE);
1078 if (c <= 0)
1079 break;
1081 if (bdp->status & BD_SC_READY) {
1082 info->flags |= TX_WAKEUP;
1083 break;
1086 if (from_user) {
1087 if (copy_from_user((void *)bdp->buf, buf, c)) {
1088 if (!ret)
1089 ret = -EFAULT;
1090 break;
1092 } else {
1093 /* memcpy(__va(bdp->buf), buf, c); */
1094 memcpy((void *)bdp->buf, buf, c);
1097 bdp->length = c;
1098 bdp->status |= BD_SC_READY;
1100 buf += c;
1101 count -= c;
1102 ret += c;
1104 /* Get next BD.
1106 if (bdp->status & BD_SC_WRAP)
1107 bdp = info->tx_bd_base;
1108 else
1109 bdp++;
1110 info->tx_cur = (QUICC_BD *)bdp;
1112 return ret;
1115 static int rs_360_write_room(struct tty_struct *tty)
1117 ser_info_t *info = (ser_info_t *)tty->driver_data;
1118 int ret;
1120 if (serial_paranoia_check(info, tty->name, "rs_write_room"))
1121 return 0;
1123 if ((info->tx_cur->status & BD_SC_READY) == 0) {
1124 info->flags &= ~TX_WAKEUP;
1125 ret = TX_BUF_SIZE;
1127 else {
1128 info->flags |= TX_WAKEUP;
1129 ret = 0;
1131 return ret;
1134 /* I could track this with transmit counters....maybe later.
1136 static int rs_360_chars_in_buffer(struct tty_struct *tty)
1138 ser_info_t *info = (ser_info_t *)tty->driver_data;
1140 if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
1141 return 0;
1142 return 0;
1145 static void rs_360_flush_buffer(struct tty_struct *tty)
1147 ser_info_t *info = (ser_info_t *)tty->driver_data;
1149 if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
1150 return;
1152 /* There is nothing to "flush", whatever we gave the CPM
1153 * is on its way out.
1155 wake_up_interruptible(&tty->write_wait);
1156 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
1157 tty->ldisc.write_wakeup)
1158 (tty->ldisc.write_wakeup)(tty);
1159 info->flags &= ~TX_WAKEUP;
1163 * This function is used to send a high-priority XON/XOFF character to
1164 * the device
1166 static void rs_360_send_xchar(struct tty_struct *tty, char ch)
1168 volatile QUICC_BD *bdp;
1170 ser_info_t *info = (ser_info_t *)tty->driver_data;
1172 if (serial_paranoia_check(info, tty->name, "rs_send_char"))
1173 return;
1175 bdp = info->tx_cur;
1176 while (bdp->status & BD_SC_READY);
1178 /* *((char *)__va(bdp->buf)) = ch; */
1179 *((char *)bdp->buf) = ch;
1180 bdp->length = 1;
1181 bdp->status |= BD_SC_READY;
1183 /* Get next BD.
1185 if (bdp->status & BD_SC_WRAP)
1186 bdp = info->tx_bd_base;
1187 else
1188 bdp++;
1190 info->tx_cur = (QUICC_BD *)bdp;
1194 * ------------------------------------------------------------
1195 * rs_throttle()
1197 * This routine is called by the upper-layer tty layer to signal that
1198 * incoming characters should be throttled.
1199 * ------------------------------------------------------------
1201 static void rs_360_throttle(struct tty_struct * tty)
1203 ser_info_t *info = (ser_info_t *)tty->driver_data;
1204 #ifdef SERIAL_DEBUG_THROTTLE
1205 char buf[64];
1207 printk("throttle %s: %d....\n", _tty_name(tty, buf),
1208 tty->ldisc.chars_in_buffer(tty));
1209 #endif
1211 if (serial_paranoia_check(info, tty->name, "rs_throttle"))
1212 return;
1214 if (I_IXOFF(tty))
1215 rs_360_send_xchar(tty, STOP_CHAR(tty));
1217 #ifdef modem_control
1218 if (tty->termios->c_cflag & CRTSCTS)
1219 info->MCR &= ~UART_MCR_RTS;
1221 local_irq_disable();
1222 serial_out(info, UART_MCR, info->MCR);
1223 local_irq_enable();
1224 #endif
1227 static void rs_360_unthrottle(struct tty_struct * tty)
1229 ser_info_t *info = (ser_info_t *)tty->driver_data;
1230 #ifdef SERIAL_DEBUG_THROTTLE
1231 char buf[64];
1233 printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
1234 tty->ldisc.chars_in_buffer(tty));
1235 #endif
1237 if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
1238 return;
1240 if (I_IXOFF(tty)) {
1241 if (info->x_char)
1242 info->x_char = 0;
1243 else
1244 rs_360_send_xchar(tty, START_CHAR(tty));
1246 #ifdef modem_control
1247 if (tty->termios->c_cflag & CRTSCTS)
1248 info->MCR |= UART_MCR_RTS;
1249 local_irq_disable();
1250 serial_out(info, UART_MCR, info->MCR);
1251 local_irq_enable();
1252 #endif
1256 * ------------------------------------------------------------
1257 * rs_ioctl() and friends
1258 * ------------------------------------------------------------
1261 #ifdef maybe
1263 * get_lsr_info - get line status register info
1265 * Purpose: Let user call ioctl() to get info when the UART physically
1266 * is emptied. On bus types like RS485, the transmitter must
1267 * release the bus after transmitting. This must be done when
1268 * the transmit shift register is empty, not be done when the
1269 * transmit holding register is empty. This functionality
1270 * allows an RS485 driver to be written in user space.
1272 static int get_lsr_info(struct async_struct * info, unsigned int *value)
1274 unsigned char status;
1275 unsigned int result;
1277 local_irq_disable();
1278 status = serial_in(info, UART_LSR);
1279 local_irq_enable();
1280 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1281 return put_user(result,value);
1283 #endif
1285 static int get_modem_info(ser_info_t *info, unsigned int *value)
1287 unsigned int result = 0;
1288 #ifdef modem_control
1289 unsigned char control, status;
1291 control = info->MCR;
1292 local_irq_disable();
1293 status = serial_in(info, UART_MSR);
1294 local_irq_enable();
1295 result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
1296 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
1297 #ifdef TIOCM_OUT1
1298 | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
1299 | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
1300 #endif
1301 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
1302 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
1303 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
1304 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1305 #endif
1306 /* return put_user(result,value); */
1307 put_user(result,value);
1308 return (0);
1311 static int set_modem_info(ser_info_t *info, unsigned int cmd,
1312 unsigned int *value)
1314 int error;
1315 unsigned int arg;
1317 error = get_user(arg,value);
1318 if (error)
1319 return error;
1320 #ifdef modem_control
1321 switch (cmd) {
1322 case TIOCMBIS:
1323 if (arg & TIOCM_RTS)
1324 info->MCR |= UART_MCR_RTS;
1325 if (arg & TIOCM_DTR)
1326 info->MCR |= UART_MCR_DTR;
1327 #ifdef TIOCM_OUT1
1328 if (arg & TIOCM_OUT1)
1329 info->MCR |= UART_MCR_OUT1;
1330 if (arg & TIOCM_OUT2)
1331 info->MCR |= UART_MCR_OUT2;
1332 #endif
1333 break;
1334 case TIOCMBIC:
1335 if (arg & TIOCM_RTS)
1336 info->MCR &= ~UART_MCR_RTS;
1337 if (arg & TIOCM_DTR)
1338 info->MCR &= ~UART_MCR_DTR;
1339 #ifdef TIOCM_OUT1
1340 if (arg & TIOCM_OUT1)
1341 info->MCR &= ~UART_MCR_OUT1;
1342 if (arg & TIOCM_OUT2)
1343 info->MCR &= ~UART_MCR_OUT2;
1344 #endif
1345 break;
1346 case TIOCMSET:
1347 info->MCR = ((info->MCR & ~(UART_MCR_RTS |
1348 #ifdef TIOCM_OUT1
1349 UART_MCR_OUT1 |
1350 UART_MCR_OUT2 |
1351 #endif
1352 UART_MCR_DTR))
1353 | ((arg & TIOCM_RTS) ? UART_MCR_RTS : 0)
1354 #ifdef TIOCM_OUT1
1355 | ((arg & TIOCM_OUT1) ? UART_MCR_OUT1 : 0)
1356 | ((arg & TIOCM_OUT2) ? UART_MCR_OUT2 : 0)
1357 #endif
1358 | ((arg & TIOCM_DTR) ? UART_MCR_DTR : 0));
1359 break;
1360 default:
1361 return -EINVAL;
1363 local_irq_disable();
1364 serial_out(info, UART_MCR, info->MCR);
1365 local_irq_enable();
1366 #endif
1367 return 0;
1370 /* Sending a break is a two step process on the SMC/SCC. It is accomplished
1371 * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
1372 * command. We take advantage of the begin/end functions to make this
1373 * happen.
1375 static ushort smc_chan_map[] = {
1376 CPM_CR_CH_SMC1,
1377 CPM_CR_CH_SMC2
1380 static ushort scc_chan_map[] = {
1381 CPM_CR_CH_SCC1,
1382 CPM_CR_CH_SCC2,
1383 CPM_CR_CH_SCC3,
1384 CPM_CR_CH_SCC4
1387 static void begin_break(ser_info_t *info)
1389 volatile QUICC *cp;
1390 ushort chan;
1391 int idx;
1393 cp = pquicc;
1395 idx = PORT_NUM(info->state->smc_scc_num);
1396 if (info->state->smc_scc_num & NUM_IS_SCC)
1397 chan = scc_chan_map[idx];
1398 else
1399 chan = smc_chan_map[idx];
1401 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
1402 while (cp->cp_cr & CPM_CR_FLG);
1405 static void end_break(ser_info_t *info)
1407 volatile QUICC *cp;
1408 ushort chan;
1409 int idx;
1411 cp = pquicc;
1413 idx = PORT_NUM(info->state->smc_scc_num);
1414 if (info->state->smc_scc_num & NUM_IS_SCC)
1415 chan = scc_chan_map[idx];
1416 else
1417 chan = smc_chan_map[idx];
1419 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
1420 while (cp->cp_cr & CPM_CR_FLG);
1424 * This routine sends a break character out the serial port.
1426 static void send_break(ser_info_t *info, int duration)
1428 current->state = TASK_INTERRUPTIBLE;
1429 #ifdef SERIAL_DEBUG_SEND_BREAK
1430 printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
1431 #endif
1432 begin_break(info);
1433 schedule_timeout(duration);
1434 end_break(info);
1435 #ifdef SERIAL_DEBUG_SEND_BREAK
1436 printk("done jiffies=%lu\n", jiffies);
1437 #endif
1441 static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
1442 unsigned int cmd, unsigned long arg)
1444 int error;
1445 ser_info_t *info = (ser_info_t *)tty->driver_data;
1446 int retval;
1447 struct async_icount cnow;
1448 /* struct async_icount_24 cnow;*/ /* kernel counter temps */
1449 struct serial_icounter_struct *p_cuser; /* user space */
1451 if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
1452 return -ENODEV;
1454 if ((cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1455 if (tty->flags & (1 << TTY_IO_ERROR))
1456 return -EIO;
1459 switch (cmd) {
1460 case TCSBRK: /* SVID version: non-zero arg --> no break */
1461 retval = tty_check_change(tty);
1462 if (retval)
1463 return retval;
1464 tty_wait_until_sent(tty, 0);
1465 if (signal_pending(current))
1466 return -EINTR;
1467 if (!arg) {
1468 send_break(info, HZ/4); /* 1/4 second */
1469 if (signal_pending(current))
1470 return -EINTR;
1472 return 0;
1473 case TCSBRKP: /* support for POSIX tcsendbreak() */
1474 retval = tty_check_change(tty);
1475 if (retval)
1476 return retval;
1477 tty_wait_until_sent(tty, 0);
1478 if (signal_pending(current))
1479 return -EINTR;
1480 send_break(info, arg ? arg*(HZ/10) : HZ/4);
1481 if (signal_pending(current))
1482 return -EINTR;
1483 return 0;
1484 case TIOCSBRK:
1485 retval = tty_check_change(tty);
1486 if (retval)
1487 return retval;
1488 tty_wait_until_sent(tty, 0);
1489 begin_break(info);
1490 return 0;
1491 case TIOCCBRK:
1492 retval = tty_check_change(tty);
1493 if (retval)
1494 return retval;
1495 end_break(info);
1496 return 0;
1497 case TIOCGSOFTCAR:
1498 /* return put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg); */
1499 put_user(C_CLOCAL(tty) ? 1 : 0, (int *) arg);
1500 return 0;
1501 case TIOCSSOFTCAR:
1502 error = get_user(arg, (unsigned int *) arg);
1503 if (error)
1504 return error;
1505 tty->termios->c_cflag =
1506 ((tty->termios->c_cflag & ~CLOCAL) |
1507 (arg ? CLOCAL : 0));
1508 return 0;
1509 case TIOCMGET:
1510 return get_modem_info(info, (unsigned int *) arg);
1511 case TIOCMBIS:
1512 case TIOCMBIC:
1513 case TIOCMSET:
1514 return set_modem_info(info, cmd, (unsigned int *) arg);
1515 #ifdef maybe
1516 case TIOCSERGETLSR: /* Get line status register */
1517 return get_lsr_info(info, (unsigned int *) arg);
1518 #endif
1520 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1521 * - mask passed in arg for lines of interest
1522 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1523 * Caller should use TIOCGICOUNT to see which one it was
1525 case TIOCMIWAIT:
1526 #ifdef modem_control
1527 local_irq_disable();
1528 /* note the counters on entry */
1529 cprev = info->state->icount;
1530 local_irq_enable();
1531 while (1) {
1532 interruptible_sleep_on(&info->delta_msr_wait);
1533 /* see if a signal did it */
1534 if (signal_pending(current))
1535 return -ERESTARTSYS;
1536 local_irq_disable();
1537 cnow = info->state->icount; /* atomic copy */
1538 local_irq_enable();
1539 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
1540 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1541 return -EIO; /* no change => error */
1542 if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1543 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1544 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1545 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
1546 return 0;
1548 cprev = cnow;
1550 /* NOTREACHED */
1551 #else
1552 return 0;
1553 #endif
1556 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1557 * Return: write counters to the user passed counter struct
1558 * NB: both 1->0 and 0->1 transitions are counted except for
1559 * RI where only 0->1 is counted.
1561 case TIOCGICOUNT:
1562 local_irq_disable();
1563 cnow = info->state->icount;
1564 local_irq_enable();
1565 p_cuser = (struct serial_icounter_struct *) arg;
1566 /* error = put_user(cnow.cts, &p_cuser->cts); */
1567 /* if (error) return error; */
1568 /* error = put_user(cnow.dsr, &p_cuser->dsr); */
1569 /* if (error) return error; */
1570 /* error = put_user(cnow.rng, &p_cuser->rng); */
1571 /* if (error) return error; */
1572 /* error = put_user(cnow.dcd, &p_cuser->dcd); */
1573 /* if (error) return error; */
1575 put_user(cnow.cts, &p_cuser->cts);
1576 put_user(cnow.dsr, &p_cuser->dsr);
1577 put_user(cnow.rng, &p_cuser->rng);
1578 put_user(cnow.dcd, &p_cuser->dcd);
1579 return 0;
1581 default:
1582 return -ENOIOCTLCMD;
1584 return 0;
1587 /* FIX UP modem control here someday......
1589 static void rs_360_set_termios(struct tty_struct *tty, struct termios *old_termios)
1591 ser_info_t *info = (ser_info_t *)tty->driver_data;
1593 if ( (tty->termios->c_cflag == old_termios->c_cflag)
1594 && ( RELEVANT_IFLAG(tty->termios->c_iflag)
1595 == RELEVANT_IFLAG(old_termios->c_iflag)))
1596 return;
1598 change_speed(info);
1600 #ifdef modem_control
1601 /* Handle transition to B0 status */
1602 if ((old_termios->c_cflag & CBAUD) &&
1603 !(tty->termios->c_cflag & CBAUD)) {
1604 info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
1605 local_irq_disable();
1606 serial_out(info, UART_MCR, info->MCR);
1607 local_irq_enable();
1610 /* Handle transition away from B0 status */
1611 if (!(old_termios->c_cflag & CBAUD) &&
1612 (tty->termios->c_cflag & CBAUD)) {
1613 info->MCR |= UART_MCR_DTR;
1614 if (!tty->hw_stopped ||
1615 !(tty->termios->c_cflag & CRTSCTS)) {
1616 info->MCR |= UART_MCR_RTS;
1618 local_irq_disable();
1619 serial_out(info, UART_MCR, info->MCR);
1620 local_irq_enable();
1623 /* Handle turning off CRTSCTS */
1624 if ((old_termios->c_cflag & CRTSCTS) &&
1625 !(tty->termios->c_cflag & CRTSCTS)) {
1626 tty->hw_stopped = 0;
1627 rs_360_start(tty);
1629 #endif
1631 #if 0
1633 * No need to wake up processes in open wait, since they
1634 * sample the CLOCAL flag once, and don't recheck it.
1635 * XXX It's not clear whether the current behavior is correct
1636 * or not. Hence, this may change.....
1638 if (!(old_termios->c_cflag & CLOCAL) &&
1639 (tty->termios->c_cflag & CLOCAL))
1640 wake_up_interruptible(&info->open_wait);
1641 #endif
1645 * ------------------------------------------------------------
1646 * rs_close()
1648 * This routine is called when the serial port gets closed. First, we
1649 * wait for the last remaining data to be sent. Then, we unlink its
1650 * async structure from the interrupt chain if necessary, and we free
1651 * that IRQ if nothing is left in the chain.
1652 * ------------------------------------------------------------
1654 static void rs_360_close(struct tty_struct *tty, struct file * filp)
1656 ser_info_t *info = (ser_info_t *)tty->driver_data;
1657 /* struct async_state *state; */
1658 struct serial_state *state;
1659 unsigned long flags;
1660 int idx;
1661 volatile struct smc_regs *smcp;
1662 volatile struct scc_regs *sccp;
1664 if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
1665 return;
1667 state = info->state;
1669 local_irq_save(flags);
1671 if (tty_hung_up_p(filp)) {
1672 DBG_CNT("before DEC-hung");
1673 MOD_DEC_USE_COUNT;
1674 local_irq_restore(flags);
1675 return;
1678 #ifdef SERIAL_DEBUG_OPEN
1679 printk("rs_close ttys%d, count = %d\n", info->line, state->count);
1680 #endif
1681 if ((tty->count == 1) && (state->count != 1)) {
1683 * Uh, oh. tty->count is 1, which means that the tty
1684 * structure will be freed. state->count should always
1685 * be one in these conditions. If it's greater than
1686 * one, we've got real problems, since it means the
1687 * serial port won't be shutdown.
1689 printk("rs_close: bad serial port count; tty->count is 1, "
1690 "state->count is %d\n", state->count);
1691 state->count = 1;
1693 if (--state->count < 0) {
1694 printk("rs_close: bad serial port count for ttys%d: %d\n",
1695 info->line, state->count);
1696 state->count = 0;
1698 if (state->count) {
1699 DBG_CNT("before DEC-2");
1700 MOD_DEC_USE_COUNT;
1701 local_irq_restore(flags);
1702 return;
1704 info->flags |= ASYNC_CLOSING;
1706 * Now we wait for the transmit buffer to clear; and we notify
1707 * the line discipline to only process XON/XOFF characters.
1709 tty->closing = 1;
1710 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1711 tty_wait_until_sent(tty, info->closing_wait);
1713 * At this point we stop accepting input. To do this, we
1714 * disable the receive line status interrupts, and tell the
1715 * interrupt driver to stop checking the data ready bit in the
1716 * line status register.
1718 info->read_status_mask &= ~BD_SC_EMPTY;
1719 if (info->flags & ASYNC_INITIALIZED) {
1721 idx = PORT_NUM(info->state->smc_scc_num);
1722 if (info->state->smc_scc_num & NUM_IS_SCC) {
1723 sccp = &pquicc->scc_regs[idx];
1724 sccp->scc_sccm &= ~UART_SCCM_RX;
1725 sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
1726 } else {
1727 smcp = &pquicc->smc_regs[idx];
1728 smcp->smc_smcm &= ~SMCM_RX;
1729 smcp->smc_smcmr &= ~SMCMR_REN;
1732 * Before we drop DTR, make sure the UART transmitter
1733 * has completely drained; this is especially
1734 * important if there is a transmit FIFO!
1736 rs_360_wait_until_sent(tty, info->timeout);
1738 shutdown(info);
1739 if (tty->driver->flush_buffer)
1740 tty->driver->flush_buffer(tty);
1741 if (tty->ldisc.flush_buffer)
1742 tty->ldisc.flush_buffer(tty);
1743 tty->closing = 0;
1744 info->event = 0;
1745 info->tty = 0;
1746 if (info->blocked_open) {
1747 if (info->close_delay) {
1748 current->state = TASK_INTERRUPTIBLE;
1749 schedule_timeout(info->close_delay);
1751 wake_up_interruptible(&info->open_wait);
1753 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
1754 wake_up_interruptible(&info->close_wait);
1755 MOD_DEC_USE_COUNT;
1756 local_irq_restore(flags);
1760 * rs_wait_until_sent() --- wait until the transmitter is empty
1762 static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
1764 ser_info_t *info = (ser_info_t *)tty->driver_data;
1765 unsigned long orig_jiffies, char_time;
1766 /*int lsr;*/
1767 volatile QUICC_BD *bdp;
1769 if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
1770 return;
1772 #ifdef maybe
1773 if (info->state->type == PORT_UNKNOWN)
1774 return;
1775 #endif
1777 orig_jiffies = jiffies;
1779 * Set the check interval to be 1/5 of the estimated time to
1780 * send a single character, and make it at least 1. The check
1781 * interval should also be less than the timeout.
1783 * Note: we have to use pretty tight timings here to satisfy
1784 * the NIST-PCTS.
1786 char_time = 1;
1787 if (timeout)
1788 char_time = min(char_time, (unsigned long)timeout);
1789 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1790 printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
1791 printk("jiff=%lu...", jiffies);
1792 #endif
1794 /* We go through the loop at least once because we can't tell
1795 * exactly when the last character exits the shifter. There can
1796 * be at least two characters waiting to be sent after the buffers
1797 * are empty.
1799 do {
1800 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1801 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1802 #endif
1803 current->state = TASK_INTERRUPTIBLE;
1804 /* current->counter = 0; make us low-priority */
1805 schedule_timeout(char_time);
1806 if (signal_pending(current))
1807 break;
1808 if (timeout && ((orig_jiffies + timeout) < jiffies))
1809 break;
1810 /* The 'tx_cur' is really the next buffer to send. We
1811 * have to back up to the previous BD and wait for it
1812 * to go. This isn't perfect, because all this indicates
1813 * is the buffer is available. There are still characters
1814 * in the CPM FIFO.
1816 bdp = info->tx_cur;
1817 if (bdp == info->tx_bd_base)
1818 bdp += (TX_NUM_FIFO-1);
1819 else
1820 bdp--;
1821 } while (bdp->status & BD_SC_READY);
1822 current->state = TASK_RUNNING;
1823 #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1824 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1825 #endif
1829 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
1831 static void rs_360_hangup(struct tty_struct *tty)
1833 ser_info_t *info = (ser_info_t *)tty->driver_data;
1834 struct serial_state *state = info->state;
1836 if (serial_paranoia_check(info, tty->name, "rs_hangup"))
1837 return;
1839 state = info->state;
1841 rs_360_flush_buffer(tty);
1842 shutdown(info);
1843 info->event = 0;
1844 state->count = 0;
1845 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1846 info->tty = 0;
1847 wake_up_interruptible(&info->open_wait);
1851 * ------------------------------------------------------------
1852 * rs_open() and friends
1853 * ------------------------------------------------------------
1855 static int block_til_ready(struct tty_struct *tty, struct file * filp,
1856 ser_info_t *info)
1858 #ifdef DO_THIS_LATER
1859 DECLARE_WAITQUEUE(wait, current);
1860 #endif
1861 struct serial_state *state = info->state;
1862 int retval;
1863 int do_clocal = 0;
1866 * If the device is in the middle of being closed, then block
1867 * until it's done, and then try again.
1869 if (tty_hung_up_p(filp) ||
1870 (info->flags & ASYNC_CLOSING)) {
1871 if (info->flags & ASYNC_CLOSING)
1872 interruptible_sleep_on(&info->close_wait);
1873 #ifdef SERIAL_DO_RESTART
1874 if (info->flags & ASYNC_HUP_NOTIFY)
1875 return -EAGAIN;
1876 else
1877 return -ERESTARTSYS;
1878 #else
1879 return -EAGAIN;
1880 #endif
1884 * If non-blocking mode is set, or the port is not enabled,
1885 * then make the check up front and then exit.
1886 * If this is an SMC port, we don't have modem control to wait
1887 * for, so just get out here.
1889 if ((filp->f_flags & O_NONBLOCK) ||
1890 (tty->flags & (1 << TTY_IO_ERROR)) ||
1891 !(info->state->smc_scc_num & NUM_IS_SCC)) {
1892 info->flags |= ASYNC_NORMAL_ACTIVE;
1893 return 0;
1896 if (tty->termios->c_cflag & CLOCAL)
1897 do_clocal = 1;
1900 * Block waiting for the carrier detect and the line to become
1901 * free (i.e., not in use by the callout). While we are in
1902 * this loop, state->count is dropped by one, so that
1903 * rs_close() knows when to free things. We restore it upon
1904 * exit, either normal or abnormal.
1906 retval = 0;
1907 #ifdef DO_THIS_LATER
1908 add_wait_queue(&info->open_wait, &wait);
1909 #ifdef SERIAL_DEBUG_OPEN
1910 printk("block_til_ready before block: ttys%d, count = %d\n",
1911 state->line, state->count);
1912 #endif
1913 local_irq_disable();
1914 if (!tty_hung_up_p(filp))
1915 state->count--;
1916 local_irq_enable();
1917 info->blocked_open++;
1918 while (1) {
1919 local_irq_disable();
1920 if (tty->termios->c_cflag & CBAUD)
1921 serial_out(info, UART_MCR,
1922 serial_inp(info, UART_MCR) |
1923 (UART_MCR_DTR | UART_MCR_RTS));
1924 local_irq_enable();
1925 set_current_state(TASK_INTERRUPTIBLE);
1926 if (tty_hung_up_p(filp) ||
1927 !(info->flags & ASYNC_INITIALIZED)) {
1928 #ifdef SERIAL_DO_RESTART
1929 if (info->flags & ASYNC_HUP_NOTIFY)
1930 retval = -EAGAIN;
1931 else
1932 retval = -ERESTARTSYS;
1933 #else
1934 retval = -EAGAIN;
1935 #endif
1936 break;
1938 if (!(info->flags & ASYNC_CLOSING) &&
1939 (do_clocal || (serial_in(info, UART_MSR) &
1940 UART_MSR_DCD)))
1941 break;
1942 if (signal_pending(current)) {
1943 retval = -ERESTARTSYS;
1944 break;
1946 #ifdef SERIAL_DEBUG_OPEN
1947 printk("block_til_ready blocking: ttys%d, count = %d\n",
1948 info->line, state->count);
1949 #endif
1950 schedule();
1952 current->state = TASK_RUNNING;
1953 remove_wait_queue(&info->open_wait, &wait);
1954 if (!tty_hung_up_p(filp))
1955 state->count++;
1956 info->blocked_open--;
1957 #ifdef SERIAL_DEBUG_OPEN
1958 printk("block_til_ready after blocking: ttys%d, count = %d\n",
1959 info->line, state->count);
1960 #endif
1961 #endif /* DO_THIS_LATER */
1962 if (retval)
1963 return retval;
1964 info->flags |= ASYNC_NORMAL_ACTIVE;
1965 return 0;
1968 static int get_async_struct(int line, ser_info_t **ret_info)
1970 struct serial_state *sstate;
1972 sstate = rs_table + line;
1973 if (sstate->info) {
1974 sstate->count++;
1975 *ret_info = (ser_info_t *)sstate->info;
1976 return 0;
1978 else {
1979 return -ENOMEM;
1984 * This routine is called whenever a serial port is opened. It
1985 * enables interrupts for a serial port, linking in its async structure into
1986 * the IRQ chain. It also performs the serial-specific
1987 * initialization for the tty structure.
1989 static int rs_360_open(struct tty_struct *tty, struct file * filp)
1991 ser_info_t *info;
1992 int retval, line;
1994 line = tty->index;
1995 if ((line < 0) || (line >= NR_PORTS))
1996 return -ENODEV;
1997 retval = get_async_struct(line, &info);
1998 if (retval)
1999 return retval;
2000 if (serial_paranoia_check(info, tty->name, "rs_open"))
2001 return -ENODEV;
2003 #ifdef SERIAL_DEBUG_OPEN
2004 printk("rs_open %s, count = %d\n", tty->name, info->state->count);
2005 #endif
2006 tty->driver_data = info;
2007 info->tty = tty;
2010 * Start up serial port
2012 retval = startup(info);
2013 if (retval)
2014 return retval;
2016 MOD_INC_USE_COUNT;
2017 retval = block_til_ready(tty, filp, info);
2018 if (retval) {
2019 #ifdef SERIAL_DEBUG_OPEN
2020 printk("rs_open returning after block_til_ready with %d\n",
2021 retval);
2022 #endif
2023 MOD_DEC_USE_COUNT;
2024 return retval;
2027 #ifdef SERIAL_DEBUG_OPEN
2028 printk("rs_open %s successful...", tty->name);
2029 #endif
2030 return 0;
2034 * /proc fs routines....
2037 static inline int line_info(char *buf, struct serial_state *state)
2039 #ifdef notdef
2040 struct async_struct *info = state->info, scr_info;
2041 char stat_buf[30], control, status;
2042 #endif
2043 int ret;
2045 ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
2046 state->line,
2047 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
2048 (unsigned int)(state->port), state->irq);
2050 if (!state->port || (state->type == PORT_UNKNOWN)) {
2051 ret += sprintf(buf+ret, "\n");
2052 return ret;
2055 #ifdef notdef
2057 * Figure out the current RS-232 lines
2059 if (!info) {
2060 info = &scr_info; /* This is just for serial_{in,out} */
2062 info->magic = SERIAL_MAGIC;
2063 info->port = state->port;
2064 info->flags = state->flags;
2065 info->quot = 0;
2066 info->tty = 0;
2068 local_irq_disable();
2069 status = serial_in(info, UART_MSR);
2070 control = info ? info->MCR : serial_in(info, UART_MCR);
2071 local_irq_enable();
2073 stat_buf[0] = 0;
2074 stat_buf[1] = 0;
2075 if (control & UART_MCR_RTS)
2076 strcat(stat_buf, "|RTS");
2077 if (status & UART_MSR_CTS)
2078 strcat(stat_buf, "|CTS");
2079 if (control & UART_MCR_DTR)
2080 strcat(stat_buf, "|DTR");
2081 if (status & UART_MSR_DSR)
2082 strcat(stat_buf, "|DSR");
2083 if (status & UART_MSR_DCD)
2084 strcat(stat_buf, "|CD");
2085 if (status & UART_MSR_RI)
2086 strcat(stat_buf, "|RI");
2088 if (info->quot) {
2089 ret += sprintf(buf+ret, " baud:%d",
2090 state->baud_base / info->quot);
2093 ret += sprintf(buf+ret, " tx:%d rx:%d",
2094 state->icount.tx, state->icount.rx);
2096 if (state->icount.frame)
2097 ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
2099 if (state->icount.parity)
2100 ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
2102 if (state->icount.brk)
2103 ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
2105 if (state->icount.overrun)
2106 ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
2109 * Last thing is the RS-232 status lines
2111 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2112 #endif
2113 return ret;
2116 int rs_360_read_proc(char *page, char **start, off_t off, int count,
2117 int *eof, void *data)
2119 int i, len = 0;
2120 off_t begin = 0;
2122 len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
2123 for (i = 0; i < NR_PORTS && len < 4000; i++) {
2124 len += line_info(page + len, &rs_table[i]);
2125 if (len+begin > off+count)
2126 goto done;
2127 if (len+begin < off) {
2128 begin += len;
2129 len = 0;
2132 *eof = 1;
2133 done:
2134 if (off >= len+begin)
2135 return 0;
2136 *start = page + (begin-off);
2137 return ((count < begin+len-off) ? count : begin+len-off);
2141 * ---------------------------------------------------------------------
2142 * rs_init() and friends
2144 * rs_init() is called at boot-time to initialize the serial driver.
2145 * ---------------------------------------------------------------------
2149 * This routine prints out the appropriate serial driver version
2150 * number, and identifies which options were configured into this
2151 * driver.
2153 static _INLINE_ void show_serial_version(void)
2155 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
2160 * The serial console driver used during boot. Note that these names
2161 * clash with those found in "serial.c", so we currently can't support
2162 * the 16xxx uarts and these at the same time. I will fix this to become
2163 * an indirect function call from tty_io.c (or something).
2166 #ifdef CONFIG_SERIAL_CONSOLE
2169 * Print a string to the serial port trying not to disturb any possible
2170 * real use of the port...
2172 static void my_console_write(int idx, const char *s,
2173 unsigned count)
2175 struct serial_state *ser;
2176 ser_info_t *info;
2177 unsigned i;
2178 QUICC_BD *bdp, *bdbase;
2179 volatile struct smc_uart_pram *up;
2180 volatile u_char *cp;
2182 ser = rs_table + idx;
2185 /* If the port has been initialized for general use, we have
2186 * to use the buffer descriptors allocated there. Otherwise,
2187 * we simply use the single buffer allocated.
2189 if ((info = (ser_info_t *)ser->info) != NULL) {
2190 bdp = info->tx_cur;
2191 bdbase = info->tx_bd_base;
2193 else {
2194 /* Pointer to UART in parameter ram.
2196 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2197 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
2199 /* Get the address of the host memory buffer.
2201 bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2205 * We need to gracefully shut down the transmitter, disable
2206 * interrupts, then send our bytes out.
2210 * Now, do each character. This is not as bad as it looks
2211 * since this is a holding FIFO and not a transmitting FIFO.
2212 * We could add the complexity of filling the entire transmit
2213 * buffer, but we would just wait longer between accesses......
2215 for (i = 0; i < count; i++, s++) {
2216 /* Wait for transmitter fifo to empty.
2217 * Ready indicates output is ready, and xmt is doing
2218 * that, not that it is ready for us to send.
2220 while (bdp->status & BD_SC_READY);
2222 /* Send the character out.
2224 cp = bdp->buf;
2225 *cp = *s;
2227 bdp->length = 1;
2228 bdp->status |= BD_SC_READY;
2230 if (bdp->status & BD_SC_WRAP)
2231 bdp = bdbase;
2232 else
2233 bdp++;
2235 /* if a LF, also do CR... */
2236 if (*s == 10) {
2237 while (bdp->status & BD_SC_READY);
2238 /* cp = __va(bdp->buf); */
2239 cp = bdp->buf;
2240 *cp = 13;
2241 bdp->length = 1;
2242 bdp->status |= BD_SC_READY;
2244 if (bdp->status & BD_SC_WRAP) {
2245 bdp = bdbase;
2247 else {
2248 bdp++;
2254 * Finally, Wait for transmitter & holding register to empty
2255 * and restore the IER
2257 while (bdp->status & BD_SC_READY);
2259 if (info)
2260 info->tx_cur = (QUICC_BD *)bdp;
2263 static void serial_console_write(struct console *c, const char *s,
2264 unsigned count)
2266 #ifdef CONFIG_KGDB
2267 /* Try to let stub handle output. Returns true if it did. */
2268 if (kgdb_output_string(s, count))
2269 return;
2270 #endif
2271 my_console_write(c->index, s, count);
2276 /*void console_print_68360(const char *p)
2278 const char *cp = p;
2279 int i;
2281 for (i=0;cp[i]!=0;i++);
2283 serial_console_write (p, i);
2285 //Comment this if you want to have a strict interrupt-driven output
2286 //rs_fair_output();
2288 return;
2296 #ifdef CONFIG_XMON
2298 xmon_360_write(const char *s, unsigned count)
2300 my_console_write(0, s, count);
2301 return(count);
2303 #endif
2305 #ifdef CONFIG_KGDB
2306 void
2307 putDebugChar(char ch)
2309 my_console_write(0, &ch, 1);
2311 #endif
2314 * Receive character from the serial port. This only works well
2315 * before the port is initialized for real use.
2317 static int my_console_wait_key(int idx, int xmon, char *obuf)
2319 struct serial_state *ser;
2320 u_char c, *cp;
2321 ser_info_t *info;
2322 QUICC_BD *bdp;
2323 volatile struct smc_uart_pram *up;
2324 int i;
2326 ser = rs_table + idx;
2328 /* Get the address of the host memory buffer.
2329 * If the port has been initialized for general use, we must
2330 * use information from the port structure.
2332 if ((info = (ser_info_t *)ser->info))
2333 bdp = info->rx_cur;
2334 else
2335 /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
2336 bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
2338 /* Pointer to UART in parameter ram.
2340 /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
2341 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2344 * We need to gracefully shut down the receiver, disable
2345 * interrupts, then read the input.
2346 * XMON just wants a poll. If no character, return -1, else
2347 * return the character.
2349 if (!xmon) {
2350 while (bdp->status & BD_SC_EMPTY);
2352 else {
2353 if (bdp->status & BD_SC_EMPTY)
2354 return -1;
2357 cp = (char *)bdp->buf;
2359 if (obuf) {
2360 i = c = bdp->length;
2361 while (i-- > 0)
2362 *obuf++ = *cp++;
2364 else {
2365 c = *cp;
2367 bdp->status |= BD_SC_EMPTY;
2369 if (info) {
2370 if (bdp->status & BD_SC_WRAP) {
2371 bdp = info->rx_bd_base;
2373 else {
2374 bdp++;
2376 info->rx_cur = (QUICC_BD *)bdp;
2379 return((int)c);
2382 static int serial_console_wait_key(struct console *co)
2384 return(my_console_wait_key(co->index, 0, NULL));
2387 #ifdef CONFIG_XMON
2389 xmon_360_read_poll(void)
2391 return(my_console_wait_key(0, 1, NULL));
2395 xmon_360_read_char(void)
2397 return(my_console_wait_key(0, 0, NULL));
2399 #endif
2401 #ifdef CONFIG_KGDB
2402 static char kgdb_buf[RX_BUF_SIZE], *kgdp;
2403 static int kgdb_chars;
2405 unsigned char
2406 getDebugChar(void)
2408 if (kgdb_chars <= 0) {
2409 kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
2410 kgdp = kgdb_buf;
2412 kgdb_chars--;
2414 return(*kgdp++);
2417 void kgdb_interruptible(int state)
2420 void kgdb_map_scc(void)
2422 struct serial_state *ser;
2423 uint mem_addr;
2424 volatile QUICC_BD *bdp;
2425 volatile smc_uart_t *up;
2427 cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
2429 /* To avoid data cache CPM DMA coherency problems, allocate a
2430 * buffer in the CPM DPRAM. This will work until the CPM and
2431 * serial ports are initialized. At that time a memory buffer
2432 * will be allocated.
2433 * The port is already initialized from the boot procedure, all
2434 * we do here is give it a different buffer and make it a FIFO.
2437 ser = rs_table;
2439 /* Right now, assume we are using SMCs.
2441 up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
2443 /* Allocate space for an input FIFO, plus a few bytes for output.
2444 * Allocate bytes to maintain word alignment.
2446 mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
2448 /* Set the physical address of the host memory buffers in
2449 * the buffer descriptors.
2451 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
2452 bdp->buf = mem_addr;
2454 bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
2455 bdp->buf = mem_addr+RX_BUF_SIZE;
2457 up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
2458 up->smc_maxidl = RX_BUF_SIZE;
2460 #endif
2462 static struct tty_struct *serial_console_device(struct console *c, int *index)
2464 *index = c->index;
2465 return serial_driver;
2469 struct console sercons = {
2470 .name = "ttyS",
2471 .write = serial_console_write,
2472 .device = serial_console_device,
2473 .wait_key = serial_console_wait_key,
2474 .setup = serial_console_setup,
2475 .flags = CON_PRINTBUFFER,
2476 .index = CONFIG_SERIAL_CONSOLE_PORT,
2482 * Register console.
2484 long console_360_init(long kmem_start, long kmem_end)
2486 register_console(&sercons);
2487 /*register_console (console_print_68360); - 2.0.38 only required a write
2488 function pointer. */
2489 return kmem_start;
2492 #endif
2494 /* Index in baud rate table of the default console baud rate.
2496 static int baud_idx;
2498 static struct tty_operations rs_360_ops = {
2499 .open = rs_360_open,
2500 .close = rs_360_close,
2501 .write = rs_360_write,
2502 .put_char = rs_360_put_char,
2503 .write_room = rs_360_write_room,
2504 .chars_in_buffer = rs_360_chars_in_buffer,
2505 .flush_buffer = rs_360_flush_buffer,
2506 .ioctl = rs_360_ioctl,
2507 .throttle = rs_360_throttle,
2508 .unthrottle = rs_360_unthrottle,
2509 /* .send_xchar = rs_360_send_xchar, */
2510 .set_termios = rs_360_set_termios,
2511 .stop = rs_360_stop,
2512 .start = rs_360_start,
2513 .hangup = rs_360_hangup,
2514 /* .wait_until_sent = rs_360_wait_until_sent, */
2515 /* .read_proc = rs_360_read_proc, */
2518 /* int __init rs_360_init(void) */
2519 int rs_360_init(void)
2521 struct serial_state * state;
2522 ser_info_t *info;
2523 void *mem_addr;
2524 uint dp_addr, iobits;
2525 int i, j, idx;
2526 ushort chan;
2527 QUICC_BD *bdp;
2528 volatile QUICC *cp;
2529 volatile struct smc_regs *sp;
2530 volatile struct smc_uart_pram *up;
2531 volatile struct scc_regs *scp;
2532 volatile struct uart_pram *sup;
2533 /* volatile immap_t *immap; */
2535 serial_driver = alloc_tty_driver(NR_PORTS);
2536 if (!serial_driver)
2537 return -1;
2539 show_serial_version();
2541 serial_driver->name = "ttyS";
2542 serial_driver->major = TTY_MAJOR;
2543 serial_driver->minor_start = 64;
2544 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2545 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2546 serial_driver->init_termios = tty_std_termios;
2547 serial_driver->init_termios.c_cflag =
2548 baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
2549 serial_driver->flags = TTY_DRIVER_REAL_RAW;
2550 tty_set_operations(serial_driver, &rs_360_ops);
2552 if (tty_register_driver(serial_driver))
2553 panic("Couldn't register serial driver\n");
2555 cp = pquicc; /* Get pointer to Communication Processor */
2556 /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */
2559 /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
2561 /* The "standard" configuration through the 860.
2563 /* immap->im_ioport.iop_papar |= 0x00fc; */
2564 /* immap->im_ioport.iop_padir &= ~0x00fc; */
2565 /* immap->im_ioport.iop_paodr &= ~0x00fc; */
2566 cp->pio_papar |= 0x00fc;
2567 cp->pio_padir &= ~0x00fc;
2568 /* cp->pio_paodr &= ~0x00fc; */
2571 /* Since we don't yet do modem control, connect the port C pins
2572 * as general purpose I/O. This will assert CTS and CD for the
2573 * SCC ports.
2575 /* FIXME: see 360um p.7-365 and 860um p.34-12
2576 * I can't make sense of these bits - mleslie*/
2577 /* immap->im_ioport.iop_pcdir |= 0x03c6; */
2578 /* immap->im_ioport.iop_pcpar &= ~0x03c6; */
2580 /* cp->pio_pcdir |= 0x03c6; */
2581 /* cp->pio_pcpar &= ~0x03c6; */
2585 /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
2586 * BRG4 to SCC3.
2588 cp->si_sicr &= ~0x00ffff00;
2589 cp->si_sicr |= 0x001b1200;
2591 #ifdef CONFIG_PP04
2592 /* Frequentis PP04 forced to RS-232 until we know better.
2593 * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
2595 immap->im_ioport.iop_pcdir |= 0x000c;
2596 immap->im_ioport.iop_pcpar &= ~0x000c;
2597 immap->im_ioport.iop_pcdat &= ~0x000c;
2599 /* This enables the TX driver.
2601 cp->cp_pbpar &= ~0x6000;
2602 cp->cp_pbdat &= ~0x6000;
2603 #endif
2605 for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
2606 state->magic = SSTATE_MAGIC;
2607 state->line = i;
2608 state->type = PORT_UNKNOWN;
2609 state->custom_divisor = 0;
2610 state->close_delay = 5*HZ/10;
2611 state->closing_wait = 30*HZ;
2612 state->icount.cts = state->icount.dsr =
2613 state->icount.rng = state->icount.dcd = 0;
2614 state->icount.rx = state->icount.tx = 0;
2615 state->icount.frame = state->icount.parity = 0;
2616 state->icount.overrun = state->icount.brk = 0;
2617 printk(KERN_INFO "ttyS%02d at irq 0x%02x is an %s\n",
2618 i, (unsigned int)(state->irq),
2619 (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
2621 #ifdef CONFIG_SERIAL_CONSOLE
2622 /* If we just printed the message on the console port, and
2623 * we are about to initialize it for general use, we have
2624 * to wait a couple of character times for the CR/NL to
2625 * make it out of the transmit buffer.
2627 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2628 mdelay(8);
2631 /* idx = PORT_NUM(info->state->smc_scc_num); */
2632 /* if (info->state->smc_scc_num & NUM_IS_SCC) */
2633 /* chan = scc_chan_map[idx]; */
2634 /* else */
2635 /* chan = smc_chan_map[idx]; */
2637 /* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
2638 /* while (cp->cp_cr & CPM_CR_FLG); */
2640 #endif
2641 /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
2642 info = &quicc_ser_info[i];
2643 if (info) {
2644 memset (info, 0, sizeof(ser_info_t));
2645 info->magic = SERIAL_MAGIC;
2646 info->line = i;
2647 info->flags = state->flags;
2648 INIT_WORK(&info->tqueue, do_softint, info);
2649 INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
2650 init_waitqueue_head(&info->open_wait);
2651 init_waitqueue_head(&info->close_wait);
2652 info->state = state;
2653 state->info = (struct async_struct *)info;
2655 /* We need to allocate a transmit and receive buffer
2656 * descriptors from dual port ram, and a character
2657 * buffer area from host mem.
2659 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
2661 /* Allocate space for FIFOs in the host memory.
2662 * (for now this is from a static array of buffers :(
2664 /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
2665 /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
2666 mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
2668 /* Set the physical address of the host memory
2669 * buffers in the buffer descriptors, and the
2670 * virtual address for us to work with.
2672 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2673 info->rx_cur = info->rx_bd_base = bdp;
2675 /* initialize rx buffer descriptors */
2676 for (j=0; j<(RX_NUM_FIFO-1); j++) {
2677 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2678 bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
2679 mem_addr += RX_BUF_SIZE;
2680 bdp++;
2682 bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
2683 bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
2686 idx = PORT_NUM(info->state->smc_scc_num);
2687 if (info->state->smc_scc_num & NUM_IS_SCC) {
2689 #if defined (CONFIG_UCQUICC) && 1
2690 /* set the transceiver mode to RS232 */
2691 sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
2692 sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
2693 *(uint *)_periph_base = sipex_mode_bits;
2694 /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
2695 #endif
2698 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
2700 /* Allocate space for FIFOs in the host memory.
2702 /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
2703 /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
2704 mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
2706 /* Set the physical address of the host memory
2707 * buffers in the buffer descriptors, and the
2708 * virtual address for us to work with.
2710 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2711 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2712 info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
2714 /* initialize tx buffer descriptors */
2715 for (j=0; j<(TX_NUM_FIFO-1); j++) {
2716 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2717 bdp->status = BD_SC_INTRPT;
2718 mem_addr += TX_BUF_SIZE;
2719 bdp++;
2721 bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
2722 bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
2724 if (info->state->smc_scc_num & NUM_IS_SCC) {
2725 scp = &pquicc->scc_regs[idx];
2726 sup = &pquicc->pram[info->state->port].scc.pscc.u;
2727 sup->rbase = dp_addr;
2728 sup->tbase = dp_addr;
2730 /* Set up the uart parameters in the
2731 * parameter ram.
2733 sup->rfcr = SMC_EB;
2734 sup->tfcr = SMC_EB;
2736 /* Set this to 1 for now, so we get single
2737 * character interrupts. Using idle charater
2738 * time requires some additional tuning.
2740 sup->mrblr = 1;
2741 sup->max_idl = 0;
2742 sup->brkcr = 1;
2743 sup->parec = 0;
2744 sup->frmer = 0;
2745 sup->nosec = 0;
2746 sup->brkec = 0;
2747 sup->uaddr1 = 0;
2748 sup->uaddr2 = 0;
2749 sup->toseq = 0;
2751 int i;
2752 for (i=0;i<8;i++)
2753 sup->cc[i] = 0x8000;
2755 sup->rccm = 0xc0ff;
2757 /* Send the CPM an initialize command.
2759 chan = scc_chan_map[idx];
2761 /* execute the INIT RX & TX PARAMS command for this channel. */
2762 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
2763 while (cp->cp_cr & CPM_CR_FLG);
2765 /* Set UART mode, 8 bit, no parity, one stop.
2766 * Enable receive and transmit.
2768 scp->scc_gsmr.w.high = 0;
2769 scp->scc_gsmr.w.low =
2770 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
2772 /* Disable all interrupts and clear all pending
2773 * events.
2775 scp->scc_sccm = 0;
2776 scp->scc_scce = 0xffff;
2777 scp->scc_dsr = 0x7e7e;
2778 scp->scc_psmr = 0x3000;
2780 /* If the port is the console, enable Rx and Tx.
2782 #ifdef CONFIG_SERIAL_CONSOLE
2783 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2784 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
2785 #endif
2787 else {
2788 /* Configure SMCs Tx/Rx instead of port B
2789 * parallel I/O.
2791 up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
2792 up->rbase = dp_addr;
2794 iobits = 0xc0 << (idx * 4);
2795 cp->pip_pbpar |= iobits;
2796 cp->pip_pbdir &= ~iobits;
2797 cp->pip_pbodr &= ~iobits;
2800 /* Connect the baud rate generator to the
2801 * SMC based upon index in rs_table. Also
2802 * make sure it is connected to NMSI.
2804 cp->si_simode &= ~(0xffff << (idx * 16));
2805 cp->si_simode |= (i << ((idx * 16) + 12));
2807 up->tbase = dp_addr;
2809 /* Set up the uart parameters in the
2810 * parameter ram.
2812 up->rfcr = SMC_EB;
2813 up->tfcr = SMC_EB;
2815 /* Set this to 1 for now, so we get single
2816 * character interrupts. Using idle charater
2817 * time requires some additional tuning.
2819 up->mrblr = 1;
2820 up->max_idl = 0;
2821 up->brkcr = 1;
2823 /* Send the CPM an initialize command.
2825 chan = smc_chan_map[idx];
2827 cp->cp_cr = mk_cr_cmd(chan,
2828 CPM_CR_INIT_TRX) | CPM_CR_FLG;
2829 #ifdef CONFIG_SERIAL_CONSOLE
2830 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2831 printk("");
2832 #endif
2833 while (cp->cp_cr & CPM_CR_FLG);
2835 /* Set UART mode, 8 bit, no parity, one stop.
2836 * Enable receive and transmit.
2838 sp = &cp->smc_regs[idx];
2839 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
2841 /* Disable all interrupts and clear all pending
2842 * events.
2844 sp->smc_smcm = 0;
2845 sp->smc_smce = 0xff;
2847 /* If the port is the console, enable Rx and Tx.
2849 #ifdef CONFIG_SERIAL_CONSOLE
2850 if (i == CONFIG_SERIAL_CONSOLE_PORT)
2851 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
2852 #endif
2855 /* Install interrupt handler.
2857 /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
2858 /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
2859 request_irq(state->irq, rs_360_interrupt,
2860 IRQ_FLG_LOCK, "ttyS", (void *)info);
2862 /* Set up the baud rate generator.
2864 m360_cpm_setbrg(i, baud_table[baud_idx]);
2869 return 0;
2876 /* This must always be called before the rs_360_init() function, otherwise
2877 * it blows away the port control information.
2879 //static int __init serial_console_setup( struct console *co, char *options)
2880 int serial_console_setup( struct console *co, char *options)
2882 struct serial_state *ser;
2883 uint mem_addr, dp_addr, bidx, idx, iobits;
2884 ushort chan;
2885 QUICC_BD *bdp;
2886 volatile QUICC *cp;
2887 volatile struct smc_regs *sp;
2888 volatile struct scc_regs *scp;
2889 volatile struct smc_uart_pram *up;
2890 volatile struct uart_pram *sup;
2892 /* mleslie TODO:
2893 * add something to the 68k bootloader to store a desired initial console baud rate */
2895 /* bd_t *bd; */ /* a board info struct used by EPPC-bug */
2896 /* bd = (bd_t *)__res; */
2898 for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
2899 /* if (bd->bi_baudrate == baud_table[bidx]) */
2900 if (CONSOLE_BAUDRATE == baud_table[bidx])
2901 break;
2903 /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
2904 baud_idx = bidx;
2906 ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
2908 cp = pquicc; /* Get pointer to Communication Processor */
2910 idx = PORT_NUM(ser->smc_scc_num);
2911 if (ser->smc_scc_num & NUM_IS_SCC) {
2913 /* TODO: need to set up SCC pin assignment etc. here */
2916 else {
2917 iobits = 0xc0 << (idx * 4);
2918 cp->pip_pbpar |= iobits;
2919 cp->pip_pbdir &= ~iobits;
2920 cp->pip_pbodr &= ~iobits;
2922 /* Connect the baud rate generator to the
2923 * SMC based upon index in rs_table. Also
2924 * make sure it is connected to NMSI.
2926 cp->si_simode &= ~(0xffff << (idx * 16));
2927 cp->si_simode |= (idx << ((idx * 16) + 12));
2930 /* When we get here, the CPM has been reset, so we need
2931 * to configure the port.
2932 * We need to allocate a transmit and receive buffer descriptor
2933 * from dual port ram, and a character buffer area from host mem.
2936 /* Allocate space for two buffer descriptors in the DP ram.
2938 dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
2940 /* Allocate space for two 2 byte FIFOs in the host memory.
2942 /* mem_addr = m360_cpm_hostalloc(8); */
2943 mem_addr = (uint)console_fifos;
2946 /* Set the physical address of the host memory buffers in
2947 * the buffer descriptors.
2949 /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
2950 bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
2951 bdp->buf = (char *)mem_addr;
2952 (bdp+1)->buf = (char *)(mem_addr+4);
2954 /* For the receive, set empty and wrap.
2955 * For transmit, set wrap.
2957 bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
2958 (bdp+1)->status = BD_SC_WRAP;
2960 /* Set up the uart parameters in the parameter ram.
2962 if (ser->smc_scc_num & NUM_IS_SCC) {
2963 scp = &cp->scc_regs[idx];
2964 /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
2965 sup = &pquicc->pram[ser->port].scc.pscc.u;
2967 sup->rbase = dp_addr;
2968 sup->tbase = dp_addr + sizeof(QUICC_BD);
2970 /* Set up the uart parameters in the
2971 * parameter ram.
2973 sup->rfcr = SMC_EB;
2974 sup->tfcr = SMC_EB;
2976 /* Set this to 1 for now, so we get single
2977 * character interrupts. Using idle charater
2978 * time requires some additional tuning.
2980 sup->mrblr = 1;
2981 sup->max_idl = 0;
2982 sup->brkcr = 1;
2983 sup->parec = 0;
2984 sup->frmer = 0;
2985 sup->nosec = 0;
2986 sup->brkec = 0;
2987 sup->uaddr1 = 0;
2988 sup->uaddr2 = 0;
2989 sup->toseq = 0;
2991 int i;
2992 for (i=0;i<8;i++)
2993 sup->cc[i] = 0x8000;
2995 sup->rccm = 0xc0ff;
2997 /* Send the CPM an initialize command.
2999 chan = scc_chan_map[idx];
3001 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
3002 while (cp->cp_cr & CPM_CR_FLG);
3004 /* Set UART mode, 8 bit, no parity, one stop.
3005 * Enable receive and transmit.
3007 scp->scc_gsmr.w.high = 0;
3008 scp->scc_gsmr.w.low =
3009 (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
3011 /* Disable all interrupts and clear all pending
3012 * events.
3014 scp->scc_sccm = 0;
3015 scp->scc_scce = 0xffff;
3016 scp->scc_dsr = 0x7e7e;
3017 scp->scc_psmr = 0x3000;
3019 scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
3022 else {
3023 /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
3024 up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
3026 up->rbase = dp_addr; /* Base of receive buffer desc. */
3027 up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */
3028 up->rfcr = SMC_EB;
3029 up->tfcr = SMC_EB;
3031 /* Set this to 1 for now, so we get single character interrupts.
3033 up->mrblr = 1; /* receive buffer length */
3034 up->max_idl = 0; /* wait forever for next char */
3036 /* Send the CPM an initialize command.
3038 chan = smc_chan_map[idx];
3039 cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
3040 while (cp->cp_cr & CPM_CR_FLG);
3042 /* Set UART mode, 8 bit, no parity, one stop.
3043 * Enable receive and transmit.
3045 sp = &cp->smc_regs[idx];
3046 sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
3048 /* And finally, enable Rx and Tx.
3050 sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
3053 /* Set up the baud rate generator.
3055 /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
3056 m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
3058 return 0;
3062 * Local variables:
3063 * c-indent-level: 4
3064 * c-basic-offset: 4
3065 * tab-width: 4
3066 * End: